; -------------------------------------------------------------------------------- ; @Title: S32K On-Chip Peripherals ; @Props: Released ; @Author: KWI, DAB, NEJ ; @Changelog: 2020-07-03 KWI ; 2022-02-04 DAB ; 2024-06-28 NEJ ; @Manufacturer: NXP - NXP Semiconductors ; @Doc: Generated (TRACE32, build: 170184.), based on: ; S32K116.svd (Ver. 1.6), S32K118.svd (Ver. 1.6), ; S32K142.svd (Ver. 1.6), S32K144.svd (Ver. 1.6), ; S32K146.svd (Ver. 1.6), S32K148.svd (Ver. 1.6) ; @Core: Cortex-M4F, Cortex-M0+ ; @Chip: S32K116, S32K118, S32K142, S32K142W, S32K144, S32K144W, S32K146, S32K148 ; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR IMPLIED WARRANTIES, ; INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND ; FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NXP OR ITS ; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, ; OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, ; STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; -------------------------------------------------------------------------------- ; $Id: pers32k.per 18179 2024-07-31 10:12:32Z kwisniewski $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 sif (CORENAME()=="CORTEXM0+") tree.close "Core Registers (Cortex-M0+)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 0x8 if (CORENAME()=="CORTEXM1") group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" else group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" endif if (CORENAME()=="CORTEXM1") rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1" bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known" else rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors" endif if (CORENAME()=="CORTEXM1") rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC21=Cortex-M1" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" elif (CORENAME()=="CORTEXM0+") rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC60=Cortex-M0+" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" else rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" textline " " bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,ARMv6-M,0xD,0xE,0xF" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC20=Cortex-M0" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" endif group.long 0xd04++0x03 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending" bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending" textline " " bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending" bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending" textline " " bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending" bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service" textline " " bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt" hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field" textline " " hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field" if (CORENAME()=="CORTEXM0+") group.long 0xd08++0x03 line.long 0x00 "VTOR,Vector Table Offset Register" hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address" else textline " " endif group.long 0xd0c++0x03 line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key" bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian" textline " " bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset" bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear" group.long 0xd10++0x03 line.long 0x00 "SCR,System Control Register" bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" rgroup.long 0xd14++0x03 line.long 0x00 "CCR,Configuration and Control Register" bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned" bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped" group.long 0xd1c++0x0b line.long 0x00 "SHPR2,System Handler Priority Register 2" bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11" line.long 0x04 "SHPR3,System Handler Priority Register 3" bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11" bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11" line.long 0x08 "SHCSR,System Handler Control and State Register" bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending" if (CORENAME()=="CORTEXM0+") hgroup.long 0x08++0x03 hide.long 0x00 "ACTLR,Auxiliary Control Register" else textline " " endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" tree.end tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" tree.end width 6. tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x00 "INT0,Interrupt Priority Register" bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3" bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3" bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3" bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3" line.long 0x04 "INT1,Interrupt Priority Register" bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3" bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3" bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3" bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3" line.long 0x08 "INT2,Interrupt Priority Register" bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3" bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3" bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3" bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3" line.long 0x0C "INT3,Interrupt Priority Register" bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3" bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3" bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3" bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3" line.long 0x10 "INT4,Interrupt Priority Register" bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3" bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3" bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3" bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3" line.long 0x14 "INT5,Interrupt Priority Register" bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3" bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3" bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3" bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3" line.long 0x18 "INT6,Interrupt Priority Register" bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3" bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3" bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3" bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3" line.long 0x1C "INT7,Interrupt Priority Register" bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3" bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3" bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3" bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 0xA group.long 0xD30++0x03 line.long 0x00 "DFSR,Data Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred" eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred" textline " " eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match" textline " " eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match" eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request" if (CORENAME()=="CORTEXM1") if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00) group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " textline " " textfld " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif else if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00) group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " textline " " textfld " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif endif wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Selector Register" bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..." group.long 0xDF8++0x07 line.long 0x00 "DCRDR,Debug Core Register Data Register" hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor" line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled" bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error" textline " " bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Breakpoint Unit (BPU)" sif COMPonent.AVAILABLE("BPU") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1)) width 8. group.long 0x00++0x03 line.long 0x00 "BP_CTRL,Breakpoint Control Register" bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key field" "No write,Write" bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled" group.long 0x8++0x03 line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled" group.long 0xC++0x03 line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled" else newline textline "BPU component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 14. rgroup.long 0x00++0x03 line.long 0x00 "DW_CTRL,DW Control Register " bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1c++0x03 line.long 0x00 "DW_PCSR,DW Program Counter Sample Register" hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF" group.long 0x20++0x0b line.long 0x00 "DW_COMP0,DW Comparator Register 0" hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address" line.long 0x04 "DW_MASK0,DW Mask Register 0" hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION0,DW Function Register 0" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." group.long 0x30++0x0b line.long 0x00 "DW_COMP1,DW Comparator Register 1" hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address" line.long 0x04 "DW_MASK1,DW Mask Register 1 " hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION1,DW Function Register 1" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif sif (CORENAME()=="CORTEXM4F") tree.close "Core Registers (Cortex-M4F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes" bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes" textline " " bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes" group.long 0x10++0x0B line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x08 "SYST_CVR,SysTick Current Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,ARMv7-M" newline abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC24=Cortex-M4" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending" bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending" hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" line.long 0x14 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "USAFAULT,Usage Fault Status Register" bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" textline " " bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x07 line.long 0x00 "HFSR,Hard Fault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted" bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred" textline " " bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access" wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" width 10. tree "Feature Registers" rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif CORENAME()=="CORTEXM4F" tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" textline " " bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" textline " " bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" textline " " bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x07 line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." textline " " bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..." bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." textline " " bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group.long 0x00++0x07 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline "" line.long 0x04 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region" hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0xB else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported" textline " " rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count Register" line.long 0x08 "DWT_CPICNT,CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " group.long 0x20++0x07 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" line.long 0x04 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x30)++0x07 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" line.long 0x04 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x40)++0x07 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" line.long 0x04 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x50)++0x07 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" line.long 0x04 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0x0B else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif sif (cpuis("S32K116*")||cpuis("S32K118*")) base ad:0x4003B000 elif (cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")||cpuis("S32K148*")) base ad:0x0 endif tree "ADC (Analog-to-Digital Converter)" sif (cpuis("S32K116*")||cpuis("S32K118*")) repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "SC1$1,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input channel select" repeat.end group.long 0x40++0x7 line.long 0x0 "CFG1,ADC Configuration Register 1" bitfld.long 0x0 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x0 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x0 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x0 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x4 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x4 0.--7. 1. "SMPLTS,Sample Time Select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x48)++0x3 line.long 0x0 "R$1,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" endif sif (cpuis("S32K142*")) tree "ADC1" base ad:0x40027000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "SC1$1,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input channel select" repeat.end group.long 0x40++0x7 line.long 0x0 "CFG1,ADC Configuration Register 1" bitfld.long 0x0 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x0 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x0 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x0 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x4 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x4 0.--7. 1. "SMPLTS,Sample Time Select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x48)++0x3 line.long 0x0 "R$1,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" tree.end endif sif (cpuis("S32K144*")) tree "ADC1" base ad:0x40027000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "SC1$1,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input channel select" repeat.end group.long 0x40++0x7 line.long 0x0 "CFG1,ADC Configuration Register 1" bitfld.long 0x0 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x0 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x0 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x0 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x4 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x4 0.--7. 1. "SMPLTS,Sample Time Select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x48)++0x3 line.long 0x0 "R$1,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" tree.end endif sif (cpuis("S32K146*")) tree "ADC1" base ad:0x40027000 group.long 0x0++0x47 line.long 0x0 "SC1A,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" line.long 0x4 "SC1B,ADC Status and Control Register 1" rbitfld.long 0x4 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x4 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x4 0.--5. 1. "ADCH,Input channel select" line.long 0x8 "SC1C,ADC Status and Control Register 1" rbitfld.long 0x8 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x8 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x8 0.--5. 1. "ADCH,Input channel select" line.long 0xC "SC1D,ADC Status and Control Register 1" rbitfld.long 0xC 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0xC 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0xC 0.--5. 1. "ADCH,Input channel select" line.long 0x10 "SC1E,ADC Status and Control Register 1" rbitfld.long 0x10 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x10 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x10 0.--5. 1. "ADCH,Input channel select" line.long 0x14 "SC1F,ADC Status and Control Register 1" rbitfld.long 0x14 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x14 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x14 0.--5. 1. "ADCH,Input channel select" line.long 0x18 "SC1G,ADC Status and Control Register 1" rbitfld.long 0x18 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x18 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x18 0.--5. 1. "ADCH,Input channel select" line.long 0x1C "SC1H,ADC Status and Control Register 1" rbitfld.long 0x1C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x1C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x1C 0.--5. 1. "ADCH,Input channel select" line.long 0x20 "SC1I,ADC Status and Control Register 1" rbitfld.long 0x20 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x20 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x20 0.--5. 1. "ADCH,Input channel select" line.long 0x24 "SC1J,ADC Status and Control Register 1" rbitfld.long 0x24 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x24 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x24 0.--5. 1. "ADCH,Input channel select" line.long 0x28 "SC1K,ADC Status and Control Register 1" rbitfld.long 0x28 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x28 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x28 0.--5. 1. "ADCH,Input channel select" line.long 0x2C "SC1L,ADC Status and Control Register 1" rbitfld.long 0x2C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x2C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x2C 0.--5. 1. "ADCH,Input channel select" line.long 0x30 "SC1M,ADC Status and Control Register 1" rbitfld.long 0x30 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x30 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x30 0.--5. 1. "ADCH,Input channel select" line.long 0x34 "SC1N,ADC Status and Control Register 1" rbitfld.long 0x34 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x34 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x34 0.--5. 1. "ADCH,Input channel select" line.long 0x38 "SC1O,ADC Status and Control Register 1" rbitfld.long 0x38 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x38 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x38 0.--5. 1. "ADCH,Input channel select" line.long 0x3C "SC1P,ADC Status and Control Register 1" rbitfld.long 0x3C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x3C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x3C 0.--5. 1. "ADCH,Input channel select" line.long 0x40 "CFG1,ADC Configuration Register 1" bitfld.long 0x40 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x40 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x40 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x40 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x44 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x44 0.--7. 1. "SMPLTS,Sample Time Select" rgroup.long 0x48++0x3F line.long 0x0 "RA,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" line.long 0x4 "RB,ADC Data Result Registers" hexmask.long.word 0x4 0.--11. 1. "D,Data result" line.long 0x8 "RC,ADC Data Result Registers" hexmask.long.word 0x8 0.--11. 1. "D,Data result" line.long 0xC "RD,ADC Data Result Registers" hexmask.long.word 0xC 0.--11. 1. "D,Data result" line.long 0x10 "RE,ADC Data Result Registers" hexmask.long.word 0x10 0.--11. 1. "D,Data result" line.long 0x14 "RF,ADC Data Result Registers" hexmask.long.word 0x14 0.--11. 1. "D,Data result" line.long 0x18 "RG,ADC Data Result Registers" hexmask.long.word 0x18 0.--11. 1. "D,Data result" line.long 0x1C "RH,ADC Data Result Registers" hexmask.long.word 0x1C 0.--11. 1. "D,Data result" line.long 0x20 "RI,ADC Data Result Registers" hexmask.long.word 0x20 0.--11. 1. "D,Data result" line.long 0x24 "RJ,ADC Data Result Registers" hexmask.long.word 0x24 0.--11. 1. "D,Data result" line.long 0x28 "RK,ADC Data Result Registers" hexmask.long.word 0x28 0.--11. 1. "D,Data result" line.long 0x2C "RL,ADC Data Result Registers" hexmask.long.word 0x2C 0.--11. 1. "D,Data result" line.long 0x30 "RM,ADC Data Result Registers" hexmask.long.word 0x30 0.--11. 1. "D,Data result" line.long 0x34 "RN,ADC Data Result Registers" hexmask.long.word 0x34 0.--11. 1. "D,Data result" line.long 0x38 "RO,ADC Data Result Registers" hexmask.long.word 0x38 0.--11. 1. "D,Data result" line.long 0x3C "RP,ADC Data Result Registers" hexmask.long.word 0x3C 0.--11. 1. "D,Data result" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "aSC1$1,ADC Status and Control Register 1 (alias)" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" repeat.end group.long 0x148++0x1F line.long 0x0 "SC1Q,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" line.long 0x4 "SC1R,ADC Status and Control Register 1" rbitfld.long 0x4 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x4 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x4 0.--5. 1. "ADCH,Input channel select" line.long 0x8 "SC1S,ADC Status and Control Register 1" rbitfld.long 0x8 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x8 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x8 0.--5. 1. "ADCH,Input channel select" line.long 0xC "SC1T,ADC Status and Control Register 1" rbitfld.long 0xC 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0xC 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0xC 0.--5. 1. "ADCH,Input channel select" line.long 0x10 "SC1U,ADC Status and Control Register 1" rbitfld.long 0x10 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x10 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x10 0.--5. 1. "ADCH,Input channel select" line.long 0x14 "SC1V,ADC Status and Control Register 1" rbitfld.long 0x14 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x14 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x14 0.--5. 1. "ADCH,Input channel select" line.long 0x18 "SC1W,ADC Status and Control Register 1" rbitfld.long 0x18 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x18 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x18 0.--5. 1. "ADCH,Input channel select" line.long 0x1C "SC1X,ADC Status and Control Register 1" rbitfld.long 0x1C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x1C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x1C 0.--5. 1. "ADCH,Input channel select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x188)++0x3 line.long 0x0 "aR$1,ADC Data Result Registers (alias)" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end rgroup.long 0x1C8++0x1F line.long 0x0 "RQ,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" line.long 0x4 "RR,ADC Data Result Registers" hexmask.long.word 0x4 0.--11. 1. "D,Data result" line.long 0x8 "RS,ADC Data Result Registers" hexmask.long.word 0x8 0.--11. 1. "D,Data result" line.long 0xC "RT,ADC Data Result Registers" hexmask.long.word 0xC 0.--11. 1. "D,Data result" line.long 0x10 "RU,ADC Data Result Registers" hexmask.long.word 0x10 0.--11. 1. "D,Data result" line.long 0x14 "RV,ADC Data Result Registers" hexmask.long.word 0x14 0.--11. 1. "D,Data result" line.long 0x18 "RW,ADC Data Result Registers" hexmask.long.word 0x18 0.--11. 1. "D,Data result" line.long 0x1C "RX,ADC Data Result Registers" hexmask.long.word 0x1C 0.--11. 1. "D,Data result" tree.end endif sif (cpuis("S32K148*")) tree "ADC1" base ad:0x40027000 group.long 0x0++0x47 line.long 0x0 "SC1A,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" line.long 0x4 "SC1B,ADC Status and Control Register 1" rbitfld.long 0x4 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x4 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x4 0.--5. 1. "ADCH,Input channel select" line.long 0x8 "SC1C,ADC Status and Control Register 1" rbitfld.long 0x8 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x8 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x8 0.--5. 1. "ADCH,Input channel select" line.long 0xC "SC1D,ADC Status and Control Register 1" rbitfld.long 0xC 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0xC 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0xC 0.--5. 1. "ADCH,Input channel select" line.long 0x10 "SC1E,ADC Status and Control Register 1" rbitfld.long 0x10 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x10 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x10 0.--5. 1. "ADCH,Input channel select" line.long 0x14 "SC1F,ADC Status and Control Register 1" rbitfld.long 0x14 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x14 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x14 0.--5. 1. "ADCH,Input channel select" line.long 0x18 "SC1G,ADC Status and Control Register 1" rbitfld.long 0x18 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x18 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x18 0.--5. 1. "ADCH,Input channel select" line.long 0x1C "SC1H,ADC Status and Control Register 1" rbitfld.long 0x1C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x1C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x1C 0.--5. 1. "ADCH,Input channel select" line.long 0x20 "SC1I,ADC Status and Control Register 1" rbitfld.long 0x20 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x20 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x20 0.--5. 1. "ADCH,Input channel select" line.long 0x24 "SC1J,ADC Status and Control Register 1" rbitfld.long 0x24 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x24 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x24 0.--5. 1. "ADCH,Input channel select" line.long 0x28 "SC1K,ADC Status and Control Register 1" rbitfld.long 0x28 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x28 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x28 0.--5. 1. "ADCH,Input channel select" line.long 0x2C "SC1L,ADC Status and Control Register 1" rbitfld.long 0x2C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x2C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x2C 0.--5. 1. "ADCH,Input channel select" line.long 0x30 "SC1M,ADC Status and Control Register 1" rbitfld.long 0x30 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x30 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x30 0.--5. 1. "ADCH,Input channel select" line.long 0x34 "SC1N,ADC Status and Control Register 1" rbitfld.long 0x34 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x34 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x34 0.--5. 1. "ADCH,Input channel select" line.long 0x38 "SC1O,ADC Status and Control Register 1" rbitfld.long 0x38 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x38 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x38 0.--5. 1. "ADCH,Input channel select" line.long 0x3C "SC1P,ADC Status and Control Register 1" rbitfld.long 0x3C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x3C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x3C 0.--5. 1. "ADCH,Input channel select" line.long 0x40 "CFG1,ADC Configuration Register 1" bitfld.long 0x40 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x40 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x40 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x40 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x44 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x44 0.--7. 1. "SMPLTS,Sample Time Select" rgroup.long 0x48++0x3F line.long 0x0 "RA,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" line.long 0x4 "RB,ADC Data Result Registers" hexmask.long.word 0x4 0.--11. 1. "D,Data result" line.long 0x8 "RC,ADC Data Result Registers" hexmask.long.word 0x8 0.--11. 1. "D,Data result" line.long 0xC "RD,ADC Data Result Registers" hexmask.long.word 0xC 0.--11. 1. "D,Data result" line.long 0x10 "RE,ADC Data Result Registers" hexmask.long.word 0x10 0.--11. 1. "D,Data result" line.long 0x14 "RF,ADC Data Result Registers" hexmask.long.word 0x14 0.--11. 1. "D,Data result" line.long 0x18 "RG,ADC Data Result Registers" hexmask.long.word 0x18 0.--11. 1. "D,Data result" line.long 0x1C "RH,ADC Data Result Registers" hexmask.long.word 0x1C 0.--11. 1. "D,Data result" line.long 0x20 "RI,ADC Data Result Registers" hexmask.long.word 0x20 0.--11. 1. "D,Data result" line.long 0x24 "RJ,ADC Data Result Registers" hexmask.long.word 0x24 0.--11. 1. "D,Data result" line.long 0x28 "RK,ADC Data Result Registers" hexmask.long.word 0x28 0.--11. 1. "D,Data result" line.long 0x2C "RL,ADC Data Result Registers" hexmask.long.word 0x2C 0.--11. 1. "D,Data result" line.long 0x30 "RM,ADC Data Result Registers" hexmask.long.word 0x30 0.--11. 1. "D,Data result" line.long 0x34 "RN,ADC Data Result Registers" hexmask.long.word 0x34 0.--11. 1. "D,Data result" line.long 0x38 "RO,ADC Data Result Registers" hexmask.long.word 0x38 0.--11. 1. "D,Data result" line.long 0x3C "RP,ADC Data Result Registers" hexmask.long.word 0x3C 0.--11. 1. "D,Data result" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "aSC1$1,ADC Status and Control Register 1 (alias)" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" repeat.end group.long 0x148++0x3F line.long 0x0 "SC1Q,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" line.long 0x4 "SC1R,ADC Status and Control Register 1" rbitfld.long 0x4 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x4 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x4 0.--5. 1. "ADCH,Input channel select" line.long 0x8 "SC1S,ADC Status and Control Register 1" rbitfld.long 0x8 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x8 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x8 0.--5. 1. "ADCH,Input channel select" line.long 0xC "SC1T,ADC Status and Control Register 1" rbitfld.long 0xC 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0xC 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0xC 0.--5. 1. "ADCH,Input channel select" line.long 0x10 "SC1U,ADC Status and Control Register 1" rbitfld.long 0x10 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x10 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x10 0.--5. 1. "ADCH,Input channel select" line.long 0x14 "SC1V,ADC Status and Control Register 1" rbitfld.long 0x14 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x14 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x14 0.--5. 1. "ADCH,Input channel select" line.long 0x18 "SC1W,ADC Status and Control Register 1" rbitfld.long 0x18 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x18 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x18 0.--5. 1. "ADCH,Input channel select" line.long 0x1C "SC1X,ADC Status and Control Register 1" rbitfld.long 0x1C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x1C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x1C 0.--5. 1. "ADCH,Input channel select" line.long 0x20 "SC1Y,ADC Status and Control Register 1" rbitfld.long 0x20 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x20 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x20 0.--5. 1. "ADCH,Input channel select" line.long 0x24 "SC1Z,ADC Status and Control Register 1" rbitfld.long 0x24 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x24 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x24 0.--5. 1. "ADCH,Input channel select" line.long 0x28 "SC1AA,ADC Status and Control Register 1" rbitfld.long 0x28 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x28 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x28 0.--5. 1. "ADCH,Input channel select" line.long 0x2C "SC1AB,ADC Status and Control Register 1" rbitfld.long 0x2C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x2C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x2C 0.--5. 1. "ADCH,Input channel select" line.long 0x30 "SC1AC,ADC Status and Control Register 1" rbitfld.long 0x30 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x30 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x30 0.--5. 1. "ADCH,Input channel select" line.long 0x34 "SC1AD,ADC Status and Control Register 1" rbitfld.long 0x34 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x34 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x34 0.--5. 1. "ADCH,Input channel select" line.long 0x38 "SC1AE,ADC Status and Control Register 1" rbitfld.long 0x38 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x38 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x38 0.--5. 1. "ADCH,Input channel select" line.long 0x3C "SC1AF,ADC Status and Control Register 1" rbitfld.long 0x3C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x3C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x3C 0.--5. 1. "ADCH,Input channel select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x188)++0x3 line.long 0x0 "aR$1,ADC Data Result Registers (alias)" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end rgroup.long 0x1C8++0x3F line.long 0x0 "RQ,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" line.long 0x4 "RR,ADC Data Result Registers" hexmask.long.word 0x4 0.--11. 1. "D,Data result" line.long 0x8 "RS,ADC Data Result Registers" hexmask.long.word 0x8 0.--11. 1. "D,Data result" line.long 0xC "RT,ADC Data Result Registers" hexmask.long.word 0xC 0.--11. 1. "D,Data result" line.long 0x10 "RU,ADC Data Result Registers" hexmask.long.word 0x10 0.--11. 1. "D,Data result" line.long 0x14 "RV,ADC Data Result Registers" hexmask.long.word 0x14 0.--11. 1. "D,Data result" line.long 0x18 "RW,ADC Data Result Registers" hexmask.long.word 0x18 0.--11. 1. "D,Data result" line.long 0x1C "RX,ADC Data Result Registers" hexmask.long.word 0x1C 0.--11. 1. "D,Data result" line.long 0x20 "RY,ADC Data Result Registers" hexmask.long.word 0x20 0.--11. 1. "D,Data result" line.long 0x24 "RZ,ADC Data Result Registers" hexmask.long.word 0x24 0.--11. 1. "D,Data result" line.long 0x28 "RAA,ADC Data Result Registers" hexmask.long.word 0x28 0.--11. 1. "D,Data result" line.long 0x2C "RAB,ADC Data Result Registers" hexmask.long.word 0x2C 0.--11. 1. "D,Data result" line.long 0x30 "RAC,ADC Data Result Registers" hexmask.long.word 0x30 0.--11. 1. "D,Data result" line.long 0x34 "RAD,ADC Data Result Registers" hexmask.long.word 0x34 0.--11. 1. "D,Data result" line.long 0x38 "RAE,ADC Data Result Registers" hexmask.long.word 0x38 0.--11. 1. "D,Data result" line.long 0x3C "RAF,ADC Data Result Registers" hexmask.long.word 0x3C 0.--11. 1. "D,Data result" tree.end endif sif (cpuis("S32K142*")) tree "ADC0" base ad:0x4003B000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "SC1$1,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input channel select" repeat.end group.long 0x40++0x7 line.long 0x0 "CFG1,ADC Configuration Register 1" bitfld.long 0x0 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x0 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x0 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x0 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x4 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x4 0.--7. 1. "SMPLTS,Sample Time Select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x48)++0x3 line.long 0x0 "R$1,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" tree.end endif sif (cpuis("S32K144*")) tree "ADC0" base ad:0x4003B000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "SC1$1,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input channel select" repeat.end group.long 0x40++0x7 line.long 0x0 "CFG1,ADC Configuration Register 1" bitfld.long 0x0 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x0 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x0 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x0 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x4 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x4 0.--7. 1. "SMPLTS,Sample Time Select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x48)++0x3 line.long 0x0 "R$1,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" tree.end endif sif (cpuis("S32K146*")) tree "ADC0" base ad:0x4003B000 group.long 0x0++0x47 line.long 0x0 "SC1A,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" line.long 0x4 "SC1B,ADC Status and Control Register 1" rbitfld.long 0x4 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x4 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x4 0.--5. 1. "ADCH,Input channel select" line.long 0x8 "SC1C,ADC Status and Control Register 1" rbitfld.long 0x8 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x8 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x8 0.--5. 1. "ADCH,Input channel select" line.long 0xC "SC1D,ADC Status and Control Register 1" rbitfld.long 0xC 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0xC 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0xC 0.--5. 1. "ADCH,Input channel select" line.long 0x10 "SC1E,ADC Status and Control Register 1" rbitfld.long 0x10 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x10 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x10 0.--5. 1. "ADCH,Input channel select" line.long 0x14 "SC1F,ADC Status and Control Register 1" rbitfld.long 0x14 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x14 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x14 0.--5. 1. "ADCH,Input channel select" line.long 0x18 "SC1G,ADC Status and Control Register 1" rbitfld.long 0x18 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x18 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x18 0.--5. 1. "ADCH,Input channel select" line.long 0x1C "SC1H,ADC Status and Control Register 1" rbitfld.long 0x1C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x1C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x1C 0.--5. 1. "ADCH,Input channel select" line.long 0x20 "SC1I,ADC Status and Control Register 1" rbitfld.long 0x20 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x20 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x20 0.--5. 1. "ADCH,Input channel select" line.long 0x24 "SC1J,ADC Status and Control Register 1" rbitfld.long 0x24 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x24 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x24 0.--5. 1. "ADCH,Input channel select" line.long 0x28 "SC1K,ADC Status and Control Register 1" rbitfld.long 0x28 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x28 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x28 0.--5. 1. "ADCH,Input channel select" line.long 0x2C "SC1L,ADC Status and Control Register 1" rbitfld.long 0x2C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x2C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x2C 0.--5. 1. "ADCH,Input channel select" line.long 0x30 "SC1M,ADC Status and Control Register 1" rbitfld.long 0x30 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x30 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x30 0.--5. 1. "ADCH,Input channel select" line.long 0x34 "SC1N,ADC Status and Control Register 1" rbitfld.long 0x34 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x34 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x34 0.--5. 1. "ADCH,Input channel select" line.long 0x38 "SC1O,ADC Status and Control Register 1" rbitfld.long 0x38 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x38 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x38 0.--5. 1. "ADCH,Input channel select" line.long 0x3C "SC1P,ADC Status and Control Register 1" rbitfld.long 0x3C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x3C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x3C 0.--5. 1. "ADCH,Input channel select" line.long 0x40 "CFG1,ADC Configuration Register 1" bitfld.long 0x40 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x40 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x40 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x40 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x44 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x44 0.--7. 1. "SMPLTS,Sample Time Select" rgroup.long 0x48++0x3F line.long 0x0 "RA,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" line.long 0x4 "RB,ADC Data Result Registers" hexmask.long.word 0x4 0.--11. 1. "D,Data result" line.long 0x8 "RC,ADC Data Result Registers" hexmask.long.word 0x8 0.--11. 1. "D,Data result" line.long 0xC "RD,ADC Data Result Registers" hexmask.long.word 0xC 0.--11. 1. "D,Data result" line.long 0x10 "RE,ADC Data Result Registers" hexmask.long.word 0x10 0.--11. 1. "D,Data result" line.long 0x14 "RF,ADC Data Result Registers" hexmask.long.word 0x14 0.--11. 1. "D,Data result" line.long 0x18 "RG,ADC Data Result Registers" hexmask.long.word 0x18 0.--11. 1. "D,Data result" line.long 0x1C "RH,ADC Data Result Registers" hexmask.long.word 0x1C 0.--11. 1. "D,Data result" line.long 0x20 "RI,ADC Data Result Registers" hexmask.long.word 0x20 0.--11. 1. "D,Data result" line.long 0x24 "RJ,ADC Data Result Registers" hexmask.long.word 0x24 0.--11. 1. "D,Data result" line.long 0x28 "RK,ADC Data Result Registers" hexmask.long.word 0x28 0.--11. 1. "D,Data result" line.long 0x2C "RL,ADC Data Result Registers" hexmask.long.word 0x2C 0.--11. 1. "D,Data result" line.long 0x30 "RM,ADC Data Result Registers" hexmask.long.word 0x30 0.--11. 1. "D,Data result" line.long 0x34 "RN,ADC Data Result Registers" hexmask.long.word 0x34 0.--11. 1. "D,Data result" line.long 0x38 "RO,ADC Data Result Registers" hexmask.long.word 0x38 0.--11. 1. "D,Data result" line.long 0x3C "RP,ADC Data Result Registers" hexmask.long.word 0x3C 0.--11. 1. "D,Data result" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "aSC1$1,ADC Status and Control Register 1 (alias)" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" repeat.end group.long 0x148++0x1F line.long 0x0 "SC1Q,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" line.long 0x4 "SC1R,ADC Status and Control Register 1" rbitfld.long 0x4 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x4 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x4 0.--5. 1. "ADCH,Input channel select" line.long 0x8 "SC1S,ADC Status and Control Register 1" rbitfld.long 0x8 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x8 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x8 0.--5. 1. "ADCH,Input channel select" line.long 0xC "SC1T,ADC Status and Control Register 1" rbitfld.long 0xC 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0xC 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0xC 0.--5. 1. "ADCH,Input channel select" line.long 0x10 "SC1U,ADC Status and Control Register 1" rbitfld.long 0x10 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x10 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x10 0.--5. 1. "ADCH,Input channel select" line.long 0x14 "SC1V,ADC Status and Control Register 1" rbitfld.long 0x14 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x14 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x14 0.--5. 1. "ADCH,Input channel select" line.long 0x18 "SC1W,ADC Status and Control Register 1" rbitfld.long 0x18 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x18 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x18 0.--5. 1. "ADCH,Input channel select" line.long 0x1C "SC1X,ADC Status and Control Register 1" rbitfld.long 0x1C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x1C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x1C 0.--5. 1. "ADCH,Input channel select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x188)++0x3 line.long 0x0 "aR$1,ADC Data Result Registers (alias)" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end rgroup.long 0x1C8++0x1F line.long 0x0 "RQ,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" line.long 0x4 "RR,ADC Data Result Registers" hexmask.long.word 0x4 0.--11. 1. "D,Data result" line.long 0x8 "RS,ADC Data Result Registers" hexmask.long.word 0x8 0.--11. 1. "D,Data result" line.long 0xC "RT,ADC Data Result Registers" hexmask.long.word 0xC 0.--11. 1. "D,Data result" line.long 0x10 "RU,ADC Data Result Registers" hexmask.long.word 0x10 0.--11. 1. "D,Data result" line.long 0x14 "RV,ADC Data Result Registers" hexmask.long.word 0x14 0.--11. 1. "D,Data result" line.long 0x18 "RW,ADC Data Result Registers" hexmask.long.word 0x18 0.--11. 1. "D,Data result" line.long 0x1C "RX,ADC Data Result Registers" hexmask.long.word 0x1C 0.--11. 1. "D,Data result" tree.end endif sif (cpuis("S32K148*")) tree "ADC0" base ad:0x4003B000 group.long 0x0++0x47 line.long 0x0 "SC1A,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" line.long 0x4 "SC1B,ADC Status and Control Register 1" rbitfld.long 0x4 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x4 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x4 0.--5. 1. "ADCH,Input channel select" line.long 0x8 "SC1C,ADC Status and Control Register 1" rbitfld.long 0x8 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x8 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x8 0.--5. 1. "ADCH,Input channel select" line.long 0xC "SC1D,ADC Status and Control Register 1" rbitfld.long 0xC 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0xC 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0xC 0.--5. 1. "ADCH,Input channel select" line.long 0x10 "SC1E,ADC Status and Control Register 1" rbitfld.long 0x10 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x10 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x10 0.--5. 1. "ADCH,Input channel select" line.long 0x14 "SC1F,ADC Status and Control Register 1" rbitfld.long 0x14 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x14 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x14 0.--5. 1. "ADCH,Input channel select" line.long 0x18 "SC1G,ADC Status and Control Register 1" rbitfld.long 0x18 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x18 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x18 0.--5. 1. "ADCH,Input channel select" line.long 0x1C "SC1H,ADC Status and Control Register 1" rbitfld.long 0x1C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x1C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x1C 0.--5. 1. "ADCH,Input channel select" line.long 0x20 "SC1I,ADC Status and Control Register 1" rbitfld.long 0x20 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x20 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x20 0.--5. 1. "ADCH,Input channel select" line.long 0x24 "SC1J,ADC Status and Control Register 1" rbitfld.long 0x24 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x24 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x24 0.--5. 1. "ADCH,Input channel select" line.long 0x28 "SC1K,ADC Status and Control Register 1" rbitfld.long 0x28 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x28 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x28 0.--5. 1. "ADCH,Input channel select" line.long 0x2C "SC1L,ADC Status and Control Register 1" rbitfld.long 0x2C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x2C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x2C 0.--5. 1. "ADCH,Input channel select" line.long 0x30 "SC1M,ADC Status and Control Register 1" rbitfld.long 0x30 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x30 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x30 0.--5. 1. "ADCH,Input channel select" line.long 0x34 "SC1N,ADC Status and Control Register 1" rbitfld.long 0x34 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x34 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x34 0.--5. 1. "ADCH,Input channel select" line.long 0x38 "SC1O,ADC Status and Control Register 1" rbitfld.long 0x38 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x38 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x38 0.--5. 1. "ADCH,Input channel select" line.long 0x3C "SC1P,ADC Status and Control Register 1" rbitfld.long 0x3C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x3C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x3C 0.--5. 1. "ADCH,Input channel select" line.long 0x40 "CFG1,ADC Configuration Register 1" bitfld.long 0x40 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1" bitfld.long 0x40 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,?,?" newline bitfld.long 0x40 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,?,?" bitfld.long 0x40 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ADC_ALTCLK1),1: Alternate clock 2 (ADC_ALTCLK2),?,?" line.long 0x44 "CFG2,ADC Configuration Register 2" hexmask.long.byte 0x44 0.--7. 1. "SMPLTS,Sample Time Select" rgroup.long 0x48++0x3F line.long 0x0 "RA,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" line.long 0x4 "RB,ADC Data Result Registers" hexmask.long.word 0x4 0.--11. 1. "D,Data result" line.long 0x8 "RC,ADC Data Result Registers" hexmask.long.word 0x8 0.--11. 1. "D,Data result" line.long 0xC "RD,ADC Data Result Registers" hexmask.long.word 0xC 0.--11. 1. "D,Data result" line.long 0x10 "RE,ADC Data Result Registers" hexmask.long.word 0x10 0.--11. 1. "D,Data result" line.long 0x14 "RF,ADC Data Result Registers" hexmask.long.word 0x14 0.--11. 1. "D,Data result" line.long 0x18 "RG,ADC Data Result Registers" hexmask.long.word 0x18 0.--11. 1. "D,Data result" line.long 0x1C "RH,ADC Data Result Registers" hexmask.long.word 0x1C 0.--11. 1. "D,Data result" line.long 0x20 "RI,ADC Data Result Registers" hexmask.long.word 0x20 0.--11. 1. "D,Data result" line.long 0x24 "RJ,ADC Data Result Registers" hexmask.long.word 0x24 0.--11. 1. "D,Data result" line.long 0x28 "RK,ADC Data Result Registers" hexmask.long.word 0x28 0.--11. 1. "D,Data result" line.long 0x2C "RL,ADC Data Result Registers" hexmask.long.word 0x2C 0.--11. 1. "D,Data result" line.long 0x30 "RM,ADC Data Result Registers" hexmask.long.word 0x30 0.--11. 1. "D,Data result" line.long 0x34 "RN,ADC Data Result Registers" hexmask.long.word 0x34 0.--11. 1. "D,Data result" line.long 0x38 "RO,ADC Data Result Registers" hexmask.long.word 0x38 0.--11. 1. "D,Data result" line.long 0x3C "RP,ADC Data Result Registers" hexmask.long.word 0x3C 0.--11. 1. "D,Data result" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "CV$1,Compare Value Registers" hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value." repeat.end group.long 0x90++0x5B line.long 0x0 "SC2,Status and Control Register 2" hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request" hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status" newline rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3" rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress." newline bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected." bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled." newline bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1" bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1" newline bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.." bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?" line.long 0x4 "SC3,Status and Control Register 3" bitfld.long 0x4 7. "CAL,Calibration" "0,1" bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.." newline bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled." bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,?,?" line.long 0x8 "BASE_OFS,BASE Offset Register" hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value" line.long 0xC "OFS,ADC Offset Correction Register" hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value" line.long 0x10 "USR_OFS,USER Offset Correction Register" hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value" line.long 0x14 "XOFS,ADC X Offset Correction Register" hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value" line.long 0x18 "YOFS,ADC Y Offset Correction Register" hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value" line.long 0x1C "G,ADC Gain Register" hexmask.long.word 0x1C 0.--10. 1. "G,Gain error adjustment factor for the overall conversion" line.long 0x20 "UG,ADC User Gain Register" hexmask.long.word 0x20 0.--9. 1. "UG,User gain error correction value" line.long 0x24 "CLPS,ADC General Calibration Value Register S" hexmask.long.byte 0x24 0.--6. 1. "CLPS,Calibration Value" line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3" hexmask.long.word 0x28 0.--9. 1. "CLP3,Calibration Value" line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2" hexmask.long.word 0x2C 0.--9. 1. "CLP2,Calibration Value" line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1" hexmask.long.word 0x30 0.--8. 1. "CLP1,Calibration Value" line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0" hexmask.long.byte 0x34 0.--7. 1. "CLP0,Calibration Value" line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X" hexmask.long.byte 0x38 0.--6. 1. "CLPX,Calibration Value" line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9" hexmask.long.byte 0x3C 0.--6. 1. "CLP9,Calibration Value" line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S" hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset" line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3" hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset" line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2" hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset" line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1" hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset" line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0" hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset" line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X" hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset" line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9" hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x108)++0x3 line.long 0x0 "aSC1$1,ADC Status and Control Register 1 (alias)" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" repeat.end group.long 0x148++0x3F line.long 0x0 "SC1Q,ADC Status and Control Register 1" rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x0 0.--5. 1. "ADCH,Input channel select" line.long 0x4 "SC1R,ADC Status and Control Register 1" rbitfld.long 0x4 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x4 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x4 0.--5. 1. "ADCH,Input channel select" line.long 0x8 "SC1S,ADC Status and Control Register 1" rbitfld.long 0x8 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x8 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x8 0.--5. 1. "ADCH,Input channel select" line.long 0xC "SC1T,ADC Status and Control Register 1" rbitfld.long 0xC 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0xC 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0xC 0.--5. 1. "ADCH,Input channel select" line.long 0x10 "SC1U,ADC Status and Control Register 1" rbitfld.long 0x10 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x10 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x10 0.--5. 1. "ADCH,Input channel select" line.long 0x14 "SC1V,ADC Status and Control Register 1" rbitfld.long 0x14 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x14 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x14 0.--5. 1. "ADCH,Input channel select" line.long 0x18 "SC1W,ADC Status and Control Register 1" rbitfld.long 0x18 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x18 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x18 0.--5. 1. "ADCH,Input channel select" line.long 0x1C "SC1X,ADC Status and Control Register 1" rbitfld.long 0x1C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x1C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x1C 0.--5. 1. "ADCH,Input channel select" line.long 0x20 "SC1Y,ADC Status and Control Register 1" rbitfld.long 0x20 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x20 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x20 0.--5. 1. "ADCH,Input channel select" line.long 0x24 "SC1Z,ADC Status and Control Register 1" rbitfld.long 0x24 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x24 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x24 0.--5. 1. "ADCH,Input channel select" line.long 0x28 "SC1AA,ADC Status and Control Register 1" rbitfld.long 0x28 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x28 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x28 0.--5. 1. "ADCH,Input channel select" line.long 0x2C "SC1AB,ADC Status and Control Register 1" rbitfld.long 0x2C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x2C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x2C 0.--5. 1. "ADCH,Input channel select" line.long 0x30 "SC1AC,ADC Status and Control Register 1" rbitfld.long 0x30 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x30 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x30 0.--5. 1. "ADCH,Input channel select" line.long 0x34 "SC1AD,ADC Status and Control Register 1" rbitfld.long 0x34 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x34 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x34 0.--5. 1. "ADCH,Input channel select" line.long 0x38 "SC1AE,ADC Status and Control Register 1" rbitfld.long 0x38 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x38 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x38 0.--5. 1. "ADCH,Input channel select" line.long 0x3C "SC1AF,ADC Status and Control Register 1" rbitfld.long 0x3C 7. "COCO,Conversion Complete Flag" "0: Conversion is not completed.,1: Conversion is completed." bitfld.long 0x3C 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled." newline hexmask.long.byte 0x3C 0.--5. 1. "ADCH,Input channel select" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x188)++0x3 line.long 0x0 "aR$1,ADC Data Result Registers (alias)" hexmask.long.word 0x0 0.--11. 1. "D,Data result" repeat.end rgroup.long 0x1C8++0x3F line.long 0x0 "RQ,ADC Data Result Registers" hexmask.long.word 0x0 0.--11. 1. "D,Data result" line.long 0x4 "RR,ADC Data Result Registers" hexmask.long.word 0x4 0.--11. 1. "D,Data result" line.long 0x8 "RS,ADC Data Result Registers" hexmask.long.word 0x8 0.--11. 1. "D,Data result" line.long 0xC "RT,ADC Data Result Registers" hexmask.long.word 0xC 0.--11. 1. "D,Data result" line.long 0x10 "RU,ADC Data Result Registers" hexmask.long.word 0x10 0.--11. 1. "D,Data result" line.long 0x14 "RV,ADC Data Result Registers" hexmask.long.word 0x14 0.--11. 1. "D,Data result" line.long 0x18 "RW,ADC Data Result Registers" hexmask.long.word 0x18 0.--11. 1. "D,Data result" line.long 0x1C "RX,ADC Data Result Registers" hexmask.long.word 0x1C 0.--11. 1. "D,Data result" line.long 0x20 "RY,ADC Data Result Registers" hexmask.long.word 0x20 0.--11. 1. "D,Data result" line.long 0x24 "RZ,ADC Data Result Registers" hexmask.long.word 0x24 0.--11. 1. "D,Data result" line.long 0x28 "RAA,ADC Data Result Registers" hexmask.long.word 0x28 0.--11. 1. "D,Data result" line.long 0x2C "RAB,ADC Data Result Registers" hexmask.long.word 0x2C 0.--11. 1. "D,Data result" line.long 0x30 "RAC,ADC Data Result Registers" hexmask.long.word 0x30 0.--11. 1. "D,Data result" line.long 0x34 "RAD,ADC Data Result Registers" hexmask.long.word 0x34 0.--11. 1. "D,Data result" line.long 0x38 "RAE,ADC Data Result Registers" hexmask.long.word 0x38 0.--11. 1. "D,Data result" line.long 0x3C "RAF,ADC Data Result Registers" hexmask.long.word 0x3C 0.--11. 1. "D,Data result" tree.end endif tree.end tree "AIPS (Peripheral Bridge)" base ad:0x40000000 group.long 0x0++0x3 line.long 0x0 "MPRA,Master Privilege Register A" bitfld.long 0x0 30. "MTR0,Master 0 Trusted For Read" "0: This master is not trusted for read accesses.,1: This master is trusted for read accesses." bitfld.long 0x0 29. "MTW0,Master 0 Trusted For Writes" "0: This master is not trusted for write accesses.,1: This master is trusted for write accesses." newline bitfld.long 0x0 28. "MPL0,Master 0 Privilege Level" "0: Accesses from this master are forced to user-mode.,1: Accesses from this master are not forced to.." bitfld.long 0x0 26. "MTR1,Master 1 Trusted for Read" "0: This master is not trusted for read accesses.,1: This master is trusted for read accesses." newline bitfld.long 0x0 25. "MTW1,Master 1 Trusted for Writes" "0: This master is not trusted for write accesses.,1: This master is trusted for write accesses." bitfld.long 0x0 24. "MPL1,Master 1 Privilege Level" "0: Accesses from this master are forced to user-mode.,1: Accesses from this master are not forced to.." newline bitfld.long 0x0 22. "MTR2,Master 2 Trusted For Read" "0: This master is not trusted for read accesses.,1: This master is trusted for read accesses." bitfld.long 0x0 21. "MTW2,Master 2 Trusted For Writes" "0: This master is not trusted for write accesses.,1: This master is trusted for write accesses." newline bitfld.long 0x0 20. "MPL2,Master 2 Privilege Level" "0: Accesses from this master are forced to user-mode.,1: Accesses from this master are not forced to.." group.long 0x20++0x7 line.long 0x0 "PACRA,Peripheral Access Control Register" bitfld.long 0x0 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x0 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x0 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x0 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x0 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x0 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." line.long 0x4 "PACRB,Peripheral Access Control Register" bitfld.long 0x4 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x4 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x4 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x4 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x4 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x4 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x4 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x4 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x4 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." rgroup.long 0x28++0x3 line.long 0x0 "PACRC,Peripheral Access Control Register" group.long 0x2C++0x3 line.long 0x0 "PACRD,Peripheral Access Control Register" bitfld.long 0x0 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x0 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x0 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x0 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x0 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x0 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." group.long 0x40++0x2F line.long 0x0 "OPACRA,Off-Platform Peripheral Access Control Register" bitfld.long 0x0 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x0 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x0 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x0 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x0 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x0 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x0 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x0 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x0 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x0 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x0 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x0 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x0 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x0 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x0 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x0 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x0 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x0 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." line.long 0x4 "OPACRB,Off-Platform Peripheral Access Control Register" bitfld.long 0x4 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x4 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x4 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x4 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x4 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x4 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x4 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x4 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x4 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x4 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x4 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x4 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." line.long 0x8 "OPACRC,Off-Platform Peripheral Access Control Register" bitfld.long 0x8 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x8 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x8 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x8 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x8 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x8 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x8 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x8 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x8 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x8 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x8 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x8 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." line.long 0xC "OPACRD,Off-Platform Peripheral Access Control Register" bitfld.long 0xC 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0xC 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0xC 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0xC 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0xC 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0xC 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0xC 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0xC 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0xC 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0xC 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0xC 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0xC 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0xC 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0xC 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0xC 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." line.long 0x10 "OPACRE,Off-Platform Peripheral Access Control Register" bitfld.long 0x10 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x10 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x10 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x10 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x10 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x10 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." line.long 0x14 "OPACRF,Off-Platform Peripheral Access Control Register" bitfld.long 0x14 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x14 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x14 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x14 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x14 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x14 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x14 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x14 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x14 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x14 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x14 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x14 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x14 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x14 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x14 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x14 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x14 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x14 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." line.long 0x18 "OPACRG,Off-Platform Peripheral Access Control Register" bitfld.long 0x18 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x18 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x18 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." sif (cpuis("S32K148*")) bitfld.long 0x18 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x18 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x18 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline endif sif (cpuis("S32K148*")) bitfld.long 0x18 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x18 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x18 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif line.long 0x1C "OPACRH,Off-Platform Peripheral Access Control Register" bitfld.long 0x1C 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x1C 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x1C 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." line.long 0x20 "OPACRI,Off-Platform Peripheral Access Control Register" bitfld.long 0x20 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x20 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x20 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x20 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x20 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x20 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x20 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x20 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x20 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x20 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x20 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x20 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x20 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x20 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x20 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." sif (cpuis("S32K148*")) bitfld.long 0x20 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x20 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x20 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif line.long 0x24 "OPACRJ,Off-Platform Peripheral Access Control Register" bitfld.long 0x24 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x24 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x24 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x24 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x24 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x24 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x24 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x24 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x24 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline sif (cpuis("S32K146*")) bitfld.long 0x24 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x24 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x24 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif sif (cpuis("S32K148*")) bitfld.long 0x24 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x24 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x24 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif sif (cpuis("S32K146*")) bitfld.long 0x24 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x24 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x24 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif sif (cpuis("S32K148*")) bitfld.long 0x24 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x24 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x24 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif line.long 0x28 "OPACRK,Off-Platform Peripheral Access Control Register" sif (cpuis("S32K148*")) bitfld.long 0x28 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x28 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x28 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif sif (cpuis("S32K148*")) bitfld.long 0x28 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x28 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x28 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline endif bitfld.long 0x28 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x28 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x28 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline sif (cpuis("S32K148*")) bitfld.long 0x28 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x28 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x28 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif line.long 0x2C "OPACRL,Off-Platform Peripheral Access Control Register" sif (cpuis("S32K148*")) bitfld.long 0x2C 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x2C 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x2C 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." endif bitfld.long 0x2C 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x2C 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x2C 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." newline bitfld.long 0x2C 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." bitfld.long 0x2C 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." newline bitfld.long 0x2C 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." bitfld.long 0x2C 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.." newline bitfld.long 0x2C 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected." bitfld.long 0x2C 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed." tree.end sif (cpuis("S32K116*")||cpuis("S32K118*")) base ad:0x40024000 elif (cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")||cpuis("S32K148*")) base ad:0x0 endif tree "CAN (Flex Controller Area Network)" sif (cpuis("S32K116*")||cpuis("S32K118*")) group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0x1FF line.long 0x0 "RAMn0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "RAMn1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "RAMn2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "RAMn3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "RAMn4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "RAMn5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "RAMn6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "RAMn7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "RAMn8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "RAMn9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "RAMn10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "RAMn11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "RAMn12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "RAMn13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "RAMn14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "RAMn15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "RAMn16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "RAMn17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "RAMn18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "RAMn19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "RAMn20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "RAMn21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "RAMn22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "RAMn23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "RAMn24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "RAMn25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "RAMn26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "RAMn27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "RAMn28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "RAMn29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "RAMn30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "RAMn31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "RAMn32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "RAMn33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "RAMn34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "RAMn35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "RAMn36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "RAMn37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "RAMn38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "RAMn39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "RAMn40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "RAMn41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "RAMn42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "RAMn43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "RAMn44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "RAMn45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "RAMn46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "RAMn47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "RAMn48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "RAMn49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "RAMn50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "RAMn51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "RAMn52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "RAMn53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "RAMn54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "RAMn55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "RAMn56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "RAMn57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "RAMn58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "RAMn59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "RAMn60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "RAMn61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "RAMn62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "RAMn63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x100 "RAMn64,Embedded RAM" hexmask.long.byte 0x100 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x100 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x100 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x100 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x104 "RAMn65,Embedded RAM" hexmask.long.byte 0x104 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x104 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x104 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x104 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x108 "RAMn66,Embedded RAM" hexmask.long.byte 0x108 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x108 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x108 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x108 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10C "RAMn67,Embedded RAM" hexmask.long.byte 0x10C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x110 "RAMn68,Embedded RAM" hexmask.long.byte 0x110 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x110 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x110 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x110 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x114 "RAMn69,Embedded RAM" hexmask.long.byte 0x114 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x114 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x114 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x114 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x118 "RAMn70,Embedded RAM" hexmask.long.byte 0x118 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x118 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x118 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x118 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x11C "RAMn71,Embedded RAM" hexmask.long.byte 0x11C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x11C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x11C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x11C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x120 "RAMn72,Embedded RAM" hexmask.long.byte 0x120 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x120 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x120 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x120 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x124 "RAMn73,Embedded RAM" hexmask.long.byte 0x124 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x124 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x124 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x124 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x128 "RAMn74,Embedded RAM" hexmask.long.byte 0x128 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x128 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x128 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x128 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x12C "RAMn75,Embedded RAM" hexmask.long.byte 0x12C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x12C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x12C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x12C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x130 "RAMn76,Embedded RAM" hexmask.long.byte 0x130 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x130 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x130 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x130 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x134 "RAMn77,Embedded RAM" hexmask.long.byte 0x134 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x134 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x134 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x134 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x138 "RAMn78,Embedded RAM" hexmask.long.byte 0x138 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x138 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x138 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x138 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x13C "RAMn79,Embedded RAM" hexmask.long.byte 0x13C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x13C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x13C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x13C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x140 "RAMn80,Embedded RAM" hexmask.long.byte 0x140 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x140 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x140 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x140 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x144 "RAMn81,Embedded RAM" hexmask.long.byte 0x144 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x144 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x144 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x144 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x148 "RAMn82,Embedded RAM" hexmask.long.byte 0x148 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x148 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x148 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x148 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14C "RAMn83,Embedded RAM" hexmask.long.byte 0x14C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x150 "RAMn84,Embedded RAM" hexmask.long.byte 0x150 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x150 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x150 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x150 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x154 "RAMn85,Embedded RAM" hexmask.long.byte 0x154 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x154 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x154 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x154 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x158 "RAMn86,Embedded RAM" hexmask.long.byte 0x158 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x158 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x158 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x158 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x15C "RAMn87,Embedded RAM" hexmask.long.byte 0x15C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x15C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x15C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x15C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x160 "RAMn88,Embedded RAM" hexmask.long.byte 0x160 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x160 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x160 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x160 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x164 "RAMn89,Embedded RAM" hexmask.long.byte 0x164 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x164 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x164 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x164 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x168 "RAMn90,Embedded RAM" hexmask.long.byte 0x168 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x168 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x168 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x168 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x16C "RAMn91,Embedded RAM" hexmask.long.byte 0x16C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x16C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x16C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x16C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x170 "RAMn92,Embedded RAM" hexmask.long.byte 0x170 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x170 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x170 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x170 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x174 "RAMn93,Embedded RAM" hexmask.long.byte 0x174 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x174 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x174 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x174 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x178 "RAMn94,Embedded RAM" hexmask.long.byte 0x178 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x178 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x178 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x178 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x17C "RAMn95,Embedded RAM" hexmask.long.byte 0x17C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x17C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x17C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x17C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x180 "RAMn96,Embedded RAM" hexmask.long.byte 0x180 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x180 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x180 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x180 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x184 "RAMn97,Embedded RAM" hexmask.long.byte 0x184 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x184 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x184 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x184 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x188 "RAMn98,Embedded RAM" hexmask.long.byte 0x188 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x188 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x188 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x188 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18C "RAMn99,Embedded RAM" hexmask.long.byte 0x18C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x190 "RAMn100,Embedded RAM" hexmask.long.byte 0x190 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x190 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x190 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x190 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x194 "RAMn101,Embedded RAM" hexmask.long.byte 0x194 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x194 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x194 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x194 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x198 "RAMn102,Embedded RAM" hexmask.long.byte 0x198 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x198 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x198 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x198 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x19C "RAMn103,Embedded RAM" hexmask.long.byte 0x19C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x19C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x19C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x19C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A0 "RAMn104,Embedded RAM" hexmask.long.byte 0x1A0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A4 "RAMn105,Embedded RAM" hexmask.long.byte 0x1A4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A8 "RAMn106,Embedded RAM" hexmask.long.byte 0x1A8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1AC "RAMn107,Embedded RAM" hexmask.long.byte 0x1AC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1AC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1AC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1AC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B0 "RAMn108,Embedded RAM" hexmask.long.byte 0x1B0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B4 "RAMn109,Embedded RAM" hexmask.long.byte 0x1B4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B8 "RAMn110,Embedded RAM" hexmask.long.byte 0x1B8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1BC "RAMn111,Embedded RAM" hexmask.long.byte 0x1BC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1BC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1BC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1BC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C0 "RAMn112,Embedded RAM" hexmask.long.byte 0x1C0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C4 "RAMn113,Embedded RAM" hexmask.long.byte 0x1C4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C8 "RAMn114,Embedded RAM" hexmask.long.byte 0x1C8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1CC "RAMn115,Embedded RAM" hexmask.long.byte 0x1CC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1CC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1CC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1CC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D0 "RAMn116,Embedded RAM" hexmask.long.byte 0x1D0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D4 "RAMn117,Embedded RAM" hexmask.long.byte 0x1D4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D8 "RAMn118,Embedded RAM" hexmask.long.byte 0x1D8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1DC "RAMn119,Embedded RAM" hexmask.long.byte 0x1DC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1DC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1DC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1DC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E0 "RAMn120,Embedded RAM" hexmask.long.byte 0x1E0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E4 "RAMn121,Embedded RAM" hexmask.long.byte 0x1E4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E8 "RAMn122,Embedded RAM" hexmask.long.byte 0x1E8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1EC "RAMn123,Embedded RAM" hexmask.long.byte 0x1EC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1EC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1EC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1EC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F0 "RAMn124,Embedded RAM" hexmask.long.byte 0x1F0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F4 "RAMn125,Embedded RAM" hexmask.long.byte 0x1F4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F8 "RAMn126,Embedded RAM" hexmask.long.byte 0x1F8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1FC "RAMn127,Embedded RAM" hexmask.long.byte 0x1FC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1FC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1FC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1FC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x7F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x40 "RXIMR16,Rx Individual Mask Registers" hexmask.long 0x40 0.--31. 1. "MI,Individual Mask Bits" line.long 0x44 "RXIMR17,Rx Individual Mask Registers" hexmask.long 0x44 0.--31. 1. "MI,Individual Mask Bits" line.long 0x48 "RXIMR18,Rx Individual Mask Registers" hexmask.long 0x48 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4C "RXIMR19,Rx Individual Mask Registers" hexmask.long 0x4C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x50 "RXIMR20,Rx Individual Mask Registers" hexmask.long 0x50 0.--31. 1. "MI,Individual Mask Bits" line.long 0x54 "RXIMR21,Rx Individual Mask Registers" hexmask.long 0x54 0.--31. 1. "MI,Individual Mask Bits" line.long 0x58 "RXIMR22,Rx Individual Mask Registers" hexmask.long 0x58 0.--31. 1. "MI,Individual Mask Bits" line.long 0x5C "RXIMR23,Rx Individual Mask Registers" hexmask.long 0x5C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x60 "RXIMR24,Rx Individual Mask Registers" hexmask.long 0x60 0.--31. 1. "MI,Individual Mask Bits" line.long 0x64 "RXIMR25,Rx Individual Mask Registers" hexmask.long 0x64 0.--31. 1. "MI,Individual Mask Bits" line.long 0x68 "RXIMR26,Rx Individual Mask Registers" hexmask.long 0x68 0.--31. 1. "MI,Individual Mask Bits" line.long 0x6C "RXIMR27,Rx Individual Mask Registers" hexmask.long 0x6C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x70 "RXIMR28,Rx Individual Mask Registers" hexmask.long 0x70 0.--31. 1. "MI,Individual Mask Bits" line.long 0x74 "RXIMR29,Rx Individual Mask Registers" hexmask.long 0x74 0.--31. 1. "MI,Individual Mask Bits" line.long 0x78 "RXIMR30,Rx Individual Mask Registers" hexmask.long 0x78 0.--31. 1. "MI,Individual Mask Bits" line.long 0x7C "RXIMR31,Rx Individual Mask Registers" hexmask.long 0x7C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" endif sif (cpuis("S32K142*")) tree "CAN0" base ad:0x40024000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0x1FF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x100 "EmbeddedRAM64,Embedded RAM" hexmask.long.byte 0x100 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x100 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x100 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x100 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x104 "EmbeddedRAM65,Embedded RAM" hexmask.long.byte 0x104 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x104 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x104 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x104 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x108 "EmbeddedRAM66,Embedded RAM" hexmask.long.byte 0x108 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x108 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x108 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x108 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10C "EmbeddedRAM67,Embedded RAM" hexmask.long.byte 0x10C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x110 "EmbeddedRAM68,Embedded RAM" hexmask.long.byte 0x110 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x110 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x110 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x110 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x114 "EmbeddedRAM69,Embedded RAM" hexmask.long.byte 0x114 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x114 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x114 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x114 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x118 "EmbeddedRAM70,Embedded RAM" hexmask.long.byte 0x118 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x118 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x118 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x118 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x11C "EmbeddedRAM71,Embedded RAM" hexmask.long.byte 0x11C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x11C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x11C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x11C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x120 "EmbeddedRAM72,Embedded RAM" hexmask.long.byte 0x120 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x120 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x120 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x120 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x124 "EmbeddedRAM73,Embedded RAM" hexmask.long.byte 0x124 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x124 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x124 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x124 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x128 "EmbeddedRAM74,Embedded RAM" hexmask.long.byte 0x128 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x128 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x128 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x128 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x12C "EmbeddedRAM75,Embedded RAM" hexmask.long.byte 0x12C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x12C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x12C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x12C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x130 "EmbeddedRAM76,Embedded RAM" hexmask.long.byte 0x130 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x130 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x130 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x130 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x134 "EmbeddedRAM77,Embedded RAM" hexmask.long.byte 0x134 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x134 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x134 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x134 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x138 "EmbeddedRAM78,Embedded RAM" hexmask.long.byte 0x138 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x138 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x138 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x138 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x13C "EmbeddedRAM79,Embedded RAM" hexmask.long.byte 0x13C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x13C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x13C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x13C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x140 "EmbeddedRAM80,Embedded RAM" hexmask.long.byte 0x140 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x140 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x140 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x140 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x144 "EmbeddedRAM81,Embedded RAM" hexmask.long.byte 0x144 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x144 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x144 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x144 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x148 "EmbeddedRAM82,Embedded RAM" hexmask.long.byte 0x148 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x148 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x148 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x148 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14C "EmbeddedRAM83,Embedded RAM" hexmask.long.byte 0x14C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x150 "EmbeddedRAM84,Embedded RAM" hexmask.long.byte 0x150 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x150 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x150 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x150 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x154 "EmbeddedRAM85,Embedded RAM" hexmask.long.byte 0x154 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x154 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x154 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x154 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x158 "EmbeddedRAM86,Embedded RAM" hexmask.long.byte 0x158 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x158 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x158 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x158 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x15C "EmbeddedRAM87,Embedded RAM" hexmask.long.byte 0x15C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x15C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x15C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x15C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x160 "EmbeddedRAM88,Embedded RAM" hexmask.long.byte 0x160 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x160 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x160 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x160 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x164 "EmbeddedRAM89,Embedded RAM" hexmask.long.byte 0x164 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x164 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x164 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x164 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x168 "EmbeddedRAM90,Embedded RAM" hexmask.long.byte 0x168 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x168 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x168 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x168 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x16C "EmbeddedRAM91,Embedded RAM" hexmask.long.byte 0x16C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x16C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x16C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x16C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x170 "EmbeddedRAM92,Embedded RAM" hexmask.long.byte 0x170 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x170 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x170 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x170 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x174 "EmbeddedRAM93,Embedded RAM" hexmask.long.byte 0x174 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x174 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x174 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x174 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x178 "EmbeddedRAM94,Embedded RAM" hexmask.long.byte 0x178 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x178 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x178 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x178 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x17C "EmbeddedRAM95,Embedded RAM" hexmask.long.byte 0x17C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x17C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x17C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x17C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x180 "EmbeddedRAM96,Embedded RAM" hexmask.long.byte 0x180 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x180 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x180 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x180 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x184 "EmbeddedRAM97,Embedded RAM" hexmask.long.byte 0x184 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x184 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x184 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x184 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x188 "EmbeddedRAM98,Embedded RAM" hexmask.long.byte 0x188 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x188 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x188 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x188 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18C "EmbeddedRAM99,Embedded RAM" hexmask.long.byte 0x18C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x190 "EmbeddedRAM100,Embedded RAM" hexmask.long.byte 0x190 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x190 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x190 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x190 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x194 "EmbeddedRAM101,Embedded RAM" hexmask.long.byte 0x194 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x194 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x194 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x194 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x198 "EmbeddedRAM102,Embedded RAM" hexmask.long.byte 0x198 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x198 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x198 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x198 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x19C "EmbeddedRAM103,Embedded RAM" hexmask.long.byte 0x19C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x19C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x19C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x19C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A0 "EmbeddedRAM104,Embedded RAM" hexmask.long.byte 0x1A0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A4 "EmbeddedRAM105,Embedded RAM" hexmask.long.byte 0x1A4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A8 "EmbeddedRAM106,Embedded RAM" hexmask.long.byte 0x1A8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1AC "EmbeddedRAM107,Embedded RAM" hexmask.long.byte 0x1AC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1AC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1AC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1AC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B0 "EmbeddedRAM108,Embedded RAM" hexmask.long.byte 0x1B0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B4 "EmbeddedRAM109,Embedded RAM" hexmask.long.byte 0x1B4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B8 "EmbeddedRAM110,Embedded RAM" hexmask.long.byte 0x1B8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1BC "EmbeddedRAM111,Embedded RAM" hexmask.long.byte 0x1BC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1BC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1BC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1BC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C0 "EmbeddedRAM112,Embedded RAM" hexmask.long.byte 0x1C0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C4 "EmbeddedRAM113,Embedded RAM" hexmask.long.byte 0x1C4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C8 "EmbeddedRAM114,Embedded RAM" hexmask.long.byte 0x1C8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1CC "EmbeddedRAM115,Embedded RAM" hexmask.long.byte 0x1CC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1CC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1CC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1CC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D0 "EmbeddedRAM116,Embedded RAM" hexmask.long.byte 0x1D0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D4 "EmbeddedRAM117,Embedded RAM" hexmask.long.byte 0x1D4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D8 "EmbeddedRAM118,Embedded RAM" hexmask.long.byte 0x1D8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1DC "EmbeddedRAM119,Embedded RAM" hexmask.long.byte 0x1DC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1DC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1DC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1DC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E0 "EmbeddedRAM120,Embedded RAM" hexmask.long.byte 0x1E0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E4 "EmbeddedRAM121,Embedded RAM" hexmask.long.byte 0x1E4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E8 "EmbeddedRAM122,Embedded RAM" hexmask.long.byte 0x1E8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1EC "EmbeddedRAM123,Embedded RAM" hexmask.long.byte 0x1EC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1EC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1EC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1EC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F0 "EmbeddedRAM124,Embedded RAM" hexmask.long.byte 0x1F0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F4 "EmbeddedRAM125,Embedded RAM" hexmask.long.byte 0x1F4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F8 "EmbeddedRAM126,Embedded RAM" hexmask.long.byte 0x1F8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1FC "EmbeddedRAM127,Embedded RAM" hexmask.long.byte 0x1FC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1FC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1FC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1FC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x7F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x40 "RXIMR16,Rx Individual Mask Registers" hexmask.long 0x40 0.--31. 1. "MI,Individual Mask Bits" line.long 0x44 "RXIMR17,Rx Individual Mask Registers" hexmask.long 0x44 0.--31. 1. "MI,Individual Mask Bits" line.long 0x48 "RXIMR18,Rx Individual Mask Registers" hexmask.long 0x48 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4C "RXIMR19,Rx Individual Mask Registers" hexmask.long 0x4C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x50 "RXIMR20,Rx Individual Mask Registers" hexmask.long 0x50 0.--31. 1. "MI,Individual Mask Bits" line.long 0x54 "RXIMR21,Rx Individual Mask Registers" hexmask.long 0x54 0.--31. 1. "MI,Individual Mask Bits" line.long 0x58 "RXIMR22,Rx Individual Mask Registers" hexmask.long 0x58 0.--31. 1. "MI,Individual Mask Bits" line.long 0x5C "RXIMR23,Rx Individual Mask Registers" hexmask.long 0x5C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x60 "RXIMR24,Rx Individual Mask Registers" hexmask.long 0x60 0.--31. 1. "MI,Individual Mask Bits" line.long 0x64 "RXIMR25,Rx Individual Mask Registers" hexmask.long 0x64 0.--31. 1. "MI,Individual Mask Bits" line.long 0x68 "RXIMR26,Rx Individual Mask Registers" hexmask.long 0x68 0.--31. 1. "MI,Individual Mask Bits" line.long 0x6C "RXIMR27,Rx Individual Mask Registers" hexmask.long 0x6C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x70 "RXIMR28,Rx Individual Mask Registers" hexmask.long 0x70 0.--31. 1. "MI,Individual Mask Bits" line.long 0x74 "RXIMR29,Rx Individual Mask Registers" hexmask.long 0x74 0.--31. 1. "MI,Individual Mask Bits" line.long 0x78 "RXIMR30,Rx Individual Mask Registers" hexmask.long 0x78 0.--31. 1. "MI,Individual Mask Bits" line.long 0x7C "RXIMR31,Rx Individual Mask Registers" hexmask.long 0x7C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end tree "CAN1" base ad:0x40025000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0xFF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x3F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end endif sif (cpuis("S32K144*")) tree "CAN0" base ad:0x40024000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0x1FF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x100 "EmbeddedRAM64,Embedded RAM" hexmask.long.byte 0x100 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x100 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x100 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x100 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x104 "EmbeddedRAM65,Embedded RAM" hexmask.long.byte 0x104 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x104 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x104 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x104 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x108 "EmbeddedRAM66,Embedded RAM" hexmask.long.byte 0x108 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x108 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x108 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x108 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10C "EmbeddedRAM67,Embedded RAM" hexmask.long.byte 0x10C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x110 "EmbeddedRAM68,Embedded RAM" hexmask.long.byte 0x110 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x110 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x110 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x110 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x114 "EmbeddedRAM69,Embedded RAM" hexmask.long.byte 0x114 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x114 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x114 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x114 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x118 "EmbeddedRAM70,Embedded RAM" hexmask.long.byte 0x118 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x118 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x118 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x118 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x11C "EmbeddedRAM71,Embedded RAM" hexmask.long.byte 0x11C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x11C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x11C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x11C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x120 "EmbeddedRAM72,Embedded RAM" hexmask.long.byte 0x120 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x120 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x120 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x120 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x124 "EmbeddedRAM73,Embedded RAM" hexmask.long.byte 0x124 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x124 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x124 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x124 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x128 "EmbeddedRAM74,Embedded RAM" hexmask.long.byte 0x128 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x128 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x128 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x128 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x12C "EmbeddedRAM75,Embedded RAM" hexmask.long.byte 0x12C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x12C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x12C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x12C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x130 "EmbeddedRAM76,Embedded RAM" hexmask.long.byte 0x130 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x130 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x130 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x130 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x134 "EmbeddedRAM77,Embedded RAM" hexmask.long.byte 0x134 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x134 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x134 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x134 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x138 "EmbeddedRAM78,Embedded RAM" hexmask.long.byte 0x138 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x138 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x138 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x138 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x13C "EmbeddedRAM79,Embedded RAM" hexmask.long.byte 0x13C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x13C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x13C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x13C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x140 "EmbeddedRAM80,Embedded RAM" hexmask.long.byte 0x140 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x140 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x140 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x140 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x144 "EmbeddedRAM81,Embedded RAM" hexmask.long.byte 0x144 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x144 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x144 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x144 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x148 "EmbeddedRAM82,Embedded RAM" hexmask.long.byte 0x148 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x148 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x148 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x148 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14C "EmbeddedRAM83,Embedded RAM" hexmask.long.byte 0x14C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x150 "EmbeddedRAM84,Embedded RAM" hexmask.long.byte 0x150 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x150 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x150 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x150 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x154 "EmbeddedRAM85,Embedded RAM" hexmask.long.byte 0x154 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x154 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x154 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x154 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x158 "EmbeddedRAM86,Embedded RAM" hexmask.long.byte 0x158 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x158 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x158 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x158 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x15C "EmbeddedRAM87,Embedded RAM" hexmask.long.byte 0x15C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x15C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x15C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x15C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x160 "EmbeddedRAM88,Embedded RAM" hexmask.long.byte 0x160 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x160 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x160 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x160 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x164 "EmbeddedRAM89,Embedded RAM" hexmask.long.byte 0x164 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x164 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x164 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x164 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x168 "EmbeddedRAM90,Embedded RAM" hexmask.long.byte 0x168 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x168 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x168 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x168 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x16C "EmbeddedRAM91,Embedded RAM" hexmask.long.byte 0x16C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x16C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x16C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x16C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x170 "EmbeddedRAM92,Embedded RAM" hexmask.long.byte 0x170 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x170 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x170 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x170 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x174 "EmbeddedRAM93,Embedded RAM" hexmask.long.byte 0x174 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x174 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x174 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x174 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x178 "EmbeddedRAM94,Embedded RAM" hexmask.long.byte 0x178 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x178 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x178 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x178 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x17C "EmbeddedRAM95,Embedded RAM" hexmask.long.byte 0x17C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x17C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x17C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x17C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x180 "EmbeddedRAM96,Embedded RAM" hexmask.long.byte 0x180 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x180 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x180 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x180 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x184 "EmbeddedRAM97,Embedded RAM" hexmask.long.byte 0x184 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x184 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x184 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x184 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x188 "EmbeddedRAM98,Embedded RAM" hexmask.long.byte 0x188 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x188 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x188 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x188 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18C "EmbeddedRAM99,Embedded RAM" hexmask.long.byte 0x18C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x190 "EmbeddedRAM100,Embedded RAM" hexmask.long.byte 0x190 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x190 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x190 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x190 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x194 "EmbeddedRAM101,Embedded RAM" hexmask.long.byte 0x194 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x194 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x194 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x194 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x198 "EmbeddedRAM102,Embedded RAM" hexmask.long.byte 0x198 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x198 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x198 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x198 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x19C "EmbeddedRAM103,Embedded RAM" hexmask.long.byte 0x19C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x19C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x19C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x19C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A0 "EmbeddedRAM104,Embedded RAM" hexmask.long.byte 0x1A0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A4 "EmbeddedRAM105,Embedded RAM" hexmask.long.byte 0x1A4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A8 "EmbeddedRAM106,Embedded RAM" hexmask.long.byte 0x1A8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1AC "EmbeddedRAM107,Embedded RAM" hexmask.long.byte 0x1AC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1AC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1AC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1AC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B0 "EmbeddedRAM108,Embedded RAM" hexmask.long.byte 0x1B0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B4 "EmbeddedRAM109,Embedded RAM" hexmask.long.byte 0x1B4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B8 "EmbeddedRAM110,Embedded RAM" hexmask.long.byte 0x1B8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1BC "EmbeddedRAM111,Embedded RAM" hexmask.long.byte 0x1BC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1BC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1BC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1BC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C0 "EmbeddedRAM112,Embedded RAM" hexmask.long.byte 0x1C0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C4 "EmbeddedRAM113,Embedded RAM" hexmask.long.byte 0x1C4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C8 "EmbeddedRAM114,Embedded RAM" hexmask.long.byte 0x1C8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1CC "EmbeddedRAM115,Embedded RAM" hexmask.long.byte 0x1CC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1CC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1CC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1CC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D0 "EmbeddedRAM116,Embedded RAM" hexmask.long.byte 0x1D0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D4 "EmbeddedRAM117,Embedded RAM" hexmask.long.byte 0x1D4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D8 "EmbeddedRAM118,Embedded RAM" hexmask.long.byte 0x1D8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1DC "EmbeddedRAM119,Embedded RAM" hexmask.long.byte 0x1DC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1DC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1DC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1DC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E0 "EmbeddedRAM120,Embedded RAM" hexmask.long.byte 0x1E0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E4 "EmbeddedRAM121,Embedded RAM" hexmask.long.byte 0x1E4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E8 "EmbeddedRAM122,Embedded RAM" hexmask.long.byte 0x1E8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1EC "EmbeddedRAM123,Embedded RAM" hexmask.long.byte 0x1EC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1EC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1EC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1EC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F0 "EmbeddedRAM124,Embedded RAM" hexmask.long.byte 0x1F0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F4 "EmbeddedRAM125,Embedded RAM" hexmask.long.byte 0x1F4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F8 "EmbeddedRAM126,Embedded RAM" hexmask.long.byte 0x1F8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1FC "EmbeddedRAM127,Embedded RAM" hexmask.long.byte 0x1FC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1FC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1FC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1FC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x7F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x40 "RXIMR16,Rx Individual Mask Registers" hexmask.long 0x40 0.--31. 1. "MI,Individual Mask Bits" line.long 0x44 "RXIMR17,Rx Individual Mask Registers" hexmask.long 0x44 0.--31. 1. "MI,Individual Mask Bits" line.long 0x48 "RXIMR18,Rx Individual Mask Registers" hexmask.long 0x48 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4C "RXIMR19,Rx Individual Mask Registers" hexmask.long 0x4C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x50 "RXIMR20,Rx Individual Mask Registers" hexmask.long 0x50 0.--31. 1. "MI,Individual Mask Bits" line.long 0x54 "RXIMR21,Rx Individual Mask Registers" hexmask.long 0x54 0.--31. 1. "MI,Individual Mask Bits" line.long 0x58 "RXIMR22,Rx Individual Mask Registers" hexmask.long 0x58 0.--31. 1. "MI,Individual Mask Bits" line.long 0x5C "RXIMR23,Rx Individual Mask Registers" hexmask.long 0x5C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x60 "RXIMR24,Rx Individual Mask Registers" hexmask.long 0x60 0.--31. 1. "MI,Individual Mask Bits" line.long 0x64 "RXIMR25,Rx Individual Mask Registers" hexmask.long 0x64 0.--31. 1. "MI,Individual Mask Bits" line.long 0x68 "RXIMR26,Rx Individual Mask Registers" hexmask.long 0x68 0.--31. 1. "MI,Individual Mask Bits" line.long 0x6C "RXIMR27,Rx Individual Mask Registers" hexmask.long 0x6C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x70 "RXIMR28,Rx Individual Mask Registers" hexmask.long 0x70 0.--31. 1. "MI,Individual Mask Bits" line.long 0x74 "RXIMR29,Rx Individual Mask Registers" hexmask.long 0x74 0.--31. 1. "MI,Individual Mask Bits" line.long 0x78 "RXIMR30,Rx Individual Mask Registers" hexmask.long 0x78 0.--31. 1. "MI,Individual Mask Bits" line.long 0x7C "RXIMR31,Rx Individual Mask Registers" hexmask.long 0x7C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end tree "CAN1" base ad:0x40025000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0xFF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x3F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end tree "CAN2" base ad:0x4002B000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0xFF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x3F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end endif sif (cpuis("S32K146*")) tree "CAN0" base ad:0x40024000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0x1FF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x100 "EmbeddedRAM64,Embedded RAM" hexmask.long.byte 0x100 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x100 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x100 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x100 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x104 "EmbeddedRAM65,Embedded RAM" hexmask.long.byte 0x104 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x104 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x104 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x104 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x108 "EmbeddedRAM66,Embedded RAM" hexmask.long.byte 0x108 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x108 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x108 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x108 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10C "EmbeddedRAM67,Embedded RAM" hexmask.long.byte 0x10C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x110 "EmbeddedRAM68,Embedded RAM" hexmask.long.byte 0x110 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x110 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x110 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x110 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x114 "EmbeddedRAM69,Embedded RAM" hexmask.long.byte 0x114 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x114 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x114 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x114 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x118 "EmbeddedRAM70,Embedded RAM" hexmask.long.byte 0x118 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x118 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x118 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x118 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x11C "EmbeddedRAM71,Embedded RAM" hexmask.long.byte 0x11C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x11C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x11C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x11C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x120 "EmbeddedRAM72,Embedded RAM" hexmask.long.byte 0x120 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x120 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x120 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x120 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x124 "EmbeddedRAM73,Embedded RAM" hexmask.long.byte 0x124 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x124 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x124 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x124 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x128 "EmbeddedRAM74,Embedded RAM" hexmask.long.byte 0x128 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x128 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x128 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x128 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x12C "EmbeddedRAM75,Embedded RAM" hexmask.long.byte 0x12C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x12C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x12C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x12C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x130 "EmbeddedRAM76,Embedded RAM" hexmask.long.byte 0x130 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x130 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x130 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x130 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x134 "EmbeddedRAM77,Embedded RAM" hexmask.long.byte 0x134 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x134 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x134 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x134 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x138 "EmbeddedRAM78,Embedded RAM" hexmask.long.byte 0x138 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x138 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x138 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x138 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x13C "EmbeddedRAM79,Embedded RAM" hexmask.long.byte 0x13C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x13C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x13C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x13C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x140 "EmbeddedRAM80,Embedded RAM" hexmask.long.byte 0x140 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x140 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x140 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x140 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x144 "EmbeddedRAM81,Embedded RAM" hexmask.long.byte 0x144 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x144 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x144 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x144 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x148 "EmbeddedRAM82,Embedded RAM" hexmask.long.byte 0x148 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x148 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x148 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x148 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14C "EmbeddedRAM83,Embedded RAM" hexmask.long.byte 0x14C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x150 "EmbeddedRAM84,Embedded RAM" hexmask.long.byte 0x150 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x150 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x150 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x150 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x154 "EmbeddedRAM85,Embedded RAM" hexmask.long.byte 0x154 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x154 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x154 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x154 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x158 "EmbeddedRAM86,Embedded RAM" hexmask.long.byte 0x158 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x158 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x158 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x158 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x15C "EmbeddedRAM87,Embedded RAM" hexmask.long.byte 0x15C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x15C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x15C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x15C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x160 "EmbeddedRAM88,Embedded RAM" hexmask.long.byte 0x160 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x160 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x160 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x160 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x164 "EmbeddedRAM89,Embedded RAM" hexmask.long.byte 0x164 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x164 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x164 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x164 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x168 "EmbeddedRAM90,Embedded RAM" hexmask.long.byte 0x168 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x168 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x168 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x168 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x16C "EmbeddedRAM91,Embedded RAM" hexmask.long.byte 0x16C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x16C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x16C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x16C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x170 "EmbeddedRAM92,Embedded RAM" hexmask.long.byte 0x170 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x170 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x170 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x170 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x174 "EmbeddedRAM93,Embedded RAM" hexmask.long.byte 0x174 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x174 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x174 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x174 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x178 "EmbeddedRAM94,Embedded RAM" hexmask.long.byte 0x178 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x178 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x178 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x178 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x17C "EmbeddedRAM95,Embedded RAM" hexmask.long.byte 0x17C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x17C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x17C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x17C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x180 "EmbeddedRAM96,Embedded RAM" hexmask.long.byte 0x180 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x180 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x180 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x180 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x184 "EmbeddedRAM97,Embedded RAM" hexmask.long.byte 0x184 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x184 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x184 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x184 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x188 "EmbeddedRAM98,Embedded RAM" hexmask.long.byte 0x188 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x188 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x188 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x188 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18C "EmbeddedRAM99,Embedded RAM" hexmask.long.byte 0x18C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x190 "EmbeddedRAM100,Embedded RAM" hexmask.long.byte 0x190 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x190 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x190 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x190 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x194 "EmbeddedRAM101,Embedded RAM" hexmask.long.byte 0x194 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x194 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x194 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x194 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x198 "EmbeddedRAM102,Embedded RAM" hexmask.long.byte 0x198 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x198 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x198 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x198 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x19C "EmbeddedRAM103,Embedded RAM" hexmask.long.byte 0x19C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x19C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x19C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x19C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A0 "EmbeddedRAM104,Embedded RAM" hexmask.long.byte 0x1A0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A4 "EmbeddedRAM105,Embedded RAM" hexmask.long.byte 0x1A4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A8 "EmbeddedRAM106,Embedded RAM" hexmask.long.byte 0x1A8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1AC "EmbeddedRAM107,Embedded RAM" hexmask.long.byte 0x1AC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1AC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1AC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1AC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B0 "EmbeddedRAM108,Embedded RAM" hexmask.long.byte 0x1B0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B4 "EmbeddedRAM109,Embedded RAM" hexmask.long.byte 0x1B4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B8 "EmbeddedRAM110,Embedded RAM" hexmask.long.byte 0x1B8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1BC "EmbeddedRAM111,Embedded RAM" hexmask.long.byte 0x1BC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1BC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1BC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1BC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C0 "EmbeddedRAM112,Embedded RAM" hexmask.long.byte 0x1C0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C4 "EmbeddedRAM113,Embedded RAM" hexmask.long.byte 0x1C4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C8 "EmbeddedRAM114,Embedded RAM" hexmask.long.byte 0x1C8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1CC "EmbeddedRAM115,Embedded RAM" hexmask.long.byte 0x1CC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1CC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1CC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1CC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D0 "EmbeddedRAM116,Embedded RAM" hexmask.long.byte 0x1D0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D4 "EmbeddedRAM117,Embedded RAM" hexmask.long.byte 0x1D4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D8 "EmbeddedRAM118,Embedded RAM" hexmask.long.byte 0x1D8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1DC "EmbeddedRAM119,Embedded RAM" hexmask.long.byte 0x1DC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1DC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1DC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1DC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E0 "EmbeddedRAM120,Embedded RAM" hexmask.long.byte 0x1E0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E4 "EmbeddedRAM121,Embedded RAM" hexmask.long.byte 0x1E4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E8 "EmbeddedRAM122,Embedded RAM" hexmask.long.byte 0x1E8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1EC "EmbeddedRAM123,Embedded RAM" hexmask.long.byte 0x1EC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1EC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1EC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1EC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F0 "EmbeddedRAM124,Embedded RAM" hexmask.long.byte 0x1F0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F4 "EmbeddedRAM125,Embedded RAM" hexmask.long.byte 0x1F4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F8 "EmbeddedRAM126,Embedded RAM" hexmask.long.byte 0x1F8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1FC "EmbeddedRAM127,Embedded RAM" hexmask.long.byte 0x1FC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1FC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1FC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1FC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x7F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x40 "RXIMR16,Rx Individual Mask Registers" hexmask.long 0x40 0.--31. 1. "MI,Individual Mask Bits" line.long 0x44 "RXIMR17,Rx Individual Mask Registers" hexmask.long 0x44 0.--31. 1. "MI,Individual Mask Bits" line.long 0x48 "RXIMR18,Rx Individual Mask Registers" hexmask.long 0x48 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4C "RXIMR19,Rx Individual Mask Registers" hexmask.long 0x4C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x50 "RXIMR20,Rx Individual Mask Registers" hexmask.long 0x50 0.--31. 1. "MI,Individual Mask Bits" line.long 0x54 "RXIMR21,Rx Individual Mask Registers" hexmask.long 0x54 0.--31. 1. "MI,Individual Mask Bits" line.long 0x58 "RXIMR22,Rx Individual Mask Registers" hexmask.long 0x58 0.--31. 1. "MI,Individual Mask Bits" line.long 0x5C "RXIMR23,Rx Individual Mask Registers" hexmask.long 0x5C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x60 "RXIMR24,Rx Individual Mask Registers" hexmask.long 0x60 0.--31. 1. "MI,Individual Mask Bits" line.long 0x64 "RXIMR25,Rx Individual Mask Registers" hexmask.long 0x64 0.--31. 1. "MI,Individual Mask Bits" line.long 0x68 "RXIMR26,Rx Individual Mask Registers" hexmask.long 0x68 0.--31. 1. "MI,Individual Mask Bits" line.long 0x6C "RXIMR27,Rx Individual Mask Registers" hexmask.long 0x6C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x70 "RXIMR28,Rx Individual Mask Registers" hexmask.long 0x70 0.--31. 1. "MI,Individual Mask Bits" line.long 0x74 "RXIMR29,Rx Individual Mask Registers" hexmask.long 0x74 0.--31. 1. "MI,Individual Mask Bits" line.long 0x78 "RXIMR30,Rx Individual Mask Registers" hexmask.long 0x78 0.--31. 1. "MI,Individual Mask Bits" line.long 0x7C "RXIMR31,Rx Individual Mask Registers" hexmask.long 0x7C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end tree "CAN1" base ad:0x40025000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0x1FF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x100 "EmbeddedRAM64,Embedded RAM" hexmask.long.byte 0x100 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x100 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x100 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x100 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x104 "EmbeddedRAM65,Embedded RAM" hexmask.long.byte 0x104 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x104 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x104 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x104 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x108 "EmbeddedRAM66,Embedded RAM" hexmask.long.byte 0x108 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x108 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x108 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x108 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10C "EmbeddedRAM67,Embedded RAM" hexmask.long.byte 0x10C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x110 "EmbeddedRAM68,Embedded RAM" hexmask.long.byte 0x110 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x110 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x110 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x110 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x114 "EmbeddedRAM69,Embedded RAM" hexmask.long.byte 0x114 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x114 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x114 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x114 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x118 "EmbeddedRAM70,Embedded RAM" hexmask.long.byte 0x118 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x118 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x118 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x118 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x11C "EmbeddedRAM71,Embedded RAM" hexmask.long.byte 0x11C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x11C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x11C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x11C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x120 "EmbeddedRAM72,Embedded RAM" hexmask.long.byte 0x120 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x120 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x120 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x120 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x124 "EmbeddedRAM73,Embedded RAM" hexmask.long.byte 0x124 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x124 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x124 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x124 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x128 "EmbeddedRAM74,Embedded RAM" hexmask.long.byte 0x128 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x128 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x128 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x128 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x12C "EmbeddedRAM75,Embedded RAM" hexmask.long.byte 0x12C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x12C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x12C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x12C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x130 "EmbeddedRAM76,Embedded RAM" hexmask.long.byte 0x130 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x130 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x130 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x130 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x134 "EmbeddedRAM77,Embedded RAM" hexmask.long.byte 0x134 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x134 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x134 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x134 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x138 "EmbeddedRAM78,Embedded RAM" hexmask.long.byte 0x138 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x138 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x138 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x138 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x13C "EmbeddedRAM79,Embedded RAM" hexmask.long.byte 0x13C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x13C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x13C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x13C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x140 "EmbeddedRAM80,Embedded RAM" hexmask.long.byte 0x140 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x140 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x140 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x140 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x144 "EmbeddedRAM81,Embedded RAM" hexmask.long.byte 0x144 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x144 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x144 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x144 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x148 "EmbeddedRAM82,Embedded RAM" hexmask.long.byte 0x148 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x148 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x148 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x148 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14C "EmbeddedRAM83,Embedded RAM" hexmask.long.byte 0x14C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x150 "EmbeddedRAM84,Embedded RAM" hexmask.long.byte 0x150 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x150 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x150 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x150 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x154 "EmbeddedRAM85,Embedded RAM" hexmask.long.byte 0x154 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x154 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x154 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x154 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x158 "EmbeddedRAM86,Embedded RAM" hexmask.long.byte 0x158 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x158 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x158 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x158 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x15C "EmbeddedRAM87,Embedded RAM" hexmask.long.byte 0x15C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x15C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x15C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x15C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x160 "EmbeddedRAM88,Embedded RAM" hexmask.long.byte 0x160 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x160 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x160 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x160 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x164 "EmbeddedRAM89,Embedded RAM" hexmask.long.byte 0x164 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x164 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x164 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x164 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x168 "EmbeddedRAM90,Embedded RAM" hexmask.long.byte 0x168 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x168 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x168 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x168 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x16C "EmbeddedRAM91,Embedded RAM" hexmask.long.byte 0x16C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x16C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x16C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x16C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x170 "EmbeddedRAM92,Embedded RAM" hexmask.long.byte 0x170 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x170 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x170 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x170 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x174 "EmbeddedRAM93,Embedded RAM" hexmask.long.byte 0x174 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x174 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x174 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x174 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x178 "EmbeddedRAM94,Embedded RAM" hexmask.long.byte 0x178 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x178 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x178 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x178 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x17C "EmbeddedRAM95,Embedded RAM" hexmask.long.byte 0x17C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x17C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x17C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x17C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x180 "EmbeddedRAM96,Embedded RAM" hexmask.long.byte 0x180 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x180 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x180 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x180 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x184 "EmbeddedRAM97,Embedded RAM" hexmask.long.byte 0x184 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x184 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x184 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x184 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x188 "EmbeddedRAM98,Embedded RAM" hexmask.long.byte 0x188 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x188 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x188 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x188 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18C "EmbeddedRAM99,Embedded RAM" hexmask.long.byte 0x18C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x190 "EmbeddedRAM100,Embedded RAM" hexmask.long.byte 0x190 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x190 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x190 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x190 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x194 "EmbeddedRAM101,Embedded RAM" hexmask.long.byte 0x194 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x194 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x194 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x194 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x198 "EmbeddedRAM102,Embedded RAM" hexmask.long.byte 0x198 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x198 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x198 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x198 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x19C "EmbeddedRAM103,Embedded RAM" hexmask.long.byte 0x19C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x19C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x19C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x19C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A0 "EmbeddedRAM104,Embedded RAM" hexmask.long.byte 0x1A0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A4 "EmbeddedRAM105,Embedded RAM" hexmask.long.byte 0x1A4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A8 "EmbeddedRAM106,Embedded RAM" hexmask.long.byte 0x1A8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1AC "EmbeddedRAM107,Embedded RAM" hexmask.long.byte 0x1AC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1AC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1AC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1AC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B0 "EmbeddedRAM108,Embedded RAM" hexmask.long.byte 0x1B0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B4 "EmbeddedRAM109,Embedded RAM" hexmask.long.byte 0x1B4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B8 "EmbeddedRAM110,Embedded RAM" hexmask.long.byte 0x1B8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1BC "EmbeddedRAM111,Embedded RAM" hexmask.long.byte 0x1BC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1BC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1BC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1BC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C0 "EmbeddedRAM112,Embedded RAM" hexmask.long.byte 0x1C0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C4 "EmbeddedRAM113,Embedded RAM" hexmask.long.byte 0x1C4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C8 "EmbeddedRAM114,Embedded RAM" hexmask.long.byte 0x1C8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1CC "EmbeddedRAM115,Embedded RAM" hexmask.long.byte 0x1CC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1CC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1CC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1CC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D0 "EmbeddedRAM116,Embedded RAM" hexmask.long.byte 0x1D0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D4 "EmbeddedRAM117,Embedded RAM" hexmask.long.byte 0x1D4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D8 "EmbeddedRAM118,Embedded RAM" hexmask.long.byte 0x1D8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1DC "EmbeddedRAM119,Embedded RAM" hexmask.long.byte 0x1DC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1DC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1DC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1DC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E0 "EmbeddedRAM120,Embedded RAM" hexmask.long.byte 0x1E0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E4 "EmbeddedRAM121,Embedded RAM" hexmask.long.byte 0x1E4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E8 "EmbeddedRAM122,Embedded RAM" hexmask.long.byte 0x1E8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1EC "EmbeddedRAM123,Embedded RAM" hexmask.long.byte 0x1EC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1EC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1EC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1EC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F0 "EmbeddedRAM124,Embedded RAM" hexmask.long.byte 0x1F0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F4 "EmbeddedRAM125,Embedded RAM" hexmask.long.byte 0x1F4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F8 "EmbeddedRAM126,Embedded RAM" hexmask.long.byte 0x1F8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1FC "EmbeddedRAM127,Embedded RAM" hexmask.long.byte 0x1FC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1FC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1FC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1FC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x7F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x40 "RXIMR16,Rx Individual Mask Registers" hexmask.long 0x40 0.--31. 1. "MI,Individual Mask Bits" line.long 0x44 "RXIMR17,Rx Individual Mask Registers" hexmask.long 0x44 0.--31. 1. "MI,Individual Mask Bits" line.long 0x48 "RXIMR18,Rx Individual Mask Registers" hexmask.long 0x48 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4C "RXIMR19,Rx Individual Mask Registers" hexmask.long 0x4C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x50 "RXIMR20,Rx Individual Mask Registers" hexmask.long 0x50 0.--31. 1. "MI,Individual Mask Bits" line.long 0x54 "RXIMR21,Rx Individual Mask Registers" hexmask.long 0x54 0.--31. 1. "MI,Individual Mask Bits" line.long 0x58 "RXIMR22,Rx Individual Mask Registers" hexmask.long 0x58 0.--31. 1. "MI,Individual Mask Bits" line.long 0x5C "RXIMR23,Rx Individual Mask Registers" hexmask.long 0x5C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x60 "RXIMR24,Rx Individual Mask Registers" hexmask.long 0x60 0.--31. 1. "MI,Individual Mask Bits" line.long 0x64 "RXIMR25,Rx Individual Mask Registers" hexmask.long 0x64 0.--31. 1. "MI,Individual Mask Bits" line.long 0x68 "RXIMR26,Rx Individual Mask Registers" hexmask.long 0x68 0.--31. 1. "MI,Individual Mask Bits" line.long 0x6C "RXIMR27,Rx Individual Mask Registers" hexmask.long 0x6C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x70 "RXIMR28,Rx Individual Mask Registers" hexmask.long 0x70 0.--31. 1. "MI,Individual Mask Bits" line.long 0x74 "RXIMR29,Rx Individual Mask Registers" hexmask.long 0x74 0.--31. 1. "MI,Individual Mask Bits" line.long 0x78 "RXIMR30,Rx Individual Mask Registers" hexmask.long 0x78 0.--31. 1. "MI,Individual Mask Bits" line.long 0x7C "RXIMR31,Rx Individual Mask Registers" hexmask.long 0x7C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end tree "CAN2" base ad:0x4002B000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0xFF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x3F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end endif sif (cpuis("S32K148*")) tree "CAN0" base ad:0x40024000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0x1FF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x100 "EmbeddedRAM64,Embedded RAM" hexmask.long.byte 0x100 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x100 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x100 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x100 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x104 "EmbeddedRAM65,Embedded RAM" hexmask.long.byte 0x104 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x104 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x104 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x104 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x108 "EmbeddedRAM66,Embedded RAM" hexmask.long.byte 0x108 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x108 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x108 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x108 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10C "EmbeddedRAM67,Embedded RAM" hexmask.long.byte 0x10C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x110 "EmbeddedRAM68,Embedded RAM" hexmask.long.byte 0x110 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x110 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x110 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x110 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x114 "EmbeddedRAM69,Embedded RAM" hexmask.long.byte 0x114 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x114 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x114 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x114 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x118 "EmbeddedRAM70,Embedded RAM" hexmask.long.byte 0x118 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x118 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x118 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x118 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x11C "EmbeddedRAM71,Embedded RAM" hexmask.long.byte 0x11C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x11C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x11C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x11C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x120 "EmbeddedRAM72,Embedded RAM" hexmask.long.byte 0x120 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x120 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x120 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x120 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x124 "EmbeddedRAM73,Embedded RAM" hexmask.long.byte 0x124 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x124 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x124 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x124 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x128 "EmbeddedRAM74,Embedded RAM" hexmask.long.byte 0x128 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x128 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x128 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x128 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x12C "EmbeddedRAM75,Embedded RAM" hexmask.long.byte 0x12C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x12C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x12C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x12C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x130 "EmbeddedRAM76,Embedded RAM" hexmask.long.byte 0x130 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x130 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x130 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x130 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x134 "EmbeddedRAM77,Embedded RAM" hexmask.long.byte 0x134 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x134 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x134 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x134 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x138 "EmbeddedRAM78,Embedded RAM" hexmask.long.byte 0x138 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x138 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x138 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x138 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x13C "EmbeddedRAM79,Embedded RAM" hexmask.long.byte 0x13C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x13C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x13C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x13C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x140 "EmbeddedRAM80,Embedded RAM" hexmask.long.byte 0x140 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x140 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x140 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x140 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x144 "EmbeddedRAM81,Embedded RAM" hexmask.long.byte 0x144 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x144 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x144 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x144 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x148 "EmbeddedRAM82,Embedded RAM" hexmask.long.byte 0x148 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x148 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x148 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x148 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14C "EmbeddedRAM83,Embedded RAM" hexmask.long.byte 0x14C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x150 "EmbeddedRAM84,Embedded RAM" hexmask.long.byte 0x150 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x150 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x150 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x150 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x154 "EmbeddedRAM85,Embedded RAM" hexmask.long.byte 0x154 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x154 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x154 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x154 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x158 "EmbeddedRAM86,Embedded RAM" hexmask.long.byte 0x158 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x158 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x158 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x158 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x15C "EmbeddedRAM87,Embedded RAM" hexmask.long.byte 0x15C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x15C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x15C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x15C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x160 "EmbeddedRAM88,Embedded RAM" hexmask.long.byte 0x160 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x160 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x160 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x160 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x164 "EmbeddedRAM89,Embedded RAM" hexmask.long.byte 0x164 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x164 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x164 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x164 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x168 "EmbeddedRAM90,Embedded RAM" hexmask.long.byte 0x168 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x168 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x168 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x168 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x16C "EmbeddedRAM91,Embedded RAM" hexmask.long.byte 0x16C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x16C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x16C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x16C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x170 "EmbeddedRAM92,Embedded RAM" hexmask.long.byte 0x170 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x170 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x170 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x170 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x174 "EmbeddedRAM93,Embedded RAM" hexmask.long.byte 0x174 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x174 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x174 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x174 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x178 "EmbeddedRAM94,Embedded RAM" hexmask.long.byte 0x178 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x178 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x178 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x178 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x17C "EmbeddedRAM95,Embedded RAM" hexmask.long.byte 0x17C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x17C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x17C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x17C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x180 "EmbeddedRAM96,Embedded RAM" hexmask.long.byte 0x180 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x180 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x180 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x180 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x184 "EmbeddedRAM97,Embedded RAM" hexmask.long.byte 0x184 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x184 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x184 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x184 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x188 "EmbeddedRAM98,Embedded RAM" hexmask.long.byte 0x188 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x188 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x188 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x188 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18C "EmbeddedRAM99,Embedded RAM" hexmask.long.byte 0x18C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x190 "EmbeddedRAM100,Embedded RAM" hexmask.long.byte 0x190 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x190 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x190 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x190 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x194 "EmbeddedRAM101,Embedded RAM" hexmask.long.byte 0x194 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x194 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x194 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x194 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x198 "EmbeddedRAM102,Embedded RAM" hexmask.long.byte 0x198 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x198 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x198 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x198 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x19C "EmbeddedRAM103,Embedded RAM" hexmask.long.byte 0x19C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x19C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x19C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x19C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A0 "EmbeddedRAM104,Embedded RAM" hexmask.long.byte 0x1A0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A4 "EmbeddedRAM105,Embedded RAM" hexmask.long.byte 0x1A4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A8 "EmbeddedRAM106,Embedded RAM" hexmask.long.byte 0x1A8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1AC "EmbeddedRAM107,Embedded RAM" hexmask.long.byte 0x1AC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1AC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1AC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1AC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B0 "EmbeddedRAM108,Embedded RAM" hexmask.long.byte 0x1B0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B4 "EmbeddedRAM109,Embedded RAM" hexmask.long.byte 0x1B4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B8 "EmbeddedRAM110,Embedded RAM" hexmask.long.byte 0x1B8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1BC "EmbeddedRAM111,Embedded RAM" hexmask.long.byte 0x1BC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1BC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1BC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1BC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C0 "EmbeddedRAM112,Embedded RAM" hexmask.long.byte 0x1C0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C4 "EmbeddedRAM113,Embedded RAM" hexmask.long.byte 0x1C4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C8 "EmbeddedRAM114,Embedded RAM" hexmask.long.byte 0x1C8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1CC "EmbeddedRAM115,Embedded RAM" hexmask.long.byte 0x1CC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1CC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1CC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1CC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D0 "EmbeddedRAM116,Embedded RAM" hexmask.long.byte 0x1D0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D4 "EmbeddedRAM117,Embedded RAM" hexmask.long.byte 0x1D4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D8 "EmbeddedRAM118,Embedded RAM" hexmask.long.byte 0x1D8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1DC "EmbeddedRAM119,Embedded RAM" hexmask.long.byte 0x1DC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1DC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1DC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1DC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E0 "EmbeddedRAM120,Embedded RAM" hexmask.long.byte 0x1E0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E4 "EmbeddedRAM121,Embedded RAM" hexmask.long.byte 0x1E4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E8 "EmbeddedRAM122,Embedded RAM" hexmask.long.byte 0x1E8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1EC "EmbeddedRAM123,Embedded RAM" hexmask.long.byte 0x1EC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1EC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1EC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1EC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F0 "EmbeddedRAM124,Embedded RAM" hexmask.long.byte 0x1F0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F4 "EmbeddedRAM125,Embedded RAM" hexmask.long.byte 0x1F4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F8 "EmbeddedRAM126,Embedded RAM" hexmask.long.byte 0x1F8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1FC "EmbeddedRAM127,Embedded RAM" hexmask.long.byte 0x1FC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1FC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1FC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1FC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x7F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x40 "RXIMR16,Rx Individual Mask Registers" hexmask.long 0x40 0.--31. 1. "MI,Individual Mask Bits" line.long 0x44 "RXIMR17,Rx Individual Mask Registers" hexmask.long 0x44 0.--31. 1. "MI,Individual Mask Bits" line.long 0x48 "RXIMR18,Rx Individual Mask Registers" hexmask.long 0x48 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4C "RXIMR19,Rx Individual Mask Registers" hexmask.long 0x4C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x50 "RXIMR20,Rx Individual Mask Registers" hexmask.long 0x50 0.--31. 1. "MI,Individual Mask Bits" line.long 0x54 "RXIMR21,Rx Individual Mask Registers" hexmask.long 0x54 0.--31. 1. "MI,Individual Mask Bits" line.long 0x58 "RXIMR22,Rx Individual Mask Registers" hexmask.long 0x58 0.--31. 1. "MI,Individual Mask Bits" line.long 0x5C "RXIMR23,Rx Individual Mask Registers" hexmask.long 0x5C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x60 "RXIMR24,Rx Individual Mask Registers" hexmask.long 0x60 0.--31. 1. "MI,Individual Mask Bits" line.long 0x64 "RXIMR25,Rx Individual Mask Registers" hexmask.long 0x64 0.--31. 1. "MI,Individual Mask Bits" line.long 0x68 "RXIMR26,Rx Individual Mask Registers" hexmask.long 0x68 0.--31. 1. "MI,Individual Mask Bits" line.long 0x6C "RXIMR27,Rx Individual Mask Registers" hexmask.long 0x6C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x70 "RXIMR28,Rx Individual Mask Registers" hexmask.long 0x70 0.--31. 1. "MI,Individual Mask Bits" line.long 0x74 "RXIMR29,Rx Individual Mask Registers" hexmask.long 0x74 0.--31. 1. "MI,Individual Mask Bits" line.long 0x78 "RXIMR30,Rx Individual Mask Registers" hexmask.long 0x78 0.--31. 1. "MI,Individual Mask Bits" line.long 0x7C "RXIMR31,Rx Individual Mask Registers" hexmask.long 0x7C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end tree "CAN1" base ad:0x40025000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0x1FF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x100 "EmbeddedRAM64,Embedded RAM" hexmask.long.byte 0x100 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x100 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x100 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x100 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x104 "EmbeddedRAM65,Embedded RAM" hexmask.long.byte 0x104 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x104 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x104 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x104 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x108 "EmbeddedRAM66,Embedded RAM" hexmask.long.byte 0x108 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x108 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x108 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x108 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10C "EmbeddedRAM67,Embedded RAM" hexmask.long.byte 0x10C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x110 "EmbeddedRAM68,Embedded RAM" hexmask.long.byte 0x110 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x110 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x110 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x110 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x114 "EmbeddedRAM69,Embedded RAM" hexmask.long.byte 0x114 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x114 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x114 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x114 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x118 "EmbeddedRAM70,Embedded RAM" hexmask.long.byte 0x118 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x118 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x118 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x118 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x11C "EmbeddedRAM71,Embedded RAM" hexmask.long.byte 0x11C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x11C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x11C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x11C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x120 "EmbeddedRAM72,Embedded RAM" hexmask.long.byte 0x120 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x120 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x120 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x120 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x124 "EmbeddedRAM73,Embedded RAM" hexmask.long.byte 0x124 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x124 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x124 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x124 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x128 "EmbeddedRAM74,Embedded RAM" hexmask.long.byte 0x128 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x128 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x128 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x128 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x12C "EmbeddedRAM75,Embedded RAM" hexmask.long.byte 0x12C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x12C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x12C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x12C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x130 "EmbeddedRAM76,Embedded RAM" hexmask.long.byte 0x130 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x130 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x130 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x130 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x134 "EmbeddedRAM77,Embedded RAM" hexmask.long.byte 0x134 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x134 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x134 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x134 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x138 "EmbeddedRAM78,Embedded RAM" hexmask.long.byte 0x138 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x138 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x138 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x138 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x13C "EmbeddedRAM79,Embedded RAM" hexmask.long.byte 0x13C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x13C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x13C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x13C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x140 "EmbeddedRAM80,Embedded RAM" hexmask.long.byte 0x140 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x140 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x140 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x140 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x144 "EmbeddedRAM81,Embedded RAM" hexmask.long.byte 0x144 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x144 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x144 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x144 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x148 "EmbeddedRAM82,Embedded RAM" hexmask.long.byte 0x148 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x148 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x148 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x148 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14C "EmbeddedRAM83,Embedded RAM" hexmask.long.byte 0x14C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x150 "EmbeddedRAM84,Embedded RAM" hexmask.long.byte 0x150 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x150 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x150 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x150 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x154 "EmbeddedRAM85,Embedded RAM" hexmask.long.byte 0x154 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x154 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x154 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x154 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x158 "EmbeddedRAM86,Embedded RAM" hexmask.long.byte 0x158 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x158 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x158 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x158 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x15C "EmbeddedRAM87,Embedded RAM" hexmask.long.byte 0x15C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x15C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x15C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x15C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x160 "EmbeddedRAM88,Embedded RAM" hexmask.long.byte 0x160 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x160 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x160 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x160 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x164 "EmbeddedRAM89,Embedded RAM" hexmask.long.byte 0x164 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x164 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x164 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x164 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x168 "EmbeddedRAM90,Embedded RAM" hexmask.long.byte 0x168 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x168 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x168 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x168 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x16C "EmbeddedRAM91,Embedded RAM" hexmask.long.byte 0x16C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x16C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x16C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x16C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x170 "EmbeddedRAM92,Embedded RAM" hexmask.long.byte 0x170 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x170 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x170 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x170 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x174 "EmbeddedRAM93,Embedded RAM" hexmask.long.byte 0x174 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x174 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x174 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x174 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x178 "EmbeddedRAM94,Embedded RAM" hexmask.long.byte 0x178 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x178 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x178 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x178 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x17C "EmbeddedRAM95,Embedded RAM" hexmask.long.byte 0x17C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x17C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x17C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x17C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x180 "EmbeddedRAM96,Embedded RAM" hexmask.long.byte 0x180 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x180 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x180 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x180 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x184 "EmbeddedRAM97,Embedded RAM" hexmask.long.byte 0x184 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x184 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x184 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x184 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x188 "EmbeddedRAM98,Embedded RAM" hexmask.long.byte 0x188 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x188 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x188 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x188 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18C "EmbeddedRAM99,Embedded RAM" hexmask.long.byte 0x18C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x190 "EmbeddedRAM100,Embedded RAM" hexmask.long.byte 0x190 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x190 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x190 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x190 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x194 "EmbeddedRAM101,Embedded RAM" hexmask.long.byte 0x194 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x194 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x194 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x194 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x198 "EmbeddedRAM102,Embedded RAM" hexmask.long.byte 0x198 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x198 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x198 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x198 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x19C "EmbeddedRAM103,Embedded RAM" hexmask.long.byte 0x19C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x19C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x19C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x19C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A0 "EmbeddedRAM104,Embedded RAM" hexmask.long.byte 0x1A0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A4 "EmbeddedRAM105,Embedded RAM" hexmask.long.byte 0x1A4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A8 "EmbeddedRAM106,Embedded RAM" hexmask.long.byte 0x1A8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1AC "EmbeddedRAM107,Embedded RAM" hexmask.long.byte 0x1AC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1AC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1AC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1AC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B0 "EmbeddedRAM108,Embedded RAM" hexmask.long.byte 0x1B0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B4 "EmbeddedRAM109,Embedded RAM" hexmask.long.byte 0x1B4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B8 "EmbeddedRAM110,Embedded RAM" hexmask.long.byte 0x1B8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1BC "EmbeddedRAM111,Embedded RAM" hexmask.long.byte 0x1BC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1BC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1BC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1BC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C0 "EmbeddedRAM112,Embedded RAM" hexmask.long.byte 0x1C0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C4 "EmbeddedRAM113,Embedded RAM" hexmask.long.byte 0x1C4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C8 "EmbeddedRAM114,Embedded RAM" hexmask.long.byte 0x1C8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1CC "EmbeddedRAM115,Embedded RAM" hexmask.long.byte 0x1CC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1CC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1CC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1CC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D0 "EmbeddedRAM116,Embedded RAM" hexmask.long.byte 0x1D0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D4 "EmbeddedRAM117,Embedded RAM" hexmask.long.byte 0x1D4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D8 "EmbeddedRAM118,Embedded RAM" hexmask.long.byte 0x1D8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1DC "EmbeddedRAM119,Embedded RAM" hexmask.long.byte 0x1DC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1DC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1DC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1DC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E0 "EmbeddedRAM120,Embedded RAM" hexmask.long.byte 0x1E0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E4 "EmbeddedRAM121,Embedded RAM" hexmask.long.byte 0x1E4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E8 "EmbeddedRAM122,Embedded RAM" hexmask.long.byte 0x1E8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1EC "EmbeddedRAM123,Embedded RAM" hexmask.long.byte 0x1EC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1EC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1EC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1EC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F0 "EmbeddedRAM124,Embedded RAM" hexmask.long.byte 0x1F0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F4 "EmbeddedRAM125,Embedded RAM" hexmask.long.byte 0x1F4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F8 "EmbeddedRAM126,Embedded RAM" hexmask.long.byte 0x1F8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1FC "EmbeddedRAM127,Embedded RAM" hexmask.long.byte 0x1FC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1FC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1FC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1FC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x7F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x40 "RXIMR16,Rx Individual Mask Registers" hexmask.long 0x40 0.--31. 1. "MI,Individual Mask Bits" line.long 0x44 "RXIMR17,Rx Individual Mask Registers" hexmask.long 0x44 0.--31. 1. "MI,Individual Mask Bits" line.long 0x48 "RXIMR18,Rx Individual Mask Registers" hexmask.long 0x48 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4C "RXIMR19,Rx Individual Mask Registers" hexmask.long 0x4C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x50 "RXIMR20,Rx Individual Mask Registers" hexmask.long 0x50 0.--31. 1. "MI,Individual Mask Bits" line.long 0x54 "RXIMR21,Rx Individual Mask Registers" hexmask.long 0x54 0.--31. 1. "MI,Individual Mask Bits" line.long 0x58 "RXIMR22,Rx Individual Mask Registers" hexmask.long 0x58 0.--31. 1. "MI,Individual Mask Bits" line.long 0x5C "RXIMR23,Rx Individual Mask Registers" hexmask.long 0x5C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x60 "RXIMR24,Rx Individual Mask Registers" hexmask.long 0x60 0.--31. 1. "MI,Individual Mask Bits" line.long 0x64 "RXIMR25,Rx Individual Mask Registers" hexmask.long 0x64 0.--31. 1. "MI,Individual Mask Bits" line.long 0x68 "RXIMR26,Rx Individual Mask Registers" hexmask.long 0x68 0.--31. 1. "MI,Individual Mask Bits" line.long 0x6C "RXIMR27,Rx Individual Mask Registers" hexmask.long 0x6C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x70 "RXIMR28,Rx Individual Mask Registers" hexmask.long 0x70 0.--31. 1. "MI,Individual Mask Bits" line.long 0x74 "RXIMR29,Rx Individual Mask Registers" hexmask.long 0x74 0.--31. 1. "MI,Individual Mask Bits" line.long 0x78 "RXIMR30,Rx Individual Mask Registers" hexmask.long 0x78 0.--31. 1. "MI,Individual Mask Bits" line.long 0x7C "RXIMR31,Rx Individual Mask Registers" hexmask.long 0x7C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end tree "CAN2" base ad:0x4002B000 group.long 0x0++0xB line.long 0x0 "MCR,Module Configuration Register" bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module." bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode." newline bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled." bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted." newline rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,?" bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset." newline rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped." bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0,1" newline bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.." rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode." newline bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled." bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.." newline bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled." bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled." newline bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled." bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled." newline bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.." bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,?,?" newline hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer" line.long 0x4 "CTRL1,Control 1 register" hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor" bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3" newline bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled." bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled." newline bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.." bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled." newline bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled." bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled." newline bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.." bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled." newline bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled" bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first." newline bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode." bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7" line.long 0x8 "TIMER,Free Running Timer" hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value" group.long 0x10++0x13 line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register" hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits" line.long 0x4 "RX14MASK,Rx 14 Mask register" hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits" line.long 0x8 "RX15MASK,Rx 15 Mask register" hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits" line.long 0xC "ECR,Error Counter" hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits" hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits" newline hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter" hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter" line.long 0x10 "ESR1,Error and Status 1 register" rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.." rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." newline rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred." newline bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.." bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process." newline rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus." bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.." newline bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.." rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.." newline rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.." rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.." newline rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.." rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.." newline rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.." rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96." newline rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96." rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE." newline rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message." rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off" newline rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message." bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state." newline bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.." group.long 0x28++0x3 line.long 0x0 "IMASK1,Interrupt Masks 1 register" hexmask.long 0x0 0.--31. 1. "BUF31TO0M,Buffer MB i Mask" group.long 0x30++0x7 line.long 0x0 "IFLAG1,Interrupt Flags 1 register" hexmask.long.tbyte 0x0 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt" bitfld.long 0x0 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.." newline bitfld.long 0x0 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.." bitfld.long 0x0 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.." newline hexmask.long.byte 0x0 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'" bitfld.long 0x0 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.." line.long 0x4 "CTRL2,Control 2 register" bitfld.long 0x4 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled." bitfld.long 0x4 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled." newline hexmask.long.byte 0x4 24.--27. 1. "RFFN,Number Of Rx FIFO Filters" hexmask.long.byte 0x4 19.--23. 1. "TASD,Tx Arbitration Start Delay" newline bitfld.long 0x4 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.." bitfld.long 0x4 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored." newline bitfld.long 0x4 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.." bitfld.long 0x4 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.." newline bitfld.long 0x4 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled." bitfld.long 0x4 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.." newline bitfld.long 0x4 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled." rgroup.long 0x38++0x3 line.long 0x0 "ESR2,Error and Status 2 register" hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox" bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid." newline bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.." rgroup.long 0x44++0x3 line.long 0x0 "CRCR,CRC Register" hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox" hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value" group.long 0x48++0x3 line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register" hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits" rgroup.long 0x4C++0x3 line.long 0x0 "RXFIR,Rx FIFO Information Register" hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator" group.long 0x50++0x3 line.long 0x0 "CBT,CAN Bit Timing Register" bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled." hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor" newline hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width" hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment" newline hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1" hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2" group.long 0x80++0x1FF line.long 0x0 "EmbeddedRAM0,Embedded RAM" hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4 "EmbeddedRAM1,Embedded RAM" hexmask.long.byte 0x4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8 "EmbeddedRAM2,Embedded RAM" hexmask.long.byte 0x8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC "EmbeddedRAM3,Embedded RAM" hexmask.long.byte 0xC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10 "EmbeddedRAM4,Embedded RAM" hexmask.long.byte 0x10 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14 "EmbeddedRAM5,Embedded RAM" hexmask.long.byte 0x14 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18 "EmbeddedRAM6,Embedded RAM" hexmask.long.byte 0x18 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C "EmbeddedRAM7,Embedded RAM" hexmask.long.byte 0x1C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x20 "EmbeddedRAM8,Embedded RAM" hexmask.long.byte 0x20 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x20 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x20 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x20 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x24 "EmbeddedRAM9,Embedded RAM" hexmask.long.byte 0x24 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x24 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x24 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x24 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x28 "EmbeddedRAM10,Embedded RAM" hexmask.long.byte 0x28 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x28 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x28 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x28 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x2C "EmbeddedRAM11,Embedded RAM" hexmask.long.byte 0x2C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x2C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x2C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x2C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x30 "EmbeddedRAM12,Embedded RAM" hexmask.long.byte 0x30 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x30 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x30 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x30 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x34 "EmbeddedRAM13,Embedded RAM" hexmask.long.byte 0x34 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x34 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x34 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x34 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x38 "EmbeddedRAM14,Embedded RAM" hexmask.long.byte 0x38 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x38 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x38 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x38 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x3C "EmbeddedRAM15,Embedded RAM" hexmask.long.byte 0x3C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x3C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x3C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x3C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x40 "EmbeddedRAM16,Embedded RAM" hexmask.long.byte 0x40 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x40 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x40 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x40 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x44 "EmbeddedRAM17,Embedded RAM" hexmask.long.byte 0x44 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x44 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x44 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x44 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x48 "EmbeddedRAM18,Embedded RAM" hexmask.long.byte 0x48 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x48 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x48 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x48 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x4C "EmbeddedRAM19,Embedded RAM" hexmask.long.byte 0x4C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x4C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x4C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x4C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x50 "EmbeddedRAM20,Embedded RAM" hexmask.long.byte 0x50 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x50 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x50 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x50 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x54 "EmbeddedRAM21,Embedded RAM" hexmask.long.byte 0x54 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x54 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x54 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x54 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x58 "EmbeddedRAM22,Embedded RAM" hexmask.long.byte 0x58 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x58 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x58 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x58 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x5C "EmbeddedRAM23,Embedded RAM" hexmask.long.byte 0x5C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x5C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x5C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x5C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x60 "EmbeddedRAM24,Embedded RAM" hexmask.long.byte 0x60 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x60 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x60 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x60 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x64 "EmbeddedRAM25,Embedded RAM" hexmask.long.byte 0x64 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x64 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x64 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x64 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x68 "EmbeddedRAM26,Embedded RAM" hexmask.long.byte 0x68 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x68 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x68 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x68 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x6C "EmbeddedRAM27,Embedded RAM" hexmask.long.byte 0x6C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x6C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x6C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x6C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x70 "EmbeddedRAM28,Embedded RAM" hexmask.long.byte 0x70 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x70 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x70 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x70 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x74 "EmbeddedRAM29,Embedded RAM" hexmask.long.byte 0x74 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x74 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x74 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x74 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x78 "EmbeddedRAM30,Embedded RAM" hexmask.long.byte 0x78 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x78 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x78 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x78 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x7C "EmbeddedRAM31,Embedded RAM" hexmask.long.byte 0x7C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x7C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x7C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x7C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x80 "EmbeddedRAM32,Embedded RAM" hexmask.long.byte 0x80 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x80 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x80 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x80 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x84 "EmbeddedRAM33,Embedded RAM" hexmask.long.byte 0x84 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x84 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x84 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x84 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x88 "EmbeddedRAM34,Embedded RAM" hexmask.long.byte 0x88 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x88 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x88 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x88 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x8C "EmbeddedRAM35,Embedded RAM" hexmask.long.byte 0x8C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x8C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x8C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x8C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x90 "EmbeddedRAM36,Embedded RAM" hexmask.long.byte 0x90 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x90 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x90 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x90 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x94 "EmbeddedRAM37,Embedded RAM" hexmask.long.byte 0x94 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x94 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x94 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x94 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x98 "EmbeddedRAM38,Embedded RAM" hexmask.long.byte 0x98 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x98 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x98 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x98 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x9C "EmbeddedRAM39,Embedded RAM" hexmask.long.byte 0x9C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x9C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x9C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x9C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA0 "EmbeddedRAM40,Embedded RAM" hexmask.long.byte 0xA0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA4 "EmbeddedRAM41,Embedded RAM" hexmask.long.byte 0xA4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xA8 "EmbeddedRAM42,Embedded RAM" hexmask.long.byte 0xA8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xA8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xA8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xA8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xAC "EmbeddedRAM43,Embedded RAM" hexmask.long.byte 0xAC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xAC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xAC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xAC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB0 "EmbeddedRAM44,Embedded RAM" hexmask.long.byte 0xB0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB4 "EmbeddedRAM45,Embedded RAM" hexmask.long.byte 0xB4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xB8 "EmbeddedRAM46,Embedded RAM" hexmask.long.byte 0xB8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xB8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xB8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xB8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xBC "EmbeddedRAM47,Embedded RAM" hexmask.long.byte 0xBC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xBC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xBC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xBC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC0 "EmbeddedRAM48,Embedded RAM" hexmask.long.byte 0xC0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC4 "EmbeddedRAM49,Embedded RAM" hexmask.long.byte 0xC4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xC8 "EmbeddedRAM50,Embedded RAM" hexmask.long.byte 0xC8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xC8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xC8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xC8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xCC "EmbeddedRAM51,Embedded RAM" hexmask.long.byte 0xCC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xCC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xCC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xCC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD0 "EmbeddedRAM52,Embedded RAM" hexmask.long.byte 0xD0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD4 "EmbeddedRAM53,Embedded RAM" hexmask.long.byte 0xD4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xD8 "EmbeddedRAM54,Embedded RAM" hexmask.long.byte 0xD8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xD8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xD8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xD8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xDC "EmbeddedRAM55,Embedded RAM" hexmask.long.byte 0xDC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xDC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xDC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xDC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE0 "EmbeddedRAM56,Embedded RAM" hexmask.long.byte 0xE0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE4 "EmbeddedRAM57,Embedded RAM" hexmask.long.byte 0xE4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xE8 "EmbeddedRAM58,Embedded RAM" hexmask.long.byte 0xE8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xE8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xE8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xE8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xEC "EmbeddedRAM59,Embedded RAM" hexmask.long.byte 0xEC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xEC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xEC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xEC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF0 "EmbeddedRAM60,Embedded RAM" hexmask.long.byte 0xF0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF4 "EmbeddedRAM61,Embedded RAM" hexmask.long.byte 0xF4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xF8 "EmbeddedRAM62,Embedded RAM" hexmask.long.byte 0xF8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xF8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xF8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xF8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0xFC "EmbeddedRAM63,Embedded RAM" hexmask.long.byte 0xFC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0xFC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0xFC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0xFC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x100 "EmbeddedRAM64,Embedded RAM" hexmask.long.byte 0x100 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x100 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x100 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x100 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x104 "EmbeddedRAM65,Embedded RAM" hexmask.long.byte 0x104 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x104 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x104 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x104 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x108 "EmbeddedRAM66,Embedded RAM" hexmask.long.byte 0x108 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x108 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x108 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x108 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x10C "EmbeddedRAM67,Embedded RAM" hexmask.long.byte 0x10C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x10C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x10C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x10C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x110 "EmbeddedRAM68,Embedded RAM" hexmask.long.byte 0x110 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x110 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x110 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x110 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x114 "EmbeddedRAM69,Embedded RAM" hexmask.long.byte 0x114 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x114 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x114 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x114 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x118 "EmbeddedRAM70,Embedded RAM" hexmask.long.byte 0x118 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x118 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x118 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x118 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x11C "EmbeddedRAM71,Embedded RAM" hexmask.long.byte 0x11C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x11C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x11C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x11C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x120 "EmbeddedRAM72,Embedded RAM" hexmask.long.byte 0x120 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x120 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x120 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x120 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x124 "EmbeddedRAM73,Embedded RAM" hexmask.long.byte 0x124 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x124 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x124 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x124 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x128 "EmbeddedRAM74,Embedded RAM" hexmask.long.byte 0x128 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x128 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x128 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x128 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x12C "EmbeddedRAM75,Embedded RAM" hexmask.long.byte 0x12C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x12C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x12C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x12C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x130 "EmbeddedRAM76,Embedded RAM" hexmask.long.byte 0x130 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x130 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x130 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x130 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x134 "EmbeddedRAM77,Embedded RAM" hexmask.long.byte 0x134 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x134 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x134 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x134 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x138 "EmbeddedRAM78,Embedded RAM" hexmask.long.byte 0x138 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x138 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x138 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x138 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x13C "EmbeddedRAM79,Embedded RAM" hexmask.long.byte 0x13C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x13C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x13C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x13C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x140 "EmbeddedRAM80,Embedded RAM" hexmask.long.byte 0x140 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x140 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x140 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x140 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x144 "EmbeddedRAM81,Embedded RAM" hexmask.long.byte 0x144 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x144 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x144 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x144 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x148 "EmbeddedRAM82,Embedded RAM" hexmask.long.byte 0x148 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x148 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x148 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x148 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x14C "EmbeddedRAM83,Embedded RAM" hexmask.long.byte 0x14C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x14C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x14C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x14C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x150 "EmbeddedRAM84,Embedded RAM" hexmask.long.byte 0x150 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x150 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x150 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x150 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x154 "EmbeddedRAM85,Embedded RAM" hexmask.long.byte 0x154 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x154 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x154 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x154 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x158 "EmbeddedRAM86,Embedded RAM" hexmask.long.byte 0x158 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x158 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x158 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x158 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x15C "EmbeddedRAM87,Embedded RAM" hexmask.long.byte 0x15C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x15C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x15C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x15C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x160 "EmbeddedRAM88,Embedded RAM" hexmask.long.byte 0x160 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x160 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x160 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x160 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x164 "EmbeddedRAM89,Embedded RAM" hexmask.long.byte 0x164 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x164 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x164 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x164 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x168 "EmbeddedRAM90,Embedded RAM" hexmask.long.byte 0x168 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x168 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x168 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x168 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x16C "EmbeddedRAM91,Embedded RAM" hexmask.long.byte 0x16C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x16C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x16C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x16C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x170 "EmbeddedRAM92,Embedded RAM" hexmask.long.byte 0x170 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x170 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x170 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x170 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x174 "EmbeddedRAM93,Embedded RAM" hexmask.long.byte 0x174 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x174 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x174 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x174 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x178 "EmbeddedRAM94,Embedded RAM" hexmask.long.byte 0x178 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x178 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x178 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x178 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x17C "EmbeddedRAM95,Embedded RAM" hexmask.long.byte 0x17C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x17C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x17C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x17C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x180 "EmbeddedRAM96,Embedded RAM" hexmask.long.byte 0x180 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x180 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x180 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x180 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x184 "EmbeddedRAM97,Embedded RAM" hexmask.long.byte 0x184 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x184 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x184 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x184 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x188 "EmbeddedRAM98,Embedded RAM" hexmask.long.byte 0x188 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x188 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x188 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x188 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x18C "EmbeddedRAM99,Embedded RAM" hexmask.long.byte 0x18C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x18C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x18C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x18C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x190 "EmbeddedRAM100,Embedded RAM" hexmask.long.byte 0x190 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x190 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x190 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x190 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x194 "EmbeddedRAM101,Embedded RAM" hexmask.long.byte 0x194 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x194 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x194 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x194 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x198 "EmbeddedRAM102,Embedded RAM" hexmask.long.byte 0x198 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x198 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x198 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x198 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x19C "EmbeddedRAM103,Embedded RAM" hexmask.long.byte 0x19C 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x19C 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x19C 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x19C 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A0 "EmbeddedRAM104,Embedded RAM" hexmask.long.byte 0x1A0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A4 "EmbeddedRAM105,Embedded RAM" hexmask.long.byte 0x1A4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1A8 "EmbeddedRAM106,Embedded RAM" hexmask.long.byte 0x1A8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1A8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1A8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1A8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1AC "EmbeddedRAM107,Embedded RAM" hexmask.long.byte 0x1AC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1AC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1AC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1AC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B0 "EmbeddedRAM108,Embedded RAM" hexmask.long.byte 0x1B0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B4 "EmbeddedRAM109,Embedded RAM" hexmask.long.byte 0x1B4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1B8 "EmbeddedRAM110,Embedded RAM" hexmask.long.byte 0x1B8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1B8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1B8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1B8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1BC "EmbeddedRAM111,Embedded RAM" hexmask.long.byte 0x1BC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1BC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1BC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1BC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C0 "EmbeddedRAM112,Embedded RAM" hexmask.long.byte 0x1C0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C4 "EmbeddedRAM113,Embedded RAM" hexmask.long.byte 0x1C4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1C8 "EmbeddedRAM114,Embedded RAM" hexmask.long.byte 0x1C8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1C8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1C8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1C8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1CC "EmbeddedRAM115,Embedded RAM" hexmask.long.byte 0x1CC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1CC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1CC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1CC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D0 "EmbeddedRAM116,Embedded RAM" hexmask.long.byte 0x1D0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D4 "EmbeddedRAM117,Embedded RAM" hexmask.long.byte 0x1D4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1D8 "EmbeddedRAM118,Embedded RAM" hexmask.long.byte 0x1D8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1D8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1D8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1D8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1DC "EmbeddedRAM119,Embedded RAM" hexmask.long.byte 0x1DC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1DC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1DC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1DC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E0 "EmbeddedRAM120,Embedded RAM" hexmask.long.byte 0x1E0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E4 "EmbeddedRAM121,Embedded RAM" hexmask.long.byte 0x1E4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1E8 "EmbeddedRAM122,Embedded RAM" hexmask.long.byte 0x1E8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1E8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1E8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1E8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1EC "EmbeddedRAM123,Embedded RAM" hexmask.long.byte 0x1EC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1EC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1EC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1EC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F0 "EmbeddedRAM124,Embedded RAM" hexmask.long.byte 0x1F0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F4 "EmbeddedRAM125,Embedded RAM" hexmask.long.byte 0x1F4 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F4 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F4 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F4 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1F8 "EmbeddedRAM126,Embedded RAM" hexmask.long.byte 0x1F8 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1F8 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1F8 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1F8 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." line.long 0x1FC "EmbeddedRAM127,Embedded RAM" hexmask.long.byte 0x1FC 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x1FC 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame." newline hexmask.long.byte 0x1FC 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x1FC 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame." group.long 0x880++0x7F line.long 0x0 "RXIMR0,Rx Individual Mask Registers" hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4 "RXIMR1,Rx Individual Mask Registers" hexmask.long 0x4 0.--31. 1. "MI,Individual Mask Bits" line.long 0x8 "RXIMR2,Rx Individual Mask Registers" hexmask.long 0x8 0.--31. 1. "MI,Individual Mask Bits" line.long 0xC "RXIMR3,Rx Individual Mask Registers" hexmask.long 0xC 0.--31. 1. "MI,Individual Mask Bits" line.long 0x10 "RXIMR4,Rx Individual Mask Registers" hexmask.long 0x10 0.--31. 1. "MI,Individual Mask Bits" line.long 0x14 "RXIMR5,Rx Individual Mask Registers" hexmask.long 0x14 0.--31. 1. "MI,Individual Mask Bits" line.long 0x18 "RXIMR6,Rx Individual Mask Registers" hexmask.long 0x18 0.--31. 1. "MI,Individual Mask Bits" line.long 0x1C "RXIMR7,Rx Individual Mask Registers" hexmask.long 0x1C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x20 "RXIMR8,Rx Individual Mask Registers" hexmask.long 0x20 0.--31. 1. "MI,Individual Mask Bits" line.long 0x24 "RXIMR9,Rx Individual Mask Registers" hexmask.long 0x24 0.--31. 1. "MI,Individual Mask Bits" line.long 0x28 "RXIMR10,Rx Individual Mask Registers" hexmask.long 0x28 0.--31. 1. "MI,Individual Mask Bits" line.long 0x2C "RXIMR11,Rx Individual Mask Registers" hexmask.long 0x2C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x30 "RXIMR12,Rx Individual Mask Registers" hexmask.long 0x30 0.--31. 1. "MI,Individual Mask Bits" line.long 0x34 "RXIMR13,Rx Individual Mask Registers" hexmask.long 0x34 0.--31. 1. "MI,Individual Mask Bits" line.long 0x38 "RXIMR14,Rx Individual Mask Registers" hexmask.long 0x38 0.--31. 1. "MI,Individual Mask Bits" line.long 0x3C "RXIMR15,Rx Individual Mask Registers" hexmask.long 0x3C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x40 "RXIMR16,Rx Individual Mask Registers" hexmask.long 0x40 0.--31. 1. "MI,Individual Mask Bits" line.long 0x44 "RXIMR17,Rx Individual Mask Registers" hexmask.long 0x44 0.--31. 1. "MI,Individual Mask Bits" line.long 0x48 "RXIMR18,Rx Individual Mask Registers" hexmask.long 0x48 0.--31. 1. "MI,Individual Mask Bits" line.long 0x4C "RXIMR19,Rx Individual Mask Registers" hexmask.long 0x4C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x50 "RXIMR20,Rx Individual Mask Registers" hexmask.long 0x50 0.--31. 1. "MI,Individual Mask Bits" line.long 0x54 "RXIMR21,Rx Individual Mask Registers" hexmask.long 0x54 0.--31. 1. "MI,Individual Mask Bits" line.long 0x58 "RXIMR22,Rx Individual Mask Registers" hexmask.long 0x58 0.--31. 1. "MI,Individual Mask Bits" line.long 0x5C "RXIMR23,Rx Individual Mask Registers" hexmask.long 0x5C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x60 "RXIMR24,Rx Individual Mask Registers" hexmask.long 0x60 0.--31. 1. "MI,Individual Mask Bits" line.long 0x64 "RXIMR25,Rx Individual Mask Registers" hexmask.long 0x64 0.--31. 1. "MI,Individual Mask Bits" line.long 0x68 "RXIMR26,Rx Individual Mask Registers" hexmask.long 0x68 0.--31. 1. "MI,Individual Mask Bits" line.long 0x6C "RXIMR27,Rx Individual Mask Registers" hexmask.long 0x6C 0.--31. 1. "MI,Individual Mask Bits" line.long 0x70 "RXIMR28,Rx Individual Mask Registers" hexmask.long 0x70 0.--31. 1. "MI,Individual Mask Bits" line.long 0x74 "RXIMR29,Rx Individual Mask Registers" hexmask.long 0x74 0.--31. 1. "MI,Individual Mask Bits" line.long 0x78 "RXIMR30,Rx Individual Mask Registers" hexmask.long 0x78 0.--31. 1. "MI,Individual Mask Bits" line.long 0x7C "RXIMR31,Rx Individual Mask Registers" hexmask.long 0x7C 0.--31. 1. "MI,Individual Mask Bits" group.long 0xB00++0x27 line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register" bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wake up event is disabled,1: Timeout wake up event is enabled" bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wake up match event is disabled,1: Wake up match event is enabled" newline hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria" bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,?,?" newline bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon a ID contents against an exact target..,1: Match upon a ID value greater than or equal to a..,?,?" bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,?,?" line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register" hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria" line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register" bitfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wake up by timeout event detected,1: Wake up by timeout event detected" bitfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wake up by match event detected,1: Wake up by match event detected" newline hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches while in Pretended Networking" line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register" bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format" bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame" newline hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering" line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register" hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter" hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter" line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register" hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7." line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register" bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked" newline hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering" line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register" hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0." hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1." newline hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2." hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3." line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register" hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4." hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5." newline hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6." hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7." rgroup.long 0xB40++0x3F line.long 0x0 "WMB0_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x4 "WMB0_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x8 "WMB0_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0xC "WMB0_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x10 "WMB1_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x10 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x10 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x10 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x10 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x14 "WMB1_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x14 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x18 "WMB1_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x18 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x18 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x18 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x18 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x1C "WMB1_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x1C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x1C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x1C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x1C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x20 "WMB2_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x20 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x20 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x20 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x20 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x24 "WMB2_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x24 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x28 "WMB2_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x28 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x28 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x28 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x28 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x2C "WMB2_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x2C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x2C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x2C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x2C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" line.long 0x30 "WMB3_CS,Wake Up Message Buffer Register for C/S" bitfld.long 0x30 22. "SRR,Substitute Remote Request" "0,1" bitfld.long 0x30 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended" newline bitfld.long 0x30 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one" hexmask.long.byte 0x30 16.--19. 1. "DLC,Length of Data in Bytes" line.long 0x34 "WMB3_ID,Wake Up Message Buffer Register for ID" hexmask.long 0x34 0.--28. 1. "ID,Received ID under Pretended Networking mode" line.long 0x38 "WMB3_D03,Wake Up Message Buffer Register for Data 0-3" hexmask.long.byte 0x38 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode" hexmask.long.byte 0x38 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode" newline hexmask.long.byte 0x38 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode" hexmask.long.byte 0x38 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode" line.long 0x3C "WMB3_D47,Wake Up Message Buffer Register Data 4-7" hexmask.long.byte 0x3C 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode" hexmask.long.byte 0x3C 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode" newline hexmask.long.byte 0x3C 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode" hexmask.long.byte 0x3C 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode" group.long 0xC00++0x7 line.long 0x0 "FDCTRL,CAN FD Control Register" bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.." bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,?,?" newline bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled" bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range." newline hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset" hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value" line.long 0x4 "FDCBT,CAN FD Bit Timing Register" hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor" bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment" bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7" rgroup.long 0xC08++0x3 line.long 0x0 "FDCRC,CAN FD CRC Register" hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC" hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value" tree.end endif tree.end tree "CMP (High-Speed Comparator/Voltage Reference/Digital-to-Analog Converter/Analog Mux)" base ad:0x40073000 group.long 0x0++0xB line.long 0x0 "C0,CMP Control Register 0" bitfld.long 0x0 30. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled." bitfld.long 0x0 28. "IER,Comparator Interrupt Enable Rising" "0: Interrupt is disabled.,1: Interrupt is enabled." newline bitfld.long 0x0 27. "IEF,Comparator Interrupt Enable Falling" "0: Interrupt is disabled.,1: Interrupt is enabled." bitfld.long 0x0 26. "CFR,Analog Comparator Flag Rising" "0: A rising edge has not been detected on COUT.,1: A rising edge on COUT has occurred." newline bitfld.long 0x0 25. "CFF,Analog Comparator Flag Falling" "0: A falling edge has not been detected on COUT.,1: A falling edge on COUT has occurred." rbitfld.long 0x0 24. "COUT,Analog Comparator Output" "0,1" newline hexmask.long.byte 0x0 16.--23. 1. "FPR,Filter Sample Period" bitfld.long 0x0 15. "SE,Sample Enable" "0: Sampling mode is not selected.,1: Sampling mode is selected." newline bitfld.long 0x0 14. "WE,Windowing Enable" "0: Windowing mode is not selected.,1: Windowing mode is selected." bitfld.long 0x0 12. "PMODE,Power Mode Select" "0: Low Speed (LS) comparison mode is selected.,1: High Speed (HS) comparison mode is selected in.." newline bitfld.long 0x0 11. "INVT,Comparator invert" "0: Does not invert the comparator output.,1: Inverts the comparator output." bitfld.long 0x0 10. "COS,Comparator Output Select" "0: Set CMPO to equal COUT (filtered comparator..,1: Set CMPO to equal COUTA (unfiltered comparator.." newline bitfld.long 0x0 9. "OPE,Comparator Output Pin Enable" "0: When OPE is 0 the comparator output (after..,1: When OPE is 1 and if the software has configured.." bitfld.long 0x0 8. "EN,Comparator Module Enable" "0: Analog Comparator is disabled.,1: Analog Comparator is enabled." newline bitfld.long 0x0 4.--6. "FILTER_CNT,Filter Sample Count" "0: Filter is disabled. If SE = 1 then COUT is a..,1: 1 consecutive sample must agree (comparator..,?,?,?,?,?,?" bitfld.long 0x0 2. "OFFSET,Comparator hard block offset control. See chip data sheet to get the actual offset value with each level" "0: The comparator hard block output has level 0..,1: The comparator hard block output has level 1.." newline bitfld.long 0x0 0.--1. "HYSTCTR,Comparator hard block hysteresis control. See chip data sheet to get the actual hysteresis value with each level" "0: The hard block output has level 0 hysteresis..,1: The hard block output has level 1 hysteresis..,?,?" line.long 0x4 "C1,CMP Control Register 1" bitfld.long 0x4 27.--28. "INPSEL,Selection of the input to the positive port of the comparator" "0: IN0 from the 8-bit DAC output,1: IN1 from the analog 8-1 mux,?,?" bitfld.long 0x4 24.--25. "INNSEL,Selection of the input to the negative port of the comparator" "0: IN0 from the 8-bit DAC output,1: IN1 from the analog 8-1 mux,?,?" newline bitfld.long 0x4 23. "CHN7,Channel 7 input enable" "0,1" bitfld.long 0x4 22. "CHN6,Channel 6 input enable" "0,1" newline bitfld.long 0x4 21. "CHN5,Channel 5 input enable" "0,1" bitfld.long 0x4 20. "CHN4,Channel 4 input enable" "0,1" newline bitfld.long 0x4 19. "CHN3,Channel 3 input enable" "0,1" bitfld.long 0x4 18. "CHN2,Channel 2 input enable" "0,1" newline bitfld.long 0x4 17. "CHN1,Channel 1 input enable" "0,1" bitfld.long 0x4 16. "CHN0,Channel 0 input enable" "0,1" newline bitfld.long 0x4 15. "DACEN,DAC Enable" "0: DAC is disabled.,1: DAC is enabled." bitfld.long 0x4 14. "VRSEL,Supply Voltage Reference Source Select" "0: Vin1 is selected as resistor ladder network..,1: Vin2 is selected as resistor ladder network.." newline bitfld.long 0x4 11.--13. "PSEL,Plus Input MUX Control" "0: IN0,1: IN1,?,?,?,?,?,?" bitfld.long 0x4 8.--10. "MSEL,Minus Input MUX Control" "0: IN0,1: IN1,?,?,?,?,?,?" newline hexmask.long.byte 0x4 0.--7. 1. "VOSEL,DAC Output Voltage Select" line.long 0x8 "C2,CMP Control Register 2" bitfld.long 0x8 31. "RRE,Round-Robin Enable" "0: Round-robin operation is disabled.,1: Round-robin operation is enabled." bitfld.long 0x8 30. "RRIE,Round-Robin interrupt enable" "0: The round-robin interrupt is disabled.,1: The round-robin interrupt is enabled when a.." newline bitfld.long 0x8 29. "FXMP,Fixed MUX Port" "0: The Plus port is fixed. Only the inputs to the..,1: The Minus port is fixed. Only the inputs to the.." bitfld.long 0x8 25.--27. "FXMXCH,Fixed channel selection" "0: Channel 0 is selected as the fixed reference..,1: Channel 1 is selected as the fixed reference..,?,?,?,?,?,?" newline bitfld.long 0x8 23. "CH7F,Channel 7 input changed flag" "0,1" bitfld.long 0x8 22. "CH6F,Channel 6 input changed flag" "0,1" newline bitfld.long 0x8 21. "CH5F,Channel 5 input changed flag" "0,1" bitfld.long 0x8 20. "CH4F,Channel 4 input changed flag" "0,1" newline bitfld.long 0x8 19. "CH3F,Channel 3 input changed flag" "0,1" bitfld.long 0x8 18. "CH2F,Channel 2 input changed flag" "0,1" newline bitfld.long 0x8 17. "CH1F,Channel 1 input changed flag" "0,1" bitfld.long 0x8 16. "CH0F,Channel 0 input changed flag" "0,1" newline bitfld.long 0x8 14.--15. "NSAM,Number of sample clocks" "0: The comparison result is sampled as soon as the..,1: The sampling takes place 1 round-robin clock..,?,?" hexmask.long.byte 0x8 8.--13. 1. "INITMOD,Comparator and DAC initialization delay modulus." newline hexmask.long.byte 0x8 0.--7. 1. "ACOn,The result of the input comparison for channel n" tree.end sif (cpuis("S32K116*")||cpuis("S32K118*")) tree "CMU_FC (Clock Monitoring Unit - Frequency Check)" base ad:0x0 tree "CMU_FC_0" base ad:0x4003E000 group.long 0x0++0x17 line.long 0x0 "GCR,CMU Frequency Check Global Configuration Register" bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Frequency Check Disabled,1: Frequency Check Enabled" line.long 0x4 "RCCR,CMU Frequency Check Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference Clock Count" line.long 0x8 "HTCR,CMU Frequency Check High Threshold Configuration Register" hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High Frequency Reference Threshold" line.long 0xC "LTCR,CMU Frequency Check Low Threshold Configuration Register" hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold" line.long 0x10 "SR,CMU Frequency Check Status Register" rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency Check Stopped,1: Frequency Check Running" rbitfld.long 0x10 2.--3. "STATE,Module State" "0: Configure State- Configuration registers and..,1: Initialization State- Register configurations..,?,?" bitfld.long 0x10 1. "FHH,Frequency Higher than High Frequency Reference Threshold Event Status" "0: No FHH Event,1: FHH Event Occured" newline bitfld.long 0x10 0. "FLL,Frequency Lower than Low Frequency Reference Threshold Event Status" "0: No FLL Event,1: FLL Event Occured" line.long 0x14 "IER,CMU Frequency Check Interrupt/Event Enable Register" bitfld.long 0x14 3. "FHHAEE,Frequency Higher than High Frequency Reference Threshold Asynchronous Event Enable" "0: Asynchronous FHH Event is Disabled,1: Asynchronous FHH Event is Enabled" bitfld.long 0x14 2. "FLLAEE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Event Enable" "0: Asynchronous FLL Event is Disabled,1: Asynchronous FLL Event is Enabled" bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Interrupt Enable" "0: FHH Interrupt is Disabled,1: FHH Interrupt is Enabled" newline bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Interrupt Enable" "0: FLL Interrupt is Disabled,1: FLL Interrupt is Enabled" tree.end tree "CMU_FC_1" base ad:0x4003F000 group.long 0x0++0x17 line.long 0x0 "GCR,CMU Frequency Check Global Configuration Register" bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Frequency Check Disabled,1: Frequency Check Enabled" line.long 0x4 "RCCR,CMU Frequency Check Reference Count Configuration Register" hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference Clock Count" line.long 0x8 "HTCR,CMU Frequency Check High Threshold Configuration Register" hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High Frequency Reference Threshold" line.long 0xC "LTCR,CMU Frequency Check Low Threshold Configuration Register" hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold" line.long 0x10 "SR,CMU Frequency Check Status Register" rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency Check Stopped,1: Frequency Check Running" rbitfld.long 0x10 2.--3. "STATE,Module State" "0: Configure State- Configuration registers and..,1: Initialization State- Register configurations..,?,?" bitfld.long 0x10 1. "FHH,Frequency Higher than High Frequency Reference Threshold Event Status" "0: No FHH Event,1: FHH Event Occured" newline bitfld.long 0x10 0. "FLL,Frequency Lower than Low Frequency Reference Threshold Event Status" "0: No FLL Event,1: FLL Event Occured" line.long 0x14 "IER,CMU Frequency Check Interrupt/Event Enable Register" bitfld.long 0x14 3. "FHHAEE,Frequency Higher than High Frequency Reference Threshold Asynchronous Event Enable" "0: Asynchronous FHH Event is Disabled,1: Asynchronous FHH Event is Enabled" bitfld.long 0x14 2. "FLLAEE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Event Enable" "0: Asynchronous FLL Event is Disabled,1: Asynchronous FLL Event is Enabled" bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Interrupt Enable" "0: FHH Interrupt is Disabled,1: FHH Interrupt is Enabled" newline bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Interrupt Enable" "0: FLL Interrupt is Disabled,1: FLL Interrupt is Enabled" tree.end tree.end endif tree "CRC (Cyclic Redundancy Check)" base ad:0x40032000 group.long 0x0++0x3 line.long 0x0 "DATA,CRC Data register" hexmask.long.byte 0x0 24.--31. 1. "HU,CRC High Upper Byte" hexmask.long.byte 0x0 16.--23. 1. "HL,CRC High Lower Byte" newline hexmask.long.byte 0x0 8.--15. 1. "LU,CRC Low Upper Byte" hexmask.long.byte 0x0 0.--7. 1. "LL,CRC Low Lower Byte" group.word 0x0++0x1 line.word 0x0 "DATAL,CRC_DATAL register." hexmask.word 0x0 0.--15. 1. "DATAL,DATAL stores the lower 16 bits of the 16/32 bit CRC" group.byte 0x0++0x1 line.byte 0x0 "DATALL,CRC_DATALL register." hexmask.byte 0x0 0.--7. 1. "DATALL,CRCLL stores the first 8 bits of the 32 bit DATA" line.byte 0x1 "DATALU,CRC_DATALU register." hexmask.byte 0x1 0.--7. 1. "DATALU,DATALL stores the second 8 bits of the 32 bit CRC" group.word 0x2++0x1 line.word 0x0 "DATAH,CRC_DATAH register." hexmask.word 0x0 0.--15. 1. "DATAH,DATAH stores the high 16 bits of the 16/32 bit CRC" group.byte 0x2++0x1 line.byte 0x0 "DATAHL,CRC_DATAHL register." hexmask.byte 0x0 0.--7. 1. "DATAHL,DATAHL stores the third 8 bits of the 32 bit CRC" line.byte 0x1 "DATAHU,CRC_DATAHU register." hexmask.byte 0x1 0.--7. 1. "DATAHU,DATAHU stores the fourth 8 bits of the 32 bit CRC" group.long 0x4++0x7 line.long 0x0 "GPOLY,CRC Polynomial register" hexmask.long.word 0x0 16.--31. 1. "HIGH,High Polynominal Half-word" hexmask.long.word 0x0 0.--15. 1. "LOW,Low Polynominal Half-word" line.long 0x4 "CTRL,CRC Control register" bitfld.long 0x4 30.--31. "TOT,Type Of Transpose For Writes" "0: No transposition.,1: Bits in bytes are transposed; bytes are not..,?,?" bitfld.long 0x4 28.--29. "TOTR,Type Of Transpose For Read" "0: No transposition.,1: Bits in bytes are transposed; bytes are not..,?,?" newline bitfld.long 0x4 26. "FXOR,Complement Read Of CRC Data Register" "0: No XOR on reading.,1: Invert or complement the read value of the CRC.." bitfld.long 0x4 25. "WAS,Write CRC Data Register As Seed" "0: Writes to the CRC data register are data values.,1: Writes to the CRC data register are seed values." newline bitfld.long 0x4 24. "TCRC,TCRC" "0: 16-bit CRC protocol.,1: 32-bit CRC protocol." tree.end sif (cpuis("S32K116*")||cpuis("S32K118*")) base ad:0x14000800 elif (cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")||cpuis("S32K148*")) base ad:0x14001000 endif tree "CSE_PRAM (CSEc RAM)" group.long 0x0++0x3 line.long 0x0 "_EmbeddedRAM0,CSE PRAM 0 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x0++0x3 line.byte 0x0 "_EmbeddedRAM0LL,CSE PRAM0LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM0LU,CSE PRAM0LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM0HL,CSE PRAM0HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM0HU,CSE PRAM0HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x4++0x3 line.long 0x0 "_EmbeddedRAM1,CSE PRAM 1 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x4++0x3 line.byte 0x0 "_EmbeddedRAM1LL,CSE PRAM1LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM1LU,CSE PRAM1LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM1HL,CSE PRAM1HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM1HU,CSE PRAM1HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x8++0x3 line.long 0x0 "_EmbeddedRAM2,CSE PRAM 2 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x8++0x3 line.byte 0x0 "_EmbeddedRAM2LL,CSE PRAM2LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM2LU,CSE PRAM2LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM2HL,CSE PRAM2HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM2HU,CSE PRAM2HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0xC++0x3 line.long 0x0 "_EmbeddedRAM3,CSE PRAM 3 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0xC++0x3 line.byte 0x0 "_EmbeddedRAM3LL,CSE PRAM3LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM3LU,CSE PRAM3LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM3HL,CSE PRAM3HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM3HU,CSE PRAM3HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x10++0x3 line.long 0x0 "_EmbeddedRAM4,CSE PRAM 4 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x10++0x3 line.byte 0x0 "_EmbeddedRAM4LL,CSE PRAM4LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM4LU,CSE PRAM4LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM4HL,CSE PRAM4HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM4HU,CSE PRAM4HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x14++0x3 line.long 0x0 "_EmbeddedRAM5,CSE PRAM 5 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x14++0x3 line.byte 0x0 "_EmbeddedRAM5LL,CSE PRAM5LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM5LU,CSE PRAM5LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM5HL,CSE PRAM5HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM5HU,CSE PRAM5HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x18++0x3 line.long 0x0 "_EmbeddedRAM6,CSE PRAM 6 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x18++0x3 line.byte 0x0 "_EmbeddedRAM6LL,CSE PRAM6LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM6LU,CSE PRAM6LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM6HL,CSE PRAM6HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM6HU,CSE PRAM6HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x1C++0x3 line.long 0x0 "_EmbeddedRAM7,CSE PRAM 7 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x1C++0x3 line.byte 0x0 "_EmbeddedRAM7LL,CSE PRAM7LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM7LU,CSE PRAM7LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM7HL,CSE PRAM7HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM7HU,CSE PRAM7HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x20++0x3 line.long 0x0 "_EmbeddedRAM8,CSE PRAM 8 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x20++0x3 line.byte 0x0 "_EmbeddedRAM8LL,CSE PRAM8LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM8LU,CSE PRAM8LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM8HL,CSE PRAM8HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM8HU,CSE PRAM8HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x24++0x3 line.long 0x0 "_EmbeddedRAM9,CSE PRAM 9 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x24++0x3 line.byte 0x0 "_EmbeddedRAM9LL,CSE PRAM9LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM9LU,CSE PRAM9LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM9HL,CSE PRAM9HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM9HU,CSE PRAM9HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x28++0x3 line.long 0x0 "_EmbeddedRAM10,CSE PRAM 10 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x28++0x3 line.byte 0x0 "_EmbeddedRAM10LL,CSE PRAM10LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM10LU,CSE PRAM10LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM10HL,CSE PRAM10HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM10HU,CSE PRAM10HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x2C++0x3 line.long 0x0 "_EmbeddedRAM11,CSE PRAM 11 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x2C++0x3 line.byte 0x0 "_EmbeddedRAM11LL,CSE PRAM11LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM11LU,CSE PRAM11LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM11HL,CSE PRAM11HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM11HU,CSE PRAM11HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x30++0x3 line.long 0x0 "_EmbeddedRAM12,CSE PRAM 12 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x30++0x3 line.byte 0x0 "_EmbeddedRAM12LL,CSE PRAM12LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM12LU,CSE PRAM12LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM12HL,CSE PRAM12HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM12HU,CSE PRAM12HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x34++0x3 line.long 0x0 "_EmbeddedRAM13,CSE PRAM 13 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x34++0x3 line.byte 0x0 "_EmbeddedRAM13LL,CSE PRAM13LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM13LU,CSE PRAM13LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM13HL,CSE PRAM13HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM13HU,CSE PRAM13HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x38++0x3 line.long 0x0 "_EmbeddedRAM14,CSE PRAM 14 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x38++0x3 line.byte 0x0 "_EmbeddedRAM14LL,CSE PRAM14LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM14LU,CSE PRAM14LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM14HL,CSE PRAM14HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM14HU,CSE PRAM14HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x3C++0x3 line.long 0x0 "_EmbeddedRAM15,CSE PRAM 15 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x3C++0x3 line.byte 0x0 "_EmbeddedRAM15LL,CSE PRAM15LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM15LU,CSE PRAM15LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM15HL,CSE PRAM15HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM15HU,CSE PRAM15HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x40++0x3 line.long 0x0 "_EmbeddedRAM16,CSE PRAM 16 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x40++0x3 line.byte 0x0 "_EmbeddedRAM16LL,CSE PRAM16LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM16LU,CSE PRAM16LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM16HL,CSE PRAM16HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM16HU,CSE PRAM16HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x44++0x3 line.long 0x0 "_EmbeddedRAM17,CSE PRAM 17 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x44++0x3 line.byte 0x0 "_EmbeddedRAM17LL,CSE PRAM17LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM17LU,CSE PRAM17LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM17HL,CSE PRAM17HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM17HU,CSE PRAM17HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x48++0x3 line.long 0x0 "_EmbeddedRAM18,CSE PRAM 18 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x48++0x3 line.byte 0x0 "_EmbeddedRAM18LL,CSE PRAM18LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM18LU,CSE PRAM18LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM18HL,CSE PRAM18HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM18HU,CSE PRAM18HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x4C++0x3 line.long 0x0 "_EmbeddedRAM19,CSE PRAM 19 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x4C++0x3 line.byte 0x0 "_EmbeddedRAM19LL,CSE PRAM19LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM19LU,CSE PRAM19LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM19HL,CSE PRAM19HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM19HU,CSE PRAM19HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x50++0x3 line.long 0x0 "_EmbeddedRAM20,CSE PRAM 20 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x50++0x3 line.byte 0x0 "_EmbeddedRAM20LL,CSE PRAM20LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM20LU,CSE PRAM20LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM20HL,CSE PRAM20HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM20HU,CSE PRAM20HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x54++0x3 line.long 0x0 "_EmbeddedRAM21,CSE PRAM 21 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x54++0x3 line.byte 0x0 "_EmbeddedRAM21LL,CSE PRAM21LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM21LU,CSE PRAM21LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM21HL,CSE PRAM21HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM21HU,CSE PRAM21HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x58++0x3 line.long 0x0 "_EmbeddedRAM22,CSE PRAM 22 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x58++0x3 line.byte 0x0 "_EmbeddedRAM22LL,CSE PRAM22LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM22LU,CSE PRAM22LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM22HL,CSE PRAM22HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM22HU,CSE PRAM22HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x5C++0x3 line.long 0x0 "_EmbeddedRAM23,CSE PRAM 23 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x5C++0x3 line.byte 0x0 "_EmbeddedRAM23LL,CSE PRAM23LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM23LU,CSE PRAM23LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM23HL,CSE PRAM23HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM23HU,CSE PRAM23HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x60++0x3 line.long 0x0 "_EmbeddedRAM24,CSE PRAM 24 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x60++0x3 line.byte 0x0 "_EmbeddedRAM24LL,CSE PRAM24LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM24LU,CSE PRAM24LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM24HL,CSE PRAM24HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM24HU,CSE PRAM24HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x64++0x3 line.long 0x0 "_EmbeddedRAM25,CSE PRAM 25 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x64++0x3 line.byte 0x0 "_EmbeddedRAM25LL,CSE PRAM25LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM25LU,CSE PRAM25LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM25HL,CSE PRAM25HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM25HU,CSE PRAM25HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x68++0x3 line.long 0x0 "_EmbeddedRAM26,CSE PRAM 26 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x68++0x3 line.byte 0x0 "_EmbeddedRAM26LL,CSE PRAM26LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM26LU,CSE PRAM26LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM26HL,CSE PRAM26HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM26HU,CSE PRAM26HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x6C++0x3 line.long 0x0 "_EmbeddedRAM27,CSE PRAM 27 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x6C++0x3 line.byte 0x0 "_EmbeddedRAM27LL,CSE PRAM27LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM27LU,CSE PRAM27LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM27HL,CSE PRAM27HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM27HU,CSE PRAM27HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x70++0x3 line.long 0x0 "_EmbeddedRAM28,CSE PRAM 28 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x70++0x3 line.byte 0x0 "_EmbeddedRAM28LL,CSE PRAM28LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM28LU,CSE PRAM28LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM28HL,CSE PRAM28HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM28HU,CSE PRAM28HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x74++0x3 line.long 0x0 "_EmbeddedRAM29,CSE PRAM 29 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x74++0x3 line.byte 0x0 "_EmbeddedRAM29LL,CSE PRAM29LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM29LU,CSE PRAM29LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM29HL,CSE PRAM29HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM29HU,CSE PRAM29HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x78++0x3 line.long 0x0 "_EmbeddedRAM30,CSE PRAM 30 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x78++0x3 line.byte 0x0 "_EmbeddedRAM30LL,CSE PRAM30LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM30LU,CSE PRAM30LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM30HL,CSE PRAM30HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM30HU,CSE PRAM30HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" group.long 0x7C++0x3 line.long 0x0 "_EmbeddedRAM31,CSE PRAM 31 Register" hexmask.long.byte 0x0 24.--31. 1. "BYTE_0,Data byte 0 of Rx/Tx frame." hexmask.long.byte 0x0 16.--23. 1. "BYTE_1,Data byte 1 of Rx/Tx frame." hexmask.long.byte 0x0 8.--15. 1. "BYTE_2,Data byte 2 of Rx/Tx frame." hexmask.long.byte 0x0 0.--7. 1. "BYTE_3,Data byte 3 of Rx/Tx frame." group.byte 0x7C++0x3 line.byte 0x0 "_EmbeddedRAM31LL,CSE PRAM31LL register." hexmask.byte 0x0 0.--7. 1. "RAM_LL,RAM_LL stores the first 8 bits of the 32 bit CRC" line.byte 0x1 "_EmbeddedRAM31LU,CSE PRAM31LU register." hexmask.byte 0x1 0.--7. 1. "RAM_LU,RAM_LU stores the second 8 bits of the 32 bit CRC" line.byte 0x2 "_EmbeddedRAM31HL,CSE PRAM31HL register." hexmask.byte 0x2 0.--7. 1. "RAM_HL,RAM_HL stores the third 8 bits of the 32 bit CRC" line.byte 0x3 "_EmbeddedRAM31HU,CSE PRAM31HU register." hexmask.byte 0x3 0.--7. 1. "RAM_HU,RAM_HU stores the fourth 8 bits of the 32 bit CRC" tree.end tree "DMA (Direct Memory Access)" base ad:0x40008000 group.long 0x0++0x3 line.long 0x0 "CR,Control Register" sif (cpuis("S32K146*")) rbitfld.long 0x0 31. "ACTIVE,DMA Active Status" "0: eDMA is idle.,1: eDMA is executing a channel." endif bitfld.long 0x0 17. "CX,Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer. Stop the.." newline bitfld.long 0x0 16. "ECX,Error Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer in the same.." bitfld.long 0x0 7. "EMLM,Enable Minor Loop Mapping" "0: Disabled. TCDn.word2 is defined as a 32-bit..,1: Enabled. TCDn.word2 is redefined to include.." newline bitfld.long 0x0 6. "CLM,Continuous Link Mode" "0: A minor loop channel link made to itself goes..,1: A minor loop channel link made to itself does.." bitfld.long 0x0 5. "HALT,Halt DMA Operations" "0: Normal operation,1: Stall the start of any new channels. Executing.." newline bitfld.long 0x0 4. "HOE,Halt On Error" "0: Normal operation,1: Any error causes the HALT bit to set." bitfld.long 0x0 2. "ERCA,Enable Round Robin Channel Arbitration" "0,1" newline bitfld.long 0x0 1. "EDBG,Enable Debug" "0,1" rgroup.long 0x4++0x3 line.long 0x0 "ES,Error Status Register" bitfld.long 0x0 31. "VLD,VLD" "0: No ERR bits are set.,1: At least one ERR bit is set indicating a valid.." bitfld.long 0x0 16. "ECX,Transfer Canceled" "0: No canceled transfers,1: The last recorded entry was a canceled transfer.." newline bitfld.long 0x0 14. "CPE,Channel Priority Error" "0: No channel priority error,?" hexmask.long.byte 0x0 8.--11. 1. "ERRCHN,Error Channel Number or Canceled Channel Number" newline bitfld.long 0x0 7. "SAE,Source Address Error" "0: No source address configuration error.,1: The last recorded error was a configuration.." bitfld.long 0x0 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: The last recorded error was a configuration.." newline bitfld.long 0x0 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: The last recorded error was a configuration.." bitfld.long 0x0 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: The last recorded error was a configuration.." newline bitfld.long 0x0 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,?" bitfld.long 0x0 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: The last recorded error was a configuration.." newline bitfld.long 0x0 1. "SBE,Source Bus Error" "0: No source bus error,1: The last recorded error was a bus error on a.." bitfld.long 0x0 0. "DBE,Destination Bus Error" "0: No destination bus error,1: The last recorded error was a bus error on a.." group.long 0xC++0x3 line.long 0x0 "ERQ,Enable Request Register" bitfld.long 0x0 15. "ERQ15,Enable DMA Request 15" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." bitfld.long 0x0 14. "ERQ14,Enable DMA Request 14" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." newline bitfld.long 0x0 13. "ERQ13,Enable DMA Request 13" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." bitfld.long 0x0 12. "ERQ12,Enable DMA Request 12" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." newline bitfld.long 0x0 11. "ERQ11,Enable DMA Request 11" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." bitfld.long 0x0 10. "ERQ10,Enable DMA Request 10" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." newline bitfld.long 0x0 9. "ERQ9,Enable DMA Request 9" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." bitfld.long 0x0 8. "ERQ8,Enable DMA Request 8" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." newline bitfld.long 0x0 7. "ERQ7,Enable DMA Request 7" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." bitfld.long 0x0 6. "ERQ6,Enable DMA Request 6" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." newline bitfld.long 0x0 5. "ERQ5,Enable DMA Request 5" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." bitfld.long 0x0 4. "ERQ4,Enable DMA Request 4" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." newline bitfld.long 0x0 3. "ERQ3,Enable DMA Request 3" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." bitfld.long 0x0 2. "ERQ2,Enable DMA Request 2" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." newline bitfld.long 0x0 1. "ERQ1,Enable DMA Request 1" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." bitfld.long 0x0 0. "ERQ0,Enable DMA Request 0" "0: The DMA request signal for the corresponding..,1: The DMA request signal for the corresponding.." group.long 0x14++0x3 line.long 0x0 "EEI,Enable Error Interrupt Register" bitfld.long 0x0 15. "EEI15,Enable Error Interrupt 15" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." bitfld.long 0x0 14. "EEI14,Enable Error Interrupt 14" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." newline bitfld.long 0x0 13. "EEI13,Enable Error Interrupt 13" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." bitfld.long 0x0 12. "EEI12,Enable Error Interrupt 12" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." newline bitfld.long 0x0 11. "EEI11,Enable Error Interrupt 11" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." bitfld.long 0x0 10. "EEI10,Enable Error Interrupt 10" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." newline bitfld.long 0x0 9. "EEI9,Enable Error Interrupt 9" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." bitfld.long 0x0 8. "EEI8,Enable Error Interrupt 8" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." newline bitfld.long 0x0 7. "EEI7,Enable Error Interrupt 7" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." bitfld.long 0x0 6. "EEI6,Enable Error Interrupt 6" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." newline bitfld.long 0x0 5. "EEI5,Enable Error Interrupt 5" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." bitfld.long 0x0 4. "EEI4,Enable Error Interrupt 4" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." newline bitfld.long 0x0 3. "EEI3,Enable Error Interrupt 3" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." bitfld.long 0x0 2. "EEI2,Enable Error Interrupt 2" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." newline bitfld.long 0x0 1. "EEI1,Enable Error Interrupt 1" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." bitfld.long 0x0 0. "EEI0,Enable Error Interrupt 0" "0: The error signal for corresponding channel does..,1: The assertion of the error signal for.." wgroup.byte 0x18++0x7 line.byte 0x0 "CEEI,Clear Enable Error Interrupt Register" bitfld.byte 0x0 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.." bitfld.byte 0x0 6. "CAEE,Clear All Enable Error Interrupts" "0,1" newline hexmask.byte 0x0 0.--3. 1. "CEEI,Clear Enable Error Interrupt" line.byte 0x1 "SEEI,Set Enable Error Interrupt Register" bitfld.byte 0x1 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.." bitfld.byte 0x1 6. "SAEE,Sets All Enable Error Interrupts" "0,1" newline hexmask.byte 0x1 0.--3. 1. "SEEI,Set Enable Error Interrupt" line.byte 0x2 "CERQ,Clear Enable Request Register" bitfld.byte 0x2 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.." bitfld.byte 0x2 6. "CAER,Clear All Enable Requests" "0,1" newline hexmask.byte 0x2 0.--3. 1. "CERQ,Clear Enable Request" line.byte 0x3 "SERQ,Set Enable Request Register" bitfld.byte 0x3 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.." bitfld.byte 0x3 6. "SAER,Set All Enable Requests" "0,1" newline hexmask.byte 0x3 0.--3. 1. "SERQ,Set Enable Request" line.byte 0x4 "CDNE,Clear DONE Status Bit Register" bitfld.byte 0x4 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.." bitfld.byte 0x4 6. "CADN,Clears All DONE Bits" "0: Clears only the TCDn_CSR[DONE] bit specified in..,1: Clears all bits in TCDn_CSR[DONE]" newline hexmask.byte 0x4 0.--3. 1. "CDNE,Clear DONE Bit" line.byte 0x5 "SSRT,Set START Bit Register" bitfld.byte 0x5 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.." bitfld.byte 0x5 6. "SAST,Set All START Bits (activates all channels)" "0: Set only the TCDn_CSR[START] bit specified in..,1: Set all bits in TCDn_CSR[START]" newline hexmask.byte 0x5 0.--3. 1. "SSRT,Set START Bit" line.byte 0x6 "CERR,Clear Error Register" bitfld.byte 0x6 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.." bitfld.byte 0x6 6. "CAEI,Clear All Error Indicators" "0,1" newline hexmask.byte 0x6 0.--3. 1. "CERR,Clear Error Indicator" line.byte 0x7 "CINT,Clear Interrupt Request Register" bitfld.byte 0x7 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.." bitfld.byte 0x7 6. "CAIR,Clear All Interrupt Requests" "0,1" newline hexmask.byte 0x7 0.--3. 1. "CINT,Clear Interrupt Request" group.long 0x24++0x3 line.long 0x0 "INT,Interrupt Request Register" bitfld.long 0x0 15. "INT15,Interrupt Request 15" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." bitfld.long 0x0 14. "INT14,Interrupt Request 14" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." newline bitfld.long 0x0 13. "INT13,Interrupt Request 13" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." bitfld.long 0x0 12. "INT12,Interrupt Request 12" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." newline bitfld.long 0x0 11. "INT11,Interrupt Request 11" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." bitfld.long 0x0 10. "INT10,Interrupt Request 10" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." newline bitfld.long 0x0 9. "INT9,Interrupt Request 9" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." bitfld.long 0x0 8. "INT8,Interrupt Request 8" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." newline bitfld.long 0x0 7. "INT7,Interrupt Request 7" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." bitfld.long 0x0 6. "INT6,Interrupt Request 6" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." newline bitfld.long 0x0 5. "INT5,Interrupt Request 5" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." bitfld.long 0x0 4. "INT4,Interrupt Request 4" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." newline bitfld.long 0x0 3. "INT3,Interrupt Request 3" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." bitfld.long 0x0 2. "INT2,Interrupt Request 2" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." newline bitfld.long 0x0 1. "INT1,Interrupt Request 1" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." bitfld.long 0x0 0. "INT0,Interrupt Request 0" "0: The interrupt request for corresponding channel..,1: The interrupt request for corresponding channel.." group.long 0x2C++0x3 line.long 0x0 "ERR,Error Register" bitfld.long 0x0 15. "ERR15,Error In Channel 15" "0: An error in this channel has not occurred,1: An error in this channel has occurred" bitfld.long 0x0 14. "ERR14,Error In Channel 14" "0: An error in this channel has not occurred,1: An error in this channel has occurred" newline bitfld.long 0x0 13. "ERR13,Error In Channel 13" "0: An error in this channel has not occurred,1: An error in this channel has occurred" bitfld.long 0x0 12. "ERR12,Error In Channel 12" "0: An error in this channel has not occurred,1: An error in this channel has occurred" newline bitfld.long 0x0 11. "ERR11,Error In Channel 11" "0: An error in this channel has not occurred,1: An error in this channel has occurred" bitfld.long 0x0 10. "ERR10,Error In Channel 10" "0: An error in this channel has not occurred,1: An error in this channel has occurred" newline bitfld.long 0x0 9. "ERR9,Error In Channel 9" "0: An error in this channel has not occurred,1: An error in this channel has occurred" bitfld.long 0x0 8. "ERR8,Error In Channel 8" "0: An error in this channel has not occurred,1: An error in this channel has occurred" newline bitfld.long 0x0 7. "ERR7,Error In Channel 7" "0: An error in this channel has not occurred,1: An error in this channel has occurred" bitfld.long 0x0 6. "ERR6,Error In Channel 6" "0: An error in this channel has not occurred,1: An error in this channel has occurred" newline bitfld.long 0x0 5. "ERR5,Error In Channel 5" "0: An error in this channel has not occurred,1: An error in this channel has occurred" bitfld.long 0x0 4. "ERR4,Error In Channel 4" "0: An error in this channel has not occurred,1: An error in this channel has occurred" newline bitfld.long 0x0 3. "ERR3,Error In Channel 3" "0: An error in this channel has not occurred,1: An error in this channel has occurred" bitfld.long 0x0 2. "ERR2,Error In Channel 2" "0: An error in this channel has not occurred,1: An error in this channel has occurred" newline bitfld.long 0x0 1. "ERR1,Error In Channel 1" "0: An error in this channel has not occurred,1: An error in this channel has occurred" bitfld.long 0x0 0. "ERR0,Error In Channel 0" "0: An error in this channel has not occurred,1: An error in this channel has occurred" rgroup.long 0x34++0x3 line.long 0x0 "HRS,Hardware Request Status Register" bitfld.long 0x0 15. "HRS15,Hardware Request Status Channel 15" "0: A hardware service request for channel 15 is not..,1: A hardware service request for channel 15 is.." bitfld.long 0x0 14. "HRS14,Hardware Request Status Channel 14" "0: A hardware service request for channel 14 is not..,1: A hardware service request for channel 14 is.." newline bitfld.long 0x0 13. "HRS13,Hardware Request Status Channel 13" "0: A hardware service request for channel 13 is not..,1: A hardware service request for channel 13 is.." bitfld.long 0x0 12. "HRS12,Hardware Request Status Channel 12" "0: A hardware service request for channel 12 is not..,1: A hardware service request for channel 12 is.." newline bitfld.long 0x0 11. "HRS11,Hardware Request Status Channel 11" "0: A hardware service request for channel 11 is not..,1: A hardware service request for channel 11 is.." bitfld.long 0x0 10. "HRS10,Hardware Request Status Channel 10" "0: A hardware service request for channel 10 is not..,1: A hardware service request for channel 10 is.." newline bitfld.long 0x0 9. "HRS9,Hardware Request Status Channel 9" "0: A hardware service request for channel 9 is not..,1: A hardware service request for channel 9 is.." bitfld.long 0x0 8. "HRS8,Hardware Request Status Channel 8" "0: A hardware service request for channel 8 is not..,1: A hardware service request for channel 8 is.." newline bitfld.long 0x0 7. "HRS7,Hardware Request Status Channel 7" "0: A hardware service request for channel 7 is not..,1: A hardware service request for channel 7 is.." bitfld.long 0x0 6. "HRS6,Hardware Request Status Channel 6" "0: A hardware service request for channel 6 is not..,1: A hardware service request for channel 6 is.." newline bitfld.long 0x0 5. "HRS5,Hardware Request Status Channel 5" "0: A hardware service request for channel 5 is not..,1: A hardware service request for channel 5 is.." bitfld.long 0x0 4. "HRS4,Hardware Request Status Channel 4" "0: A hardware service request for channel 4 is not..,1: A hardware service request for channel 4 is.." newline bitfld.long 0x0 3. "HRS3,Hardware Request Status Channel 3" "0: A hardware service request for channel 3 is not..,1: A hardware service request for channel 3 is.." bitfld.long 0x0 2. "HRS2,Hardware Request Status Channel 2" "0: A hardware service request for channel 2 is not..,1: A hardware service request for channel 2 is.." newline bitfld.long 0x0 1. "HRS1,Hardware Request Status Channel 1" "0: A hardware service request for channel 1 is not..,1: A hardware service request for channel 1 is.." bitfld.long 0x0 0. "HRS0,Hardware Request Status Channel 0" "0: A hardware service request for channel 0 is not..,1: A hardware service request for channel 0 is.." group.long 0x44++0x3 line.long 0x0 "EARS,Enable Asynchronous Request in Stop Register" bitfld.long 0x0 15. "EDREQ_15,Enable asynchronous DMA request in stop mode for channel 15" "0: Disable asynchronous DMA request for channel 15.,1: Enable asynchronous DMA request for channel 15." bitfld.long 0x0 14. "EDREQ_14,Enable asynchronous DMA request in stop mode for channel 14" "0: Disable asynchronous DMA request for channel 14.,1: Enable asynchronous DMA request for channel 14." newline bitfld.long 0x0 13. "EDREQ_13,Enable asynchronous DMA request in stop mode for channel 13" "0: Disable asynchronous DMA request for channel 13.,1: Enable asynchronous DMA request for channel 13." bitfld.long 0x0 12. "EDREQ_12,Enable asynchronous DMA request in stop mode for channel 12" "0: Disable asynchronous DMA request for channel 12.,1: Enable asynchronous DMA request for channel 12." newline bitfld.long 0x0 11. "EDREQ_11,Enable asynchronous DMA request in stop mode for channel 11" "0: Disable asynchronous DMA request for channel 11.,1: Enable asynchronous DMA request for channel 11." bitfld.long 0x0 10. "EDREQ_10,Enable asynchronous DMA request in stop mode for channel 10" "0: Disable asynchronous DMA request for channel 10.,1: Enable asynchronous DMA request for channel 10." newline bitfld.long 0x0 9. "EDREQ_9,Enable asynchronous DMA request in stop mode for channel 9" "0: Disable asynchronous DMA request for channel 9.,1: Enable asynchronous DMA request for channel 9." bitfld.long 0x0 8. "EDREQ_8,Enable asynchronous DMA request in stop mode for channel 8" "0: Disable asynchronous DMA request for channel 8.,1: Enable asynchronous DMA request for channel 8." newline bitfld.long 0x0 7. "EDREQ_7,Enable asynchronous DMA request in stop mode for channel 7" "0: Disable asynchronous DMA request for channel 7.,1: Enable asynchronous DMA request for channel 7." bitfld.long 0x0 6. "EDREQ_6,Enable asynchronous DMA request in stop mode for channel 6" "0: Disable asynchronous DMA request for channel 6.,1: Enable asynchronous DMA request for channel 6." newline bitfld.long 0x0 5. "EDREQ_5,Enable asynchronous DMA request in stop mode for channel 5" "0: Disable asynchronous DMA request for channel 5.,1: Enable asynchronous DMA request for channel 5." bitfld.long 0x0 4. "EDREQ_4,Enable asynchronous DMA request in stop mode for channel 4" "0: Disable asynchronous DMA request for channel 4.,1: Enable asynchronous DMA request for channel 4." newline bitfld.long 0x0 3. "EDREQ_3,Enable asynchronous DMA request in stop mode for channel 3." "0: Disable asynchronous DMA request for channel 3.,1: Enable asynchronous DMA request for channel 3." bitfld.long 0x0 2. "EDREQ_2,Enable asynchronous DMA request in stop mode for channel 2." "0: Disable asynchronous DMA request for channel 2.,1: Enable asynchronous DMA request for channel 2." newline bitfld.long 0x0 1. "EDREQ_1,Enable asynchronous DMA request in stop mode for channel 1." "0: Disable asynchronous DMA request for channel 1,1: Enable asynchronous DMA request for channel 1." bitfld.long 0x0 0. "EDREQ_0,Enable asynchronous DMA request in stop mode for channel 0." "0: Disable asynchronous DMA request for channel 0.,1: Enable asynchronous DMA request for channel 0." group.byte 0x100++0x3 line.byte 0x0 "DCHPRI3,Channel n Priority Register" bitfld.byte 0x0 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x0 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x0 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x1 "DCHPRI2,Channel n Priority Register" bitfld.byte 0x1 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x1 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x1 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x2 "DCHPRI1,Channel n Priority Register" bitfld.byte 0x2 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x2 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x2 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x3 "DCHPRI0,Channel n Priority Register" bitfld.byte 0x3 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x3 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x3 0.--3. 1. "CHPRI,Channel n Arbitration Priority" sif (cpuis("S32K142*")) group.byte 0x104++0xB line.byte 0x0 "DCHPRI7,Channel n Priority Register" bitfld.byte 0x0 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x0 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x0 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x1 "DCHPRI6,Channel n Priority Register" bitfld.byte 0x1 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x1 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x1 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x2 "DCHPRI5,Channel n Priority Register" bitfld.byte 0x2 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x2 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x2 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x3 "DCHPRI4,Channel n Priority Register" bitfld.byte 0x3 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x3 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x3 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x4 "DCHPRI11,Channel n Priority Register" bitfld.byte 0x4 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x4 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x4 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x5 "DCHPRI10,Channel n Priority Register" bitfld.byte 0x5 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x5 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x5 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x6 "DCHPRI9,Channel n Priority Register" bitfld.byte 0x6 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x6 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x6 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x7 "DCHPRI8,Channel n Priority Register" bitfld.byte 0x7 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x7 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x7 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x8 "DCHPRI15,Channel n Priority Register" bitfld.byte 0x8 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x8 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x8 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x9 "DCHPRI14,Channel n Priority Register" bitfld.byte 0x9 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x9 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x9 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0xA "DCHPRI13,Channel n Priority Register" bitfld.byte 0xA 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0xA 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0xA 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0xB "DCHPRI12,Channel n Priority Register" bitfld.byte 0xB 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0xB 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0xB 0.--3. 1. "CHPRI,Channel n Arbitration Priority" endif sif (cpuis("S32K144*")) group.byte 0x104++0xB line.byte 0x0 "DCHPRI7,Channel n Priority Register" bitfld.byte 0x0 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x0 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x0 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x1 "DCHPRI6,Channel n Priority Register" bitfld.byte 0x1 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x1 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x1 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x2 "DCHPRI5,Channel n Priority Register" bitfld.byte 0x2 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x2 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x2 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x3 "DCHPRI4,Channel n Priority Register" bitfld.byte 0x3 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x3 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x3 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x4 "DCHPRI11,Channel n Priority Register" bitfld.byte 0x4 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x4 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x4 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x5 "DCHPRI10,Channel n Priority Register" bitfld.byte 0x5 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x5 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x5 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x6 "DCHPRI9,Channel n Priority Register" bitfld.byte 0x6 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x6 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x6 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x7 "DCHPRI8,Channel n Priority Register" bitfld.byte 0x7 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x7 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x7 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x8 "DCHPRI15,Channel n Priority Register" bitfld.byte 0x8 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x8 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x8 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x9 "DCHPRI14,Channel n Priority Register" bitfld.byte 0x9 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x9 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x9 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0xA "DCHPRI13,Channel n Priority Register" bitfld.byte 0xA 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0xA 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0xA 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0xB "DCHPRI12,Channel n Priority Register" bitfld.byte 0xB 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0xB 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0xB 0.--3. 1. "CHPRI,Channel n Arbitration Priority" group.long 0x1080++0x3 line.long 0x0 "TCD4_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1084++0x3 line.word 0x0 "TCD4_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD4_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1088++0xB line.long 0x0 "TCD4_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD4_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD4_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1094++0x3 line.word 0x0 "TCD4_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD4_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1098++0x3 line.long 0x0 "TCD4_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x109C++0x3 line.word 0x0 "TCD4_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD4_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10A0++0x3 line.long 0x0 "TCD5_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10A4++0x3 line.word 0x0 "TCD5_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD5_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10A8++0xB line.long 0x0 "TCD5_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD5_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD5_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10B4++0x3 line.word 0x0 "TCD5_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD5_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10B8++0x3 line.long 0x0 "TCD5_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10BC++0x3 line.word 0x0 "TCD5_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD5_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10C0++0x3 line.long 0x0 "TCD6_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10C4++0x3 line.word 0x0 "TCD6_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD6_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10C8++0xB line.long 0x0 "TCD6_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD6_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD6_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10D4++0x3 line.word 0x0 "TCD6_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD6_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10D8++0x3 line.long 0x0 "TCD6_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10DC++0x3 line.word 0x0 "TCD6_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD6_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10E0++0x3 line.long 0x0 "TCD7_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10E4++0x3 line.word 0x0 "TCD7_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD7_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10E8++0xB line.long 0x0 "TCD7_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD7_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD7_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10F4++0x3 line.word 0x0 "TCD7_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD7_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10F8++0x3 line.long 0x0 "TCD7_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10FC++0x3 line.word 0x0 "TCD7_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD7_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1100++0x3 line.long 0x0 "TCD8_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1104++0x3 line.word 0x0 "TCD8_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD8_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1108++0xB line.long 0x0 "TCD8_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD8_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD8_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1114++0x3 line.word 0x0 "TCD8_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD8_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1118++0x3 line.long 0x0 "TCD8_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x111C++0x3 line.word 0x0 "TCD8_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD8_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1120++0x3 line.long 0x0 "TCD9_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1124++0x3 line.word 0x0 "TCD9_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD9_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1128++0xB line.long 0x0 "TCD9_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD9_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD9_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1134++0x3 line.word 0x0 "TCD9_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD9_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1138++0x3 line.long 0x0 "TCD9_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x113C++0x3 line.word 0x0 "TCD9_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD9_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1140++0x3 line.long 0x0 "TCD10_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1144++0x3 line.word 0x0 "TCD10_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD10_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1148++0xB line.long 0x0 "TCD10_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD10_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD10_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1154++0x3 line.word 0x0 "TCD10_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD10_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1158++0x3 line.long 0x0 "TCD10_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x115C++0x3 line.word 0x0 "TCD10_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD10_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1160++0x3 line.long 0x0 "TCD11_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1164++0x3 line.word 0x0 "TCD11_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD11_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1168++0xB line.long 0x0 "TCD11_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD11_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD11_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1174++0x3 line.word 0x0 "TCD11_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD11_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1178++0x3 line.long 0x0 "TCD11_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x117C++0x3 line.word 0x0 "TCD11_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD11_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1180++0x3 line.long 0x0 "TCD12_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1184++0x3 line.word 0x0 "TCD12_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD12_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1188++0xB line.long 0x0 "TCD12_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD12_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD12_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1194++0x3 line.word 0x0 "TCD12_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD12_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1198++0x3 line.long 0x0 "TCD12_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x119C++0x3 line.word 0x0 "TCD12_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD12_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11A0++0x3 line.long 0x0 "TCD13_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11A4++0x3 line.word 0x0 "TCD13_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD13_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11A8++0xB line.long 0x0 "TCD13_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD13_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD13_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11B4++0x3 line.word 0x0 "TCD13_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD13_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11B8++0x3 line.long 0x0 "TCD13_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11BC++0x3 line.word 0x0 "TCD13_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD13_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11C0++0x3 line.long 0x0 "TCD14_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11C4++0x3 line.word 0x0 "TCD14_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD14_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11C8++0xB line.long 0x0 "TCD14_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD14_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD14_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11D4++0x3 line.word 0x0 "TCD14_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD14_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11D8++0x3 line.long 0x0 "TCD14_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11DC++0x3 line.word 0x0 "TCD14_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD14_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11E0++0x3 line.long 0x0 "TCD15_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11E4++0x3 line.word 0x0 "TCD15_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD15_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11E8++0xB line.long 0x0 "TCD15_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD15_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD15_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11F4++0x3 line.word 0x0 "TCD15_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD15_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11F8++0x3 line.long 0x0 "TCD15_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11FC++0x1 line.word 0x0 "TCD15_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." endif sif (cpuis("S32K146*")) group.byte 0x104++0xB line.byte 0x0 "DCHPRI7,Channel n Priority Register" bitfld.byte 0x0 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x0 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x0 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x1 "DCHPRI6,Channel n Priority Register" bitfld.byte 0x1 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x1 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x1 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x2 "DCHPRI5,Channel n Priority Register" bitfld.byte 0x2 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x2 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x2 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x3 "DCHPRI4,Channel n Priority Register" bitfld.byte 0x3 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x3 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x3 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x4 "DCHPRI11,Channel n Priority Register" bitfld.byte 0x4 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x4 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x4 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x5 "DCHPRI10,Channel n Priority Register" bitfld.byte 0x5 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x5 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x5 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x6 "DCHPRI9,Channel n Priority Register" bitfld.byte 0x6 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x6 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x6 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x7 "DCHPRI8,Channel n Priority Register" bitfld.byte 0x7 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x7 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x7 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x8 "DCHPRI15,Channel n Priority Register" bitfld.byte 0x8 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x8 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x8 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x9 "DCHPRI14,Channel n Priority Register" bitfld.byte 0x9 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x9 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x9 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0xA "DCHPRI13,Channel n Priority Register" bitfld.byte 0xA 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0xA 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0xA 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0xB "DCHPRI12,Channel n Priority Register" bitfld.byte 0xB 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0xB 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0xB 0.--3. 1. "CHPRI,Channel n Arbitration Priority" group.long 0x1080++0x3 line.long 0x0 "TCD4_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1084++0x3 line.word 0x0 "TCD4_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD4_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1088++0xB line.long 0x0 "TCD4_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD4_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD4_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1094++0x3 line.word 0x0 "TCD4_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD4_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1098++0x3 line.long 0x0 "TCD4_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x109C++0x3 line.word 0x0 "TCD4_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD4_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10A0++0x3 line.long 0x0 "TCD5_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10A4++0x3 line.word 0x0 "TCD5_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD5_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10A8++0xB line.long 0x0 "TCD5_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD5_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD5_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10B4++0x3 line.word 0x0 "TCD5_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD5_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10B8++0x3 line.long 0x0 "TCD5_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10BC++0x3 line.word 0x0 "TCD5_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD5_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10C0++0x3 line.long 0x0 "TCD6_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10C4++0x3 line.word 0x0 "TCD6_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD6_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10C8++0xB line.long 0x0 "TCD6_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD6_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD6_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10D4++0x3 line.word 0x0 "TCD6_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD6_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10D8++0x3 line.long 0x0 "TCD6_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10DC++0x3 line.word 0x0 "TCD6_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD6_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10E0++0x3 line.long 0x0 "TCD7_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10E4++0x3 line.word 0x0 "TCD7_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD7_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10E8++0xB line.long 0x0 "TCD7_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD7_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD7_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10F4++0x3 line.word 0x0 "TCD7_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD7_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10F8++0x3 line.long 0x0 "TCD7_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10FC++0x3 line.word 0x0 "TCD7_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD7_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1100++0x3 line.long 0x0 "TCD8_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1104++0x3 line.word 0x0 "TCD8_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD8_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1108++0xB line.long 0x0 "TCD8_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD8_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD8_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1114++0x3 line.word 0x0 "TCD8_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD8_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1118++0x3 line.long 0x0 "TCD8_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x111C++0x3 line.word 0x0 "TCD8_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD8_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1120++0x3 line.long 0x0 "TCD9_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1124++0x3 line.word 0x0 "TCD9_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD9_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1128++0xB line.long 0x0 "TCD9_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD9_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD9_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1134++0x3 line.word 0x0 "TCD9_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD9_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1138++0x3 line.long 0x0 "TCD9_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x113C++0x3 line.word 0x0 "TCD9_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD9_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1140++0x3 line.long 0x0 "TCD10_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1144++0x3 line.word 0x0 "TCD10_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD10_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1148++0xB line.long 0x0 "TCD10_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD10_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD10_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1154++0x3 line.word 0x0 "TCD10_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD10_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1158++0x3 line.long 0x0 "TCD10_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x115C++0x3 line.word 0x0 "TCD10_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD10_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1160++0x3 line.long 0x0 "TCD11_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1164++0x3 line.word 0x0 "TCD11_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD11_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1168++0xB line.long 0x0 "TCD11_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD11_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD11_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1174++0x3 line.word 0x0 "TCD11_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD11_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1178++0x3 line.long 0x0 "TCD11_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x117C++0x3 line.word 0x0 "TCD11_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD11_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1180++0x3 line.long 0x0 "TCD12_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1184++0x3 line.word 0x0 "TCD12_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD12_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1188++0xB line.long 0x0 "TCD12_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD12_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD12_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1194++0x3 line.word 0x0 "TCD12_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD12_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1198++0x3 line.long 0x0 "TCD12_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x119C++0x3 line.word 0x0 "TCD12_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD12_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11A0++0x3 line.long 0x0 "TCD13_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11A4++0x3 line.word 0x0 "TCD13_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD13_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11A8++0xB line.long 0x0 "TCD13_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD13_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD13_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11B4++0x3 line.word 0x0 "TCD13_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD13_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11B8++0x3 line.long 0x0 "TCD13_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11BC++0x3 line.word 0x0 "TCD13_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD13_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11C0++0x3 line.long 0x0 "TCD14_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11C4++0x3 line.word 0x0 "TCD14_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD14_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11C8++0xB line.long 0x0 "TCD14_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD14_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD14_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11D4++0x3 line.word 0x0 "TCD14_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD14_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11D8++0x3 line.long 0x0 "TCD14_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11DC++0x3 line.word 0x0 "TCD14_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD14_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11E0++0x3 line.long 0x0 "TCD15_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11E4++0x3 line.word 0x0 "TCD15_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD15_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11E8++0xB line.long 0x0 "TCD15_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD15_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD15_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11F4++0x3 line.word 0x0 "TCD15_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD15_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11F8++0x3 line.long 0x0 "TCD15_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11FC++0x1 line.word 0x0 "TCD15_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." endif sif (cpuis("S32K148*")) group.byte 0x104++0xB line.byte 0x0 "DCHPRI7,Channel n Priority Register" bitfld.byte 0x0 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x0 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x0 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x1 "DCHPRI6,Channel n Priority Register" bitfld.byte 0x1 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x1 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x1 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x2 "DCHPRI5,Channel n Priority Register" bitfld.byte 0x2 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x2 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x2 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x3 "DCHPRI4,Channel n Priority Register" bitfld.byte 0x3 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x3 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x3 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x4 "DCHPRI11,Channel n Priority Register" bitfld.byte 0x4 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x4 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x4 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x5 "DCHPRI10,Channel n Priority Register" bitfld.byte 0x5 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x5 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x5 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x6 "DCHPRI9,Channel n Priority Register" bitfld.byte 0x6 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x6 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x6 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x7 "DCHPRI8,Channel n Priority Register" bitfld.byte 0x7 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x7 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x7 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x8 "DCHPRI15,Channel n Priority Register" bitfld.byte 0x8 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x8 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x8 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0x9 "DCHPRI14,Channel n Priority Register" bitfld.byte 0x9 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0x9 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0x9 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0xA "DCHPRI13,Channel n Priority Register" bitfld.byte 0xA 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0xA 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0xA 0.--3. 1. "CHPRI,Channel n Arbitration Priority" line.byte 0xB "DCHPRI12,Channel n Priority Register" bitfld.byte 0xB 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.." bitfld.byte 0xB 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel.,1: Channel n cannot suspend any channel regardless.." newline hexmask.byte 0xB 0.--3. 1. "CHPRI,Channel n Arbitration Priority" group.long 0x1080++0x3 line.long 0x0 "TCD4_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1084++0x3 line.word 0x0 "TCD4_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD4_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1088++0xB line.long 0x0 "TCD4_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD4_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD4_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1094++0x3 line.word 0x0 "TCD4_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD4_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1098++0x3 line.long 0x0 "TCD4_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x109C++0x3 line.word 0x0 "TCD4_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD4_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10A0++0x3 line.long 0x0 "TCD5_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10A4++0x3 line.word 0x0 "TCD5_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD5_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10A8++0xB line.long 0x0 "TCD5_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD5_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD5_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10B4++0x3 line.word 0x0 "TCD5_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD5_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10B8++0x3 line.long 0x0 "TCD5_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10BC++0x3 line.word 0x0 "TCD5_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD5_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10C0++0x3 line.long 0x0 "TCD6_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10C4++0x3 line.word 0x0 "TCD6_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD6_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10C8++0xB line.long 0x0 "TCD6_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD6_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD6_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10D4++0x3 line.word 0x0 "TCD6_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD6_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10D8++0x3 line.long 0x0 "TCD6_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10DC++0x3 line.word 0x0 "TCD6_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD6_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x10E0++0x3 line.long 0x0 "TCD7_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10E4++0x3 line.word 0x0 "TCD7_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD7_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10E8++0xB line.long 0x0 "TCD7_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD7_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD7_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10F4++0x3 line.word 0x0 "TCD7_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD7_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x10F8++0x3 line.long 0x0 "TCD7_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10FC++0x3 line.word 0x0 "TCD7_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD7_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1100++0x3 line.long 0x0 "TCD8_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1104++0x3 line.word 0x0 "TCD8_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD8_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1108++0xB line.long 0x0 "TCD8_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD8_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD8_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1114++0x3 line.word 0x0 "TCD8_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD8_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1118++0x3 line.long 0x0 "TCD8_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x111C++0x3 line.word 0x0 "TCD8_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD8_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1120++0x3 line.long 0x0 "TCD9_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1124++0x3 line.word 0x0 "TCD9_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD9_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1128++0xB line.long 0x0 "TCD9_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD9_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD9_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1134++0x3 line.word 0x0 "TCD9_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD9_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1138++0x3 line.long 0x0 "TCD9_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x113C++0x3 line.word 0x0 "TCD9_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD9_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1140++0x3 line.long 0x0 "TCD10_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1144++0x3 line.word 0x0 "TCD10_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD10_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1148++0xB line.long 0x0 "TCD10_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD10_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD10_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1154++0x3 line.word 0x0 "TCD10_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD10_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1158++0x3 line.long 0x0 "TCD10_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x115C++0x3 line.word 0x0 "TCD10_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD10_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1160++0x3 line.long 0x0 "TCD11_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1164++0x3 line.word 0x0 "TCD11_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD11_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1168++0xB line.long 0x0 "TCD11_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD11_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD11_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1174++0x3 line.word 0x0 "TCD11_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD11_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1178++0x3 line.long 0x0 "TCD11_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x117C++0x3 line.word 0x0 "TCD11_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD11_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x1180++0x3 line.long 0x0 "TCD12_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1184++0x3 line.word 0x0 "TCD12_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD12_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1188++0xB line.long 0x0 "TCD12_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD12_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD12_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1194++0x3 line.word 0x0 "TCD12_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD12_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x1198++0x3 line.long 0x0 "TCD12_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x119C++0x3 line.word 0x0 "TCD12_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD12_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11A0++0x3 line.long 0x0 "TCD13_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11A4++0x3 line.word 0x0 "TCD13_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD13_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11A8++0xB line.long 0x0 "TCD13_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD13_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD13_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11B4++0x3 line.word 0x0 "TCD13_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD13_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11B8++0x3 line.long 0x0 "TCD13_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11BC++0x3 line.word 0x0 "TCD13_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD13_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11C0++0x3 line.long 0x0 "TCD14_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11C4++0x3 line.word 0x0 "TCD14_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD14_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11C8++0xB line.long 0x0 "TCD14_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD14_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD14_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11D4++0x3 line.word 0x0 "TCD14_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD14_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11D8++0x3 line.long 0x0 "TCD14_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11DC++0x3 line.word 0x0 "TCD14_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD14_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.long 0x11E0++0x3 line.long 0x0 "TCD15_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11E4++0x3 line.word 0x0 "TCD15_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD15_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11E8++0xB line.long 0x0 "TCD15_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD15_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD15_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11F4++0x3 line.word 0x0 "TCD15_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD15_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.long 0x11F8++0x3 line.long 0x0 "TCD15_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11FC++0x1 line.word 0x0 "TCD15_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." endif group.long 0x1000++0x3 line.long 0x0 "TCD0_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1004++0x3 line.word 0x0 "TCD0_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD0_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1008++0x3 line.long 0x0 "TCD0_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1008++0x3 line.long 0x0 "TCD0_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1008++0xB line.long 0x0 "TCD0_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD0_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD0_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1014++0x3 line.word 0x0 "TCD0_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD0_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x1016++0x1 line.word 0x0 "TCD0_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1018++0x3 line.long 0x0 "TCD0_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x101C++0x3 line.word 0x0 "TCD0_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD0_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x101E++0x1 line.word 0x0 "TCD0_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1020++0x3 line.long 0x0 "TCD1_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1024++0x3 line.word 0x0 "TCD1_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD1_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1028++0x3 line.long 0x0 "TCD1_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1028++0x3 line.long 0x0 "TCD1_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1028++0xB line.long 0x0 "TCD1_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD1_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD1_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1034++0x3 line.word 0x0 "TCD1_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD1_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x1036++0x1 line.word 0x0 "TCD1_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1038++0x3 line.long 0x0 "TCD1_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x103C++0x3 line.word 0x0 "TCD1_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD1_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x103E++0x1 line.word 0x0 "TCD1_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1040++0x3 line.long 0x0 "TCD2_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1044++0x3 line.word 0x0 "TCD2_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD2_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1048++0x3 line.long 0x0 "TCD2_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1048++0x3 line.long 0x0 "TCD2_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1048++0xB line.long 0x0 "TCD2_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD2_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD2_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1054++0x3 line.word 0x0 "TCD2_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD2_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x1056++0x1 line.word 0x0 "TCD2_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1058++0x3 line.long 0x0 "TCD2_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x105C++0x3 line.word 0x0 "TCD2_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD2_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x105E++0x1 line.word 0x0 "TCD2_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1060++0x3 line.long 0x0 "TCD3_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1064++0x3 line.word 0x0 "TCD3_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD3_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1068++0x3 line.long 0x0 "TCD3_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1068++0x3 line.long 0x0 "TCD3_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1068++0xB line.long 0x0 "TCD3_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD3_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD3_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1074++0x3 line.word 0x0 "TCD3_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD3_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" group.word 0x1076++0x1 line.word 0x0 "TCD3_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1078++0x3 line.long 0x0 "TCD3_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x107C++0x3 line.word 0x0 "TCD3_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD3_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" group.word 0x107E++0x1 line.word 0x0 "TCD3_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" sif (cpuis("S32K142*")) group.long 0x1080++0x3 line.long 0x0 "TCD4_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1084++0x3 line.word 0x0 "TCD4_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD4_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1088++0x3 line.long 0x0 "TCD4_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1088++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1088++0xB line.long 0x0 "TCD4_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD4_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD4_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1094++0x3 line.word 0x0 "TCD4_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD4_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K144*")) group.long 0x1088++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1096++0x1 line.word 0x0 "TCD4_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x109E++0x1 line.word 0x0 "TCD4_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10A8++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10B6++0x1 line.word 0x0 "TCD5_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10BE++0x1 line.word 0x0 "TCD5_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10C8++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10D6++0x1 line.word 0x0 "TCD6_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10DE++0x1 line.word 0x0 "TCD6_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10E8++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10F6++0x1 line.word 0x0 "TCD7_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10FE++0x1 line.word 0x0 "TCD7_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1108++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1116++0x1 line.word 0x0 "TCD8_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x111E++0x1 line.word 0x0 "TCD8_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1128++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1136++0x1 line.word 0x0 "TCD9_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x113E++0x1 line.word 0x0 "TCD9_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1148++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1156++0x1 line.word 0x0 "TCD10_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x115E++0x1 line.word 0x0 "TCD10_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1168++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1176++0x1 line.word 0x0 "TCD11_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x117E++0x1 line.word 0x0 "TCD11_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1188++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1196++0x1 line.word 0x0 "TCD12_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x119E++0x1 line.word 0x0 "TCD12_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11A8++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11B6++0x1 line.word 0x0 "TCD13_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x11BE++0x1 line.word 0x0 "TCD13_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11C8++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11D6++0x1 line.word 0x0 "TCD14_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x11DE++0x1 line.word 0x0 "TCD14_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11E8++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11F6++0x1 line.word 0x0 "TCD15_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" endif sif (cpuis("S32K144*")) group.long 0x1088++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10A8++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10C8++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10E8++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1108++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1128++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1148++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1168++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1188++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11A8++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11C8++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11E8++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K146*")) group.long 0x1088++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1096++0x1 line.word 0x0 "TCD4_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x109E++0x1 line.word 0x0 "TCD4_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10A8++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10B6++0x1 line.word 0x0 "TCD5_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10BE++0x1 line.word 0x0 "TCD5_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10C8++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10D6++0x1 line.word 0x0 "TCD6_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10DE++0x1 line.word 0x0 "TCD6_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10E8++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10F6++0x1 line.word 0x0 "TCD7_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10FE++0x1 line.word 0x0 "TCD7_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1108++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1116++0x1 line.word 0x0 "TCD8_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x111E++0x1 line.word 0x0 "TCD8_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1128++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1136++0x1 line.word 0x0 "TCD9_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x113E++0x1 line.word 0x0 "TCD9_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1148++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1156++0x1 line.word 0x0 "TCD10_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x115E++0x1 line.word 0x0 "TCD10_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1168++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1176++0x1 line.word 0x0 "TCD11_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x117E++0x1 line.word 0x0 "TCD11_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1188++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1196++0x1 line.word 0x0 "TCD12_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x119E++0x1 line.word 0x0 "TCD12_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11A8++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11B6++0x1 line.word 0x0 "TCD13_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x11BE++0x1 line.word 0x0 "TCD13_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11C8++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11D6++0x1 line.word 0x0 "TCD14_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x11DE++0x1 line.word 0x0 "TCD14_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11E8++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11F6++0x1 line.word 0x0 "TCD15_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" endif sif (cpuis("S32K146*")) group.long 0x1088++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10A8++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10C8++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10E8++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1108++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1128++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1148++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1168++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1188++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11A8++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11C8++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11E8++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K148*")) group.long 0x1088++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1096++0x1 line.word 0x0 "TCD4_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x109E++0x1 line.word 0x0 "TCD4_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10A8++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10B6++0x1 line.word 0x0 "TCD5_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10BE++0x1 line.word 0x0 "TCD5_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10C8++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10D6++0x1 line.word 0x0 "TCD6_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10DE++0x1 line.word 0x0 "TCD6_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10E8++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x10F6++0x1 line.word 0x0 "TCD7_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x10FE++0x1 line.word 0x0 "TCD7_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1108++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1116++0x1 line.word 0x0 "TCD8_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x111E++0x1 line.word 0x0 "TCD8_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1128++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1136++0x1 line.word 0x0 "TCD9_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x113E++0x1 line.word 0x0 "TCD9_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1148++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1156++0x1 line.word 0x0 "TCD10_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x115E++0x1 line.word 0x0 "TCD10_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1168++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1176++0x1 line.word 0x0 "TCD11_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x117E++0x1 line.word 0x0 "TCD11_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1188++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x1196++0x1 line.word 0x0 "TCD12_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x119E++0x1 line.word 0x0 "TCD12_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11A8++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11B6++0x1 line.word 0x0 "TCD13_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x11BE++0x1 line.word 0x0 "TCD13_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11C8++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11D6++0x1 line.word 0x0 "TCD14_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.word 0x11DE++0x1 line.word 0x0 "TCD14_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11E8++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" group.word 0x11F6++0x1 line.word 0x0 "TCD15_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" endif sif (cpuis("S32K148*")) group.long 0x1088++0x3 line.long 0x0 "TCD4_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10A8++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10C8++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x10E8++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1108++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1128++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1148++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1168++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x1188++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11A8++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11C8++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" group.long 0x11E8++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.word 0x1096++0x1 line.word 0x0 "TCD4_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1098++0x3 line.long 0x0 "TCD4_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x109C++0x3 line.word 0x0 "TCD4_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD4_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x109E++0x1 line.word 0x0 "TCD4_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10A0++0x3 line.long 0x0 "TCD5_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10A4++0x3 line.word 0x0 "TCD5_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD5_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10A8++0x3 line.long 0x0 "TCD5_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x10A8++0x3 line.long 0x0 "TCD5_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x10A8++0xB line.long 0x0 "TCD5_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD5_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD5_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10B4++0x3 line.word 0x0 "TCD5_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD5_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x10B6++0x1 line.word 0x0 "TCD5_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x10B8++0x3 line.long 0x0 "TCD5_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10BC++0x3 line.word 0x0 "TCD5_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD5_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x10BE++0x1 line.word 0x0 "TCD5_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10C0++0x3 line.long 0x0 "TCD6_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10C4++0x3 line.word 0x0 "TCD6_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD6_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10C8++0x3 line.long 0x0 "TCD6_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x10C8++0x3 line.long 0x0 "TCD6_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x10C8++0xB line.long 0x0 "TCD6_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD6_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD6_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10D4++0x3 line.word 0x0 "TCD6_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD6_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x10D6++0x1 line.word 0x0 "TCD6_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x10D8++0x3 line.long 0x0 "TCD6_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10DC++0x3 line.word 0x0 "TCD6_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD6_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x10DE++0x1 line.word 0x0 "TCD6_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x10E0++0x3 line.long 0x0 "TCD7_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x10E4++0x3 line.word 0x0 "TCD7_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD7_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x10E8++0x3 line.long 0x0 "TCD7_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x10E8++0x3 line.long 0x0 "TCD7_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x10E8++0xB line.long 0x0 "TCD7_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD7_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD7_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x10F4++0x3 line.word 0x0 "TCD7_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD7_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x10F6++0x1 line.word 0x0 "TCD7_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x10F8++0x3 line.long 0x0 "TCD7_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x10FC++0x3 line.word 0x0 "TCD7_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD7_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x10FE++0x1 line.word 0x0 "TCD7_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1100++0x3 line.long 0x0 "TCD8_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1104++0x3 line.word 0x0 "TCD8_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD8_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1108++0x3 line.long 0x0 "TCD8_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1108++0x3 line.long 0x0 "TCD8_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1108++0xB line.long 0x0 "TCD8_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD8_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD8_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1114++0x3 line.word 0x0 "TCD8_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD8_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x1116++0x1 line.word 0x0 "TCD8_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1118++0x3 line.long 0x0 "TCD8_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x111C++0x3 line.word 0x0 "TCD8_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD8_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x111E++0x1 line.word 0x0 "TCD8_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1120++0x3 line.long 0x0 "TCD9_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1124++0x3 line.word 0x0 "TCD9_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD9_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1128++0x3 line.long 0x0 "TCD9_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1128++0x3 line.long 0x0 "TCD9_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1128++0xB line.long 0x0 "TCD9_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD9_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD9_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1134++0x3 line.word 0x0 "TCD9_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD9_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x1136++0x1 line.word 0x0 "TCD9_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1138++0x3 line.long 0x0 "TCD9_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x113C++0x3 line.word 0x0 "TCD9_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD9_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x113E++0x1 line.word 0x0 "TCD9_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1140++0x3 line.long 0x0 "TCD10_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1144++0x3 line.word 0x0 "TCD10_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD10_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1148++0x3 line.long 0x0 "TCD10_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1148++0x3 line.long 0x0 "TCD10_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1148++0xB line.long 0x0 "TCD10_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD10_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD10_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1154++0x3 line.word 0x0 "TCD10_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD10_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x1156++0x1 line.word 0x0 "TCD10_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1158++0x3 line.long 0x0 "TCD10_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x115C++0x3 line.word 0x0 "TCD10_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD10_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x115E++0x1 line.word 0x0 "TCD10_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1160++0x3 line.long 0x0 "TCD11_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1164++0x3 line.word 0x0 "TCD11_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD11_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1168++0x3 line.long 0x0 "TCD11_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1168++0x3 line.long 0x0 "TCD11_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1168++0xB line.long 0x0 "TCD11_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD11_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD11_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1174++0x3 line.word 0x0 "TCD11_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD11_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x1176++0x1 line.word 0x0 "TCD11_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1178++0x3 line.long 0x0 "TCD11_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x117C++0x3 line.word 0x0 "TCD11_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD11_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x117E++0x1 line.word 0x0 "TCD11_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x1180++0x3 line.long 0x0 "TCD12_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x1184++0x3 line.word 0x0 "TCD12_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD12_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x1188++0x3 line.long 0x0 "TCD12_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1188++0x3 line.long 0x0 "TCD12_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x1188++0xB line.long 0x0 "TCD12_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD12_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD12_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x1194++0x3 line.word 0x0 "TCD12_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD12_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x1196++0x1 line.word 0x0 "TCD12_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x1198++0x3 line.long 0x0 "TCD12_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x119C++0x3 line.word 0x0 "TCD12_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD12_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x119E++0x1 line.word 0x0 "TCD12_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11A0++0x3 line.long 0x0 "TCD13_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11A4++0x3 line.word 0x0 "TCD13_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD13_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11A8++0x3 line.long 0x0 "TCD13_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x11A8++0x3 line.long 0x0 "TCD13_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x11A8++0xB line.long 0x0 "TCD13_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD13_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD13_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11B4++0x3 line.word 0x0 "TCD13_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD13_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x11B6++0x1 line.word 0x0 "TCD13_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x11B8++0x3 line.long 0x0 "TCD13_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11BC++0x3 line.word 0x0 "TCD13_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD13_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x11BE++0x1 line.word 0x0 "TCD13_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11C0++0x3 line.long 0x0 "TCD14_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11C4++0x3 line.word 0x0 "TCD14_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD14_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11C8++0x3 line.long 0x0 "TCD14_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x11C8++0x3 line.long 0x0 "TCD14_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x11C8++0xB line.long 0x0 "TCD14_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD14_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD14_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11D4++0x3 line.word 0x0 "TCD14_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD14_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x11D6++0x1 line.word 0x0 "TCD14_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x11D8++0x3 line.long 0x0 "TCD14_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11DC++0x3 line.word 0x0 "TCD14_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD14_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x11DE++0x1 line.word 0x0 "TCD14_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" group.long 0x11E0++0x3 line.long 0x0 "TCD15_SADDR,TCD Source Address" hexmask.long 0x0 0.--31. 1. "SADDR,Source Address" group.word 0x11E4++0x3 line.word 0x0 "TCD15_SOFF,TCD Signed Source Address Offset" hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset" line.word 0x2 "TCD15_ATTR,TCD Transfer Attributes" hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo" bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,?,?,?,?,?,?" newline hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo" bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7" group.long 0x11E8++0x3 line.long 0x0 "TCD15_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)" hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x11E8++0x3 line.long 0x0 "TCD15_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count" endif sif (cpuis("S32K142*")) group.long 0x11E8++0xB line.long 0x0 "TCD15_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)" bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR" bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR" newline hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes." hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count" line.long 0x4 "TCD15_SLAST,TCD Last Source Address Adjustment" hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment" line.long 0x8 "TCD15_DADDR,TCD Destination Address" hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address" group.word 0x11F4++0x3 line.word 0x0 "TCD15_DOFF,TCD Signed Destination Address Offset" hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset" line.word 0x2 "TCD15_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x11F6++0x1 line.word 0x0 "TCD15_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "CITER_LE,Current Major Iteration Count" group.long 0x11F8++0x3 line.long 0x0 "TCD15_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address" hexmask.long 0x0 0.--31. 1. "DLASTSGA,DLASTSGA" group.word 0x11FC++0x3 line.word 0x0 "TCD15_CSR,TCD Control and Status" bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,?,?,?" hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number" newline bitfld.word 0x0 7. "DONE,Channel Done" "0,1" bitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1" newline bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled." bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.." newline bitfld.word 0x0 3. "DREQ,Disable Request" "0,1" bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled." newline bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled." bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.." line.word 0x2 "TCD15_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K142*")) group.word 0x11FE++0x1 line.word 0x0 "TCD15_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" endif sif (cpuis("S32K144*")) group.word 0x11FE++0x1 line.word 0x0 "TCD15_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x0 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K144*")) group.word 0x11FE++0x1 line.word 0x0 "TCD15_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" endif sif (cpuis("S32K146*")) group.word 0x11FE++0x1 line.word 0x0 "TCD15_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x0 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K146*")) group.word 0x11FE++0x1 line.word 0x0 "TCD15_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" endif sif (cpuis("S32K148*")) group.word 0x11FE++0x1 line.word 0x0 "TCD15_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word 0x0 0.--14. 1. "BITER,Starting Major Iteration Count" endif sif (cpuis("S32K148*")) group.word 0x11FE++0x1 line.word 0x0 "TCD15_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)" bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled" hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number" newline hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count" endif tree.end tree "DMAMUX (Direct Memory Access Multiplexer)" base ad:0x40021000 group.byte 0x0++0x3 line.byte 0x0 "CHCFG0,Channel Configuration register" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x1 "CHCFG1,Channel Configuration register" bitfld.byte 0x1 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x1 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." hexmask.byte 0x1 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x2 "CHCFG2,Channel Configuration register" bitfld.byte 0x2 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x2 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." hexmask.byte 0x2 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x3 "CHCFG3,Channel Configuration register" bitfld.byte 0x3 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x3 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." hexmask.byte 0x3 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" sif (cpuis("S32K142*")) group.byte 0x4++0xB line.byte 0x0 "CHCFG4,Channel Configuration register" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x1 "CHCFG5,Channel Configuration register" bitfld.byte 0x1 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x1 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x1 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x2 "CHCFG6,Channel Configuration register" bitfld.byte 0x2 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x2 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x2 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x3 "CHCFG7,Channel Configuration register" bitfld.byte 0x3 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x3 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x3 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x4 "CHCFG8,Channel Configuration register" bitfld.byte 0x4 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x4 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x4 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x5 "CHCFG9,Channel Configuration register" bitfld.byte 0x5 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x5 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x5 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x6 "CHCFG10,Channel Configuration register" bitfld.byte 0x6 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x6 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x6 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x7 "CHCFG11,Channel Configuration register" bitfld.byte 0x7 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x7 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x7 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x8 "CHCFG12,Channel Configuration register" bitfld.byte 0x8 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x8 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x8 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x9 "CHCFG13,Channel Configuration register" bitfld.byte 0x9 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x9 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x9 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0xA "CHCFG14,Channel Configuration register" bitfld.byte 0xA 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0xA 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0xA 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0xB "CHCFG15,Channel Configuration register" bitfld.byte 0xB 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0xB 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0xB 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" endif sif (cpuis("S32K144*")) group.byte 0x4++0xB line.byte 0x0 "CHCFG4,Channel Configuration register" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x1 "CHCFG5,Channel Configuration register" bitfld.byte 0x1 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x1 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x1 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x2 "CHCFG6,Channel Configuration register" bitfld.byte 0x2 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x2 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x2 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x3 "CHCFG7,Channel Configuration register" bitfld.byte 0x3 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x3 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x3 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x4 "CHCFG8,Channel Configuration register" bitfld.byte 0x4 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x4 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x4 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x5 "CHCFG9,Channel Configuration register" bitfld.byte 0x5 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x5 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x5 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x6 "CHCFG10,Channel Configuration register" bitfld.byte 0x6 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x6 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x6 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x7 "CHCFG11,Channel Configuration register" bitfld.byte 0x7 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x7 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x7 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x8 "CHCFG12,Channel Configuration register" bitfld.byte 0x8 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x8 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x8 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x9 "CHCFG13,Channel Configuration register" bitfld.byte 0x9 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x9 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x9 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0xA "CHCFG14,Channel Configuration register" bitfld.byte 0xA 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0xA 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0xA 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0xB "CHCFG15,Channel Configuration register" bitfld.byte 0xB 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0xB 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0xB 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" endif sif (cpuis("S32K146*")) group.byte 0x4++0xB line.byte 0x0 "CHCFG4,Channel Configuration register" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x1 "CHCFG5,Channel Configuration register" bitfld.byte 0x1 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x1 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x1 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x2 "CHCFG6,Channel Configuration register" bitfld.byte 0x2 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x2 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x2 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x3 "CHCFG7,Channel Configuration register" bitfld.byte 0x3 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x3 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x3 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x4 "CHCFG8,Channel Configuration register" bitfld.byte 0x4 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x4 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x4 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x5 "CHCFG9,Channel Configuration register" bitfld.byte 0x5 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x5 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x5 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x6 "CHCFG10,Channel Configuration register" bitfld.byte 0x6 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x6 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x6 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x7 "CHCFG11,Channel Configuration register" bitfld.byte 0x7 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x7 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x7 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x8 "CHCFG12,Channel Configuration register" bitfld.byte 0x8 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x8 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x8 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x9 "CHCFG13,Channel Configuration register" bitfld.byte 0x9 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x9 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x9 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0xA "CHCFG14,Channel Configuration register" bitfld.byte 0xA 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0xA 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0xA 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0xB "CHCFG15,Channel Configuration register" bitfld.byte 0xB 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0xB 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0xB 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" endif sif (cpuis("S32K148*")) group.byte 0x4++0xB line.byte 0x0 "CHCFG4,Channel Configuration register" bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x1 "CHCFG5,Channel Configuration register" bitfld.byte 0x1 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x1 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x1 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x2 "CHCFG6,Channel Configuration register" bitfld.byte 0x2 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x2 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x2 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x3 "CHCFG7,Channel Configuration register" bitfld.byte 0x3 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x3 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x3 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x4 "CHCFG8,Channel Configuration register" bitfld.byte 0x4 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x4 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x4 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x5 "CHCFG9,Channel Configuration register" bitfld.byte 0x5 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x5 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x5 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x6 "CHCFG10,Channel Configuration register" bitfld.byte 0x6 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x6 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x6 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x7 "CHCFG11,Channel Configuration register" bitfld.byte 0x7 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x7 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x7 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x8 "CHCFG12,Channel Configuration register" bitfld.byte 0x8 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x8 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x8 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0x9 "CHCFG13,Channel Configuration register" bitfld.byte 0x9 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0x9 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0x9 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0xA "CHCFG14,Channel Configuration register" bitfld.byte 0xA 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0xA 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0xA 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" line.byte 0xB "CHCFG15,Channel Configuration register" bitfld.byte 0xB 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled" bitfld.byte 0xB 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.." newline hexmask.byte 0xB 0.--5. 1. "SOURCE,DMA Channel Source (Slot)" endif tree.end tree "EIM (Error Injection Module)" base ad:0x40019000 group.long 0x0++0x7 line.long 0x0 "EIMCR,Error Injection Module Configuration Register" bitfld.long 0x0 0. "GEIEN,Global Error Injection Enable" "0: Disabled,1: Enabled" line.long 0x4 "EICHEN,Error Injection Channel Enable register" bitfld.long 0x4 31. "EICH0EN,Error Injection Channel 0 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." sif (cpuis("S32K142*")) bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline endif sif (cpuis("S32K144*")) bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." endif sif (cpuis("S32K146*")) bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." newline endif sif (cpuis("S32K148*")) bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.." endif group.long 0x100++0x7 line.long 0x0 "EICHD0_WORD0,Error Injection Channel Descriptor n. Word0" hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD0_WORD1,Error Injection Channel Descriptor n. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" sif (cpuis("S32K142*")) group.long 0x200++0x7 line.long 0x0 "EICHD1_WORD0,Error Injection Channel Descriptor n. Word0" hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD1_WORD1,Error Injection Channel Descriptor n. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" endif sif (cpuis("S32K144*")) group.long 0x200++0x7 line.long 0x0 "EICHD1_WORD0,Error Injection Channel Descriptor n. Word0" hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD1_WORD1,Error Injection Channel Descriptor n. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" endif sif (cpuis("S32K146*")) group.long 0x200++0x7 line.long 0x0 "EICHD1_WORD0,Error Injection Channel Descriptor n. Word0" hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD1_WORD1,Error Injection Channel Descriptor n. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" endif sif (cpuis("S32K148*")) group.long 0x200++0x7 line.long 0x0 "EICHD1_WORD0,Error Injection Channel Descriptor n. Word0" hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask" line.long 0x4 "EICHD1_WORD1,Error Injection Channel Descriptor n. Word1" hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3" endif tree.end sif (cpuis("S32K148*")) tree "ENET (Ethernet MAC)" base ad:0x40079000 group.long 0x4++0x7 line.long 0x0 "EIR,Interrupt Event Register" bitfld.long 0x0 30. "BABR,Babbling Receive Error" "0,1" newline bitfld.long 0x0 29. "BABT,Babbling Transmit Error" "0,1" newline bitfld.long 0x0 28. "GRA,Graceful Stop Complete" "0,1" newline bitfld.long 0x0 27. "TXF,Transmit Frame Interrupt" "0,1" newline bitfld.long 0x0 26. "TXB,Transmit Buffer Interrupt" "0,1" newline bitfld.long 0x0 25. "RXF,Receive Frame Interrupt" "0,1" newline bitfld.long 0x0 24. "RXB,Receive Buffer Interrupt" "0,1" newline bitfld.long 0x0 23. "MII,MII Interrupt." "0,1" newline bitfld.long 0x0 22. "EBERR,Ethernet Bus Error" "0,1" newline bitfld.long 0x0 21. "LC,Late Collision" "0,1" newline bitfld.long 0x0 20. "RL,Collision Retry Limit" "0,1" newline bitfld.long 0x0 19. "UN,Transmit FIFO Underrun" "0,1" newline bitfld.long 0x0 18. "PLR,Payload Receive Error" "0,1" newline bitfld.long 0x0 17. "WAKEUP,Node Wakeup Request Indication" "0,1" newline bitfld.long 0x0 16. "TS_AVAIL,Transmit Timestamp Available" "0,1" newline bitfld.long 0x0 15. "TS_TIMER,Timestamp Timer" "0,1" line.long 0x4 "EIMR,Interrupt Mask Register" bitfld.long 0x4 30. "BABR,BABR Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked." newline bitfld.long 0x4 29. "BABT,BABT Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked." newline bitfld.long 0x4 28. "GRA,GRA Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked." newline bitfld.long 0x4 27. "TXF,TXF Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked." newline bitfld.long 0x4 26. "TXB,TXB Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked." newline bitfld.long 0x4 25. "RXF,RXF Interrupt Mask" "0,1" newline bitfld.long 0x4 24. "RXB,RXB Interrupt Mask" "0,1" newline bitfld.long 0x4 23. "MII,MII Interrupt Mask" "0,1" newline bitfld.long 0x4 22. "EBERR,EBERR Interrupt Mask" "0,1" newline bitfld.long 0x4 21. "LC,LC Interrupt Mask" "0,1" newline bitfld.long 0x4 20. "RL,RL Interrupt Mask" "0,1" newline bitfld.long 0x4 19. "UN,UN Interrupt Mask" "0,1" newline bitfld.long 0x4 18. "PLR,PLR Interrupt Mask" "0,1" newline bitfld.long 0x4 17. "WAKEUP,WAKEUP Interrupt Mask" "0,1" newline bitfld.long 0x4 16. "TS_AVAIL,TS_AVAIL Interrupt Mask" "0,1" newline bitfld.long 0x4 15. "TS_TIMER,TS_TIMER Interrupt Mask" "0,1" group.long 0x10++0x7 line.long 0x0 "RDAR,Receive Descriptor Active Register" bitfld.long 0x0 24. "RDAR,Receive Descriptor Active" "0,1" line.long 0x4 "TDAR,Transmit Descriptor Active Register" bitfld.long 0x4 24. "TDAR,Transmit Descriptor Active" "0,1" group.long 0x24++0x3 line.long 0x0 "ECR,Ethernet Control Register" bitfld.long 0x0 8. "DBSWP,Descriptor Byte Swapping Enable" "0: The buffer descriptor bytes are not swapped to..,1: The buffer descriptor bytes are swapped to.." newline bitfld.long 0x0 6. "DBGEN,Debug Enable" "0: MAC continues operation in debug mode.,1: MAC enters hardware freeze mode when the.." newline bitfld.long 0x0 4. "EN1588,EN1588 Enable" "0: Legacy FEC buffer descriptors and functions..,1: Enhanced frame time-stamping functions enabled." newline bitfld.long 0x0 3. "SLEEP,Sleep Mode Enable" "0: Normal operating mode.,1: Sleep mode." newline bitfld.long 0x0 2. "MAGICEN,Magic Packet Detection Enable" "0: Magic detection logic disabled.,1: The MAC core detects magic packets and asserts.." newline bitfld.long 0x0 1. "ETHEREN,Ethernet Enable" "0: Reception immediately stops and transmission..,1: MAC is enabled and reception and transmission.." newline bitfld.long 0x0 0. "RESET,Ethernet MAC Reset" "0,1" group.long 0x40++0x7 line.long 0x0 "MMFR,MII Management Frame Register" bitfld.long 0x0 30.--31. "ST,Start Of Frame Delimiter" "0,1,2,3" newline bitfld.long 0x0 28.--29. "OP,Operation Code" "0,1,2,3" newline hexmask.long.byte 0x0 23.--27. 1. "PA,PHY Address" newline hexmask.long.byte 0x0 18.--22. 1. "RA,Register Address" newline bitfld.long 0x0 16.--17. "TA,Turn Around" "0,1,2,3" newline hexmask.long.word 0x0 0.--15. 1. "DATA,Management Frame Data" line.long 0x4 "MSCR,MII Speed Control Register" bitfld.long 0x4 8.--10. "HOLDTIME,Hold time On MDIO Output" "0: 1 internal module clock cycle,1: 2 internal module clock cycles,?,?,?,?,?,?" newline bitfld.long 0x4 7. "DIS_PRE,Disable Preamble" "0: Preamble enabled.,1: Preamble (32 ones) is not prepended to the MII.." newline hexmask.long.byte 0x4 1.--6. 1. "MII_SPEED,MII Speed" group.long 0x64++0x3 line.long 0x0 "MIBC,MIB Control Register" bitfld.long 0x0 31. "MIB_DIS,Disable MIB Logic" "0: MIB logic is enabled.,1: MIB logic is disabled. The MIB logic halts and.." newline rbitfld.long 0x0 30. "MIB_IDLE,MIB Idle" "0: The MIB block is updating MIB counters.,1: The MIB block is not currently updating any MIB.." newline bitfld.long 0x0 29. "MIB_CLEAR,MIB Clear" "0: See note above.,1: All statistics counters are reset to 0." group.long 0x84++0x3 line.long 0x0 "RCR,Receive Control Register" rbitfld.long 0x0 31. "GRS,Graceful Receive Stopped" "0,1" newline bitfld.long 0x0 30. "NLC,Payload Length Check Disable" "0: The payload length check is disabled.,1: The core checks the frame's payload length with.." newline hexmask.long.word 0x0 16.--29. 1. "MAX_FL,Maximum Frame Length" newline bitfld.long 0x0 15. "CFEN,MAC Control Frame Enable" "0: MAC control frames with any opcode other than..,1: MAC control frames with any opcode other than.." newline bitfld.long 0x0 14. "CRCFWD,Terminate/Forward Received CRC" "0: The CRC field of received frames is transmitted..,1: The CRC field is stripped from the frame." newline bitfld.long 0x0 13. "PAUFWD,Terminate/Forward Pause Frames" "0: Pause frames are terminated and discarded in the..,1: Pause frames are forwarded to the user.." newline bitfld.long 0x0 12. "PADEN,Enable Frame Padding Remove On Receive" "0: No padding is removed on receive by the MAC.,1: Padding is removed from received frames." newline bitfld.long 0x0 9. "RMII_10T,Enables 10-Mbit/s mode of the RMII ." "0: 100-Mbit/s operation.,1: 10-Mbit/s operation." newline bitfld.long 0x0 8. "RMII_MODE,RMII Mode Enable" "0: MAC configured for MII mode.,1: MAC configured for RMII operation." newline bitfld.long 0x0 5. "FCE,Flow Control Enable" "0,1" newline bitfld.long 0x0 4. "BC_REJ,Broadcast Frame Reject" "0,1" newline bitfld.long 0x0 3. "PROM,Promiscuous Mode" "0: Disabled.,1: Enabled." newline bitfld.long 0x0 2. "MII_MODE,Media Independent Interface Mode" "?,1: MII or RMII mode as indicated by the RMII_MODE.." newline bitfld.long 0x0 1. "DRT,Disable Receive On Transmit" "0: Receive path operates independently of transmit..,1: Disable reception of frames while transmitting." newline bitfld.long 0x0 0. "LOOP,Internal Loopback" "0: Loopback disabled.,1: Transmitted frames are looped back internal to.." group.long 0xC4++0x3 line.long 0x0 "TCR,Transmit Control Register" bitfld.long 0x0 9. "CRCFWD,Forward Frame From Application With CRC" "0: TxBD[TC] controls whether the frame has a CRC..,1: The transmitter does not append any CRC to.." newline bitfld.long 0x0 8. "ADDINS,Set MAC Address On Transmit" "0: The source MAC address is not modified by the MAC.,1: The MAC overwrites the source MAC address with.." newline bitfld.long 0x0 5.--7. "ADDSEL,Source MAC Address Select On Transmit" "0: Node MAC address programmed on PADDR1/2 registers.,?,?,?,?,?,?,?" newline rbitfld.long 0x0 4. "RFC_PAUSE,Receive Frame Control Pause" "0,1" newline bitfld.long 0x0 3. "TFC_PAUSE,Transmit Frame Control Pause" "0: No PAUSE frame transmitted.,1: The MAC stops transmission of data frames after.." newline bitfld.long 0x0 2. "FDEN,Full-Duplex Enable" "0,1" newline bitfld.long 0x0 0. "GTS,Graceful Transmit Stop" "0,1" group.long 0xE4++0xB line.long 0x0 "PALR,Physical Address Lower Register" hexmask.long 0x0 0.--31. 1. "PADDR1,Pause Address" line.long 0x4 "PAUR,Physical Address Upper Register" hexmask.long.word 0x4 16.--31. 1. "PADDR2,Bytes 4 (bits 31:24) and 5 (bits 23:16) of the 6-byte individual address used for exact match and the source address field in PAUSE frames" newline hexmask.long.word 0x4 0.--15. 1. "TYPE,Type Field In PAUSE Frames" line.long 0x8 "OPD,Opcode/Pause Duration Register" hexmask.long.word 0x8 16.--31. 1. "OPCODE,Opcode Field In PAUSE Frames" newline hexmask.long.word 0x8 0.--15. 1. "PAUSE_DUR,Pause Duration" group.long 0x118++0xF line.long 0x0 "IAUR,Descriptor Individual Upper Address Register" hexmask.long 0x0 0.--31. 1. "IADDR1,Contains the upper 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast address" line.long 0x4 "IALR,Descriptor Individual Lower Address Register" hexmask.long 0x4 0.--31. 1. "IADDR2,Contains the lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast address" line.long 0x8 "GAUR,Descriptor Group Upper Address Register" hexmask.long 0x8 0.--31. 1. "GADDR1,Contains the upper 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a multicast address" line.long 0xC "GALR,Descriptor Group Lower Address Register" hexmask.long 0xC 0.--31. 1. "GADDR2,Contains the lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a multicast address" group.long 0x144++0x3 line.long 0x0 "TFWR,Transmit FIFO Watermark Register" bitfld.long 0x0 8. "STRFWD,Store And Forward Enable" "0: Reset. The transmission start threshold is..,1: Enabled." newline hexmask.long.byte 0x0 0.--5. 1. "TFWR,Transmit FIFO Write" group.long 0x180++0xB line.long 0x0 "RDSR,Receive Descriptor Ring Start Register" hexmask.long 0x0 3.--31. 1. "R_DES_START,Pointer to the beginning of the receive buffer descriptor queue." line.long 0x4 "TDSR,Transmit Buffer Descriptor Ring Start Register" hexmask.long 0x4 3.--31. 1. "X_DES_START,Pointer to the beginning of the transmit buffer descriptor queue." line.long 0x8 "MRBR,Maximum Receive Buffer Size Register" hexmask.long.word 0x8 4.--13. 1. "R_BUF_SIZE,Receive buffer size in bytes" group.long 0x190++0x23 line.long 0x0 "RSFL,Receive FIFO Section Full Threshold" hexmask.long.byte 0x0 0.--7. 1. "RX_SECTION_FULL,Value Of Receive FIFO Section Full Threshold" line.long 0x4 "RSEM,Receive FIFO Section Empty Threshold" hexmask.long.byte 0x4 16.--20. 1. "STAT_SECTION_EMPTY,RX Status FIFO Section Empty Threshold" newline hexmask.long.byte 0x4 0.--7. 1. "RX_SECTION_EMPTY,Value Of The Receive FIFO Section Empty Threshold" line.long 0x8 "RAEM,Receive FIFO Almost Empty Threshold" hexmask.long.byte 0x8 0.--7. 1. "RX_ALMOST_EMPTY,Value Of The Receive FIFO Almost Empty Threshold" line.long 0xC "RAFL,Receive FIFO Almost Full Threshold" hexmask.long.byte 0xC 0.--7. 1. "RX_ALMOST_FULL,Value Of The Receive FIFO Almost Full Threshold" line.long 0x10 "TSEM,Transmit FIFO Section Empty Threshold" hexmask.long.byte 0x10 0.--7. 1. "TX_SECTION_EMPTY,Value Of The Transmit FIFO Section Empty Threshold" line.long 0x14 "TAEM,Transmit FIFO Almost Empty Threshold" hexmask.long.byte 0x14 0.--7. 1. "TX_ALMOST_EMPTY,Value of Transmit FIFO Almost Empty Threshold" line.long 0x18 "TAFL,Transmit FIFO Almost Full Threshold" hexmask.long.byte 0x18 0.--7. 1. "TX_ALMOST_FULL,Value Of The Transmit FIFO Almost Full Threshold" line.long 0x1C "TIPG,Transmit Inter-Packet Gap" hexmask.long.byte 0x1C 0.--4. 1. "IPG,Transmit Inter-Packet Gap" line.long 0x20 "FTRL,Frame Truncation Length" hexmask.long.word 0x20 0.--13. 1. "TRUNC_FL,Frame Truncation Length" group.long 0x1C0++0x7 line.long 0x0 "TACC,Transmit Accelerator Function Configuration" bitfld.long 0x0 4. "PROCHK,Enables insertion of protocol checksum." "0: Checksum not inserted.,1: If an IP frame with a known protocol is.." newline bitfld.long 0x0 3. "IPCHK,Enables insertion of IP header checksum." "0: Checksum is not inserted.,1: If an IP frame is transmitted the checksum is.." newline bitfld.long 0x0 0. "SHIFT16,TX FIFO Shift-16" "0: Disabled.,1: Indicates to the transmit data FIFO that the.." line.long 0x4 "RACC,Receive Accelerator Function Configuration" bitfld.long 0x4 7. "SHIFT16,RX FIFO Shift-16" "0: Disabled.,1: Instructs the MAC to write two additional bytes.." newline bitfld.long 0x4 6. "LINEDIS,Enable Discard Of Frames With MAC Layer Errors" "0: Frames with errors are not discarded.,1: Any frame received with a CRC length or PHY.." newline bitfld.long 0x4 2. "PRODIS,Enable Discard Of Frames With Wrong Protocol Checksum" "0: Frames with wrong checksum are not discarded.,1: If a TCP/IP UDP/IP or ICMP/IP frame is received.." newline bitfld.long 0x4 1. "IPDIS,Enable Discard Of Frames With Wrong IPv4 Header Checksum" "0: Frames with wrong IPv4 header checksum are not..,1: If an IPv4 frame is received with a mismatching.." newline bitfld.long 0x4 0. "PADREM,Enable Padding Removal For Short IP Frames" "0: Padding not removed.,1: Any bytes following the IP payload section of.." rgroup.long 0x200++0x77 line.long 0x0 "RMON_T_DROP,Reserved Statistic Register" line.long 0x4 "RMON_T_PACKETS,Tx Packet Count Statistic Register" hexmask.long.word 0x4 0.--15. 1. "TXPKTS,Packet count" line.long 0x8 "RMON_T_BC_PKT,Tx Broadcast Packets Statistic Register" hexmask.long.word 0x8 0.--15. 1. "TXPKTS,Broadcast packets" line.long 0xC "RMON_T_MC_PKT,Tx Multicast Packets Statistic Register" hexmask.long.word 0xC 0.--15. 1. "TXPKTS,Multicast packets" line.long 0x10 "RMON_T_CRC_ALIGN,Tx Packets with CRC/Align Error Statistic Register" hexmask.long.word 0x10 0.--15. 1. "TXPKTS,Packets with CRC/align error" line.long 0x14 "RMON_T_UNDERSIZE,Tx Packets Less Than Bytes and Good CRC Statistic Register" hexmask.long.word 0x14 0.--15. 1. "TXPKTS,Number of transmit packets less than 64 bytes with good CRC" line.long 0x18 "RMON_T_OVERSIZE,Tx Packets GT MAX_FL bytes and Good CRC Statistic Register" hexmask.long.word 0x18 0.--15. 1. "TXPKTS,Number of transmit packets greater than MAX_FL bytes with good CRC" line.long 0x1C "RMON_T_FRAG,Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register" hexmask.long.word 0x1C 0.--15. 1. "TXPKTS,Number of packets less than 64 bytes with bad CRC" line.long 0x20 "RMON_T_JAB,Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register" hexmask.long.word 0x20 0.--15. 1. "TXPKTS,Number of transmit packets greater than MAX_FL bytes and bad CRC" line.long 0x24 "RMON_T_COL,Tx Collision Count Statistic Register" hexmask.long.word 0x24 0.--15. 1. "TXPKTS,Number of transmit collisions" line.long 0x28 "RMON_T_P64,Tx 64-Byte Packets Statistic Register" hexmask.long.word 0x28 0.--15. 1. "TXPKTS,Number of 64-byte transmit packets" line.long 0x2C "RMON_T_P65TO127,Tx 65- to 127-byte Packets Statistic Register" hexmask.long.word 0x2C 0.--15. 1. "TXPKTS,Number of 65- to 127-byte transmit packets" line.long 0x30 "RMON_T_P128TO255,Tx 128- to 255-byte Packets Statistic Register" hexmask.long.word 0x30 0.--15. 1. "TXPKTS,Number of 128- to 255-byte transmit packets" line.long 0x34 "RMON_T_P256TO511,Tx 256- to 511-byte Packets Statistic Register" hexmask.long.word 0x34 0.--15. 1. "TXPKTS,Number of 256- to 511-byte transmit packets" line.long 0x38 "RMON_T_P512TO1023,Tx 512- to 1023-byte Packets Statistic Register" hexmask.long.word 0x38 0.--15. 1. "TXPKTS,Number of 512- to 1023-byte transmit packets" line.long 0x3C "RMON_T_P1024TO2047,Tx 1024- to 2047-byte Packets Statistic Register" hexmask.long.word 0x3C 0.--15. 1. "TXPKTS,Number of 1024- to 2047-byte transmit packets" line.long 0x40 "RMON_T_P_GTE2048,Tx Packets Greater Than 2048 Bytes Statistic Register" hexmask.long.word 0x40 0.--15. 1. "TXPKTS,Number of transmit packets greater than 2048 bytes" line.long 0x44 "RMON_T_OCTETS,Tx Octets Statistic Register" hexmask.long 0x44 0.--31. 1. "TXOCTS,Number of transmit octets" line.long 0x48 "IEEE_T_DROP,Reserved Statistic Register" line.long 0x4C "IEEE_T_FRAME_OK,Frames Transmitted OK Statistic Register" hexmask.long.word 0x4C 0.--15. 1. "COUNT,Number of frames transmitted OK" line.long 0x50 "IEEE_T_1COL,Frames Transmitted with Single Collision Statistic Register" hexmask.long.word 0x50 0.--15. 1. "COUNT,Number of frames transmitted with one collision" line.long 0x54 "IEEE_T_MCOL,Frames Transmitted with Multiple Collisions Statistic Register" hexmask.long.word 0x54 0.--15. 1. "COUNT,Number of frames transmitted with multiple collisions" line.long 0x58 "IEEE_T_DEF,Frames Transmitted after Deferral Delay Statistic Register" hexmask.long.word 0x58 0.--15. 1. "COUNT,Number of frames transmitted with deferral delay" line.long 0x5C "IEEE_T_LCOL,Frames Transmitted with Late Collision Statistic Register" hexmask.long.word 0x5C 0.--15. 1. "COUNT,Number of frames transmitted with late collision" line.long 0x60 "IEEE_T_EXCOL,Frames Transmitted with Excessive Collisions Statistic Register" hexmask.long.word 0x60 0.--15. 1. "COUNT,Number of frames transmitted with excessive collisions" line.long 0x64 "IEEE_T_MACERR,Frames Transmitted with Tx FIFO Underrun Statistic Register" hexmask.long.word 0x64 0.--15. 1. "COUNT,Number of frames transmitted with transmit FIFO underrun" line.long 0x68 "IEEE_T_CSERR,Frames Transmitted with Carrier Sense Error Statistic Register" hexmask.long.word 0x68 0.--15. 1. "COUNT,Number of frames transmitted with carrier sense error" line.long 0x6C "IEEE_T_SQE,Reserved Statistic Register" hexmask.long.word 0x6C 0.--15. 1. "COUNT,This read-only field is reserved and always has the value 0" line.long 0x70 "IEEE_T_FDXFC,Flow Control Pause Frames Transmitted Statistic Register" hexmask.long.word 0x70 0.--15. 1. "COUNT,Number of flow-control pause frames transmitted" line.long 0x74 "IEEE_T_OCTETS_OK,Octet Count for Frames Transmitted w/o Error Statistic Register" hexmask.long 0x74 0.--31. 1. "COUNT,Octet count for frames transmitted without error Counts total octets (includes header and FCS fields)." rgroup.long 0x284++0x5F line.long 0x0 "RMON_R_PACKETS,Rx Packet Count Statistic Register" hexmask.long.word 0x0 0.--15. 1. "COUNT,Number of packets received" line.long 0x4 "RMON_R_BC_PKT,Rx Broadcast Packets Statistic Register" hexmask.long.word 0x4 0.--15. 1. "COUNT,Number of receive broadcast packets" line.long 0x8 "RMON_R_MC_PKT,Rx Multicast Packets Statistic Register" hexmask.long.word 0x8 0.--15. 1. "COUNT,Number of receive multicast packets" line.long 0xC "RMON_R_CRC_ALIGN,Rx Packets with CRC/Align Error Statistic Register" hexmask.long.word 0xC 0.--15. 1. "COUNT,Number of receive packets with CRC or align error" line.long 0x10 "RMON_R_UNDERSIZE,Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register" hexmask.long.word 0x10 0.--15. 1. "COUNT,Number of receive packets with less than 64 bytes and good CRC" line.long 0x14 "RMON_R_OVERSIZE,Rx Packets Greater Than MAX_FL and Good CRC Statistic Register" hexmask.long.word 0x14 0.--15. 1. "COUNT,Number of receive packets greater than MAX_FL and good CRC" line.long 0x18 "RMON_R_FRAG,Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register" hexmask.long.word 0x18 0.--15. 1. "COUNT,Number of receive packets with less than 64 bytes and bad CRC" line.long 0x1C "RMON_R_JAB,Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register" hexmask.long.word 0x1C 0.--15. 1. "COUNT,Number of receive packets greater than MAX_FL and bad CRC" line.long 0x20 "RMON_R_RESVD_0,Reserved Statistic Register" line.long 0x24 "RMON_R_P64,Rx 64-Byte Packets Statistic Register" hexmask.long.word 0x24 0.--15. 1. "COUNT,Number of 64-byte receive packets" line.long 0x28 "RMON_R_P65TO127,Rx 65- to 127-Byte Packets Statistic Register" hexmask.long.word 0x28 0.--15. 1. "COUNT,Number of 65- to 127-byte recieve packets" line.long 0x2C "RMON_R_P128TO255,Rx 128- to 255-Byte Packets Statistic Register" hexmask.long.word 0x2C 0.--15. 1. "COUNT,Number of 128- to 255-byte recieve packets" line.long 0x30 "RMON_R_P256TO511,Rx 256- to 511-Byte Packets Statistic Register" hexmask.long.word 0x30 0.--15. 1. "COUNT,Number of 256- to 511-byte recieve packets" line.long 0x34 "RMON_R_P512TO1023,Rx 512- to 1023-Byte Packets Statistic Register" hexmask.long.word 0x34 0.--15. 1. "COUNT,Number of 512- to 1023-byte recieve packets" line.long 0x38 "RMON_R_P1024TO2047,Rx 1024- to 2047-Byte Packets Statistic Register" hexmask.long.word 0x38 0.--15. 1. "COUNT,Number of 1024- to 2047-byte recieve packets" line.long 0x3C "RMON_R_P_GTE2048,Rx Packets Greater than 2048 Bytes Statistic Register" hexmask.long.word 0x3C 0.--15. 1. "COUNT,Number of greater-than-2048-byte recieve packets" line.long 0x40 "RMON_R_OCTETS,Rx Octets Statistic Register" hexmask.long 0x40 0.--31. 1. "COUNT,Number of receive octets" line.long 0x44 "IEEE_R_DROP,Frames not Counted Correctly Statistic Register" hexmask.long.word 0x44 0.--15. 1. "COUNT,Frame count" line.long 0x48 "IEEE_R_FRAME_OK,Frames Received OK Statistic Register" hexmask.long.word 0x48 0.--15. 1. "COUNT,Number of frames received OK" line.long 0x4C "IEEE_R_CRC,Frames Received with CRC Error Statistic Register" hexmask.long.word 0x4C 0.--15. 1. "COUNT,Number of frames received with CRC error" line.long 0x50 "IEEE_R_ALIGN,Frames Received with Alignment Error Statistic Register" hexmask.long.word 0x50 0.--15. 1. "COUNT,Number of frames received with alignment error" line.long 0x54 "IEEE_R_MACERR,Receive FIFO Overflow Count Statistic Register" hexmask.long.word 0x54 0.--15. 1. "COUNT,Receive FIFO overflow count" line.long 0x58 "IEEE_R_FDXFC,Flow Control Pause Frames Received Statistic Register" hexmask.long.word 0x58 0.--15. 1. "COUNT,Number of flow-control pause frames received" line.long 0x5C "IEEE_R_OCTETS_OK,Octet Count for Frames Received without Error Statistic Register" hexmask.long 0x5C 0.--31. 1. "COUNT,Number of octets for frames received without error" group.long 0x400++0x17 line.long 0x0 "ATCR,Adjustable Timer Control Register" bitfld.long 0x0 13. "SLAVE,Enable Timer Slave Mode" "0: The timer is active and all configuration fields..,1: The internal timer is disabled and the.." newline bitfld.long 0x0 11. "CAPTURE,Capture Timer Value" "0: No effect.,1: The current time is captured and can be read.." newline bitfld.long 0x0 9. "RESTART,Reset Timer" "0,1" newline bitfld.long 0x0 7. "PINPER,Enables event signal output assertion on period event" "0: Disable.,1: Enable." newline bitfld.long 0x0 4. "PEREN,Enable Periodical Event" "0: Disable.,1: A period event interrupt can be generated.." newline bitfld.long 0x0 3. "OFFRST,Reset Timer On Offset Event" "0: The timer is not affected and no action occurs..,1: If OFFEN is set the timer resets to zero when.." newline bitfld.long 0x0 2. "OFFEN,Enable One-Shot Offset Event" "0: Disable.,1: The timer can be reset to zero when the given.." newline bitfld.long 0x0 0. "EN,Enable Timer" "0: The timer stops at the current value.,1: The timer starts incrementing." line.long 0x4 "ATVR,Timer Value Register" hexmask.long 0x4 0.--31. 1. "ATIME,A write sets the timer" line.long 0x8 "ATOFF,Timer Offset Register" hexmask.long 0x8 0.--31. 1. "OFFSET,Offset value for one-shot event generation" line.long 0xC "ATPER,Timer Period Register" hexmask.long 0xC 0.--31. 1. "PERIOD,Value for generating periodic events" line.long 0x10 "ATCOR,Timer Correction Register" hexmask.long 0x10 0.--30. 1. "COR,Correction Counter Wrap-Around Value" line.long 0x14 "ATINC,Time-Stamping Clock Period Register" hexmask.long.byte 0x14 8.--14. 1. "INC_CORR,Correction Increment Value" newline hexmask.long.byte 0x14 0.--6. 1. "INC,Clock Period Of The Timestamping Clock (ts_clk) In Nanoseconds" rgroup.long 0x418++0x3 line.long 0x0 "ATSTMP,Timestamp of Last Transmitted Frame" hexmask.long 0x0 0.--31. 1. "TIMESTAMP,Timestamp of the last frame transmitted by the core that had TxBD[TS] set" group.long 0x604++0x3 line.long 0x0 "TGSR,Timer Global Status Register" bitfld.long 0x0 3. "TF3,Copy Of Timer Flag For Channel 3" "0: Timer Flag for Channel 3 is clear,1: Timer Flag for Channel 3 is set" newline bitfld.long 0x0 2. "TF2,Copy Of Timer Flag For Channel 2" "0: Timer Flag for Channel 2 is clear,1: Timer Flag for Channel 2 is set" newline bitfld.long 0x0 1. "TF1,Copy Of Timer Flag For Channel 1" "0: Timer Flag for Channel 1 is clear,1: Timer Flag for Channel 1 is set" newline bitfld.long 0x0 0. "TF0,Copy Of Timer Flag For Channel 0" "0: Timer Flag for Channel 0 is clear,1: Timer Flag for Channel 0 is set" repeat 4. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x608)++0x3 line.long 0x0 "TCSR$1,Timer Control Status Register" bitfld.long 0x0 7. "TF,Timer Flag" "0: Input Capture or Output Compare has not occurred.,1: Input Capture or Output Compare has occurred." newline bitfld.long 0x0 6. "TIE,Timer Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled" newline hexmask.long.byte 0x0 2.--5. 1. "TMODE,Timer Mode" newline bitfld.long 0x0 0. "TDRE,Timer DMA Request Enable" "0: DMA request is disabled,1: DMA request is enabled" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x60C)++0x3 line.long 0x0 "TCCR$1,Timer Compare Capture Register" hexmask.long 0x0 0.--31. 1. "TCC,Timer Capture Compare" repeat.end tree.end endif tree "ERM (Error Reporting Module)" base ad:0x40018000 group.long 0x0++0x3 line.long 0x0 "CR0,ERM Configuration Register 0" bitfld.long 0x0 31. "ESCIE0,ESCIE0" "0: Interrupt notification of Memory 0 single-bit..,1: Interrupt notification of Memory 0 single-bit.." bitfld.long 0x0 30. "ENCIE0,ENCIE0" "0: Interrupt notification of Memory 0..,1: Interrupt notification of Memory 0.." newline sif (cpuis("S32K142*")) bitfld.long 0x0 27. "ESCIE1,ESCIE1" "0: Interrupt notification of Memory 1 single-bit..,1: Interrupt notification of Memory 1 single-bit.." bitfld.long 0x0 26. "ENCIE1,ENCIE1" "0: Interrupt notification of Memory 1..,1: Interrupt notification of Memory 1.." newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 27. "ESCIE1,ESCIE1" "0: Interrupt notification of Memory 1 single-bit..,1: Interrupt notification of Memory 1 single-bit.." bitfld.long 0x0 26. "ENCIE1,ENCIE1" "0: Interrupt notification of Memory 1..,1: Interrupt notification of Memory 1.." newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 27. "ESCIE1,ESCIE1" "0: Interrupt notification of Memory 1 single-bit..,1: Interrupt notification of Memory 1 single-bit.." bitfld.long 0x0 26. "ENCIE1,ENCIE1" "0: Interrupt notification of Memory 1..,1: Interrupt notification of Memory 1.." newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 27. "ESCIE1,ESCIE1" "0: Interrupt notification of Memory 1 single-bit..,1: Interrupt notification of Memory 1 single-bit.." bitfld.long 0x0 26. "ENCIE1,ENCIE1" "0: Interrupt notification of Memory 1..,1: Interrupt notification of Memory 1.." endif group.long 0x10++0x3 line.long 0x0 "SR0,ERM Status Register 0" bitfld.long 0x0 31. "SBC0,SBC0" "0: No single-bit correction event on Memory 0..,1: Single-bit correction event on Memory 0 detected" bitfld.long 0x0 30. "NCE0,NCE0" "0: No non-correctable error event on Memory 0..,1: Non-correctable error event on Memory 0 detected" newline sif (cpuis("S32K142*")) bitfld.long 0x0 27. "SBC1,SBC1" "0: No single-bit correction event on Memory 1..,1: Single-bit correction event on Memory 1 detected" bitfld.long 0x0 26. "NCE1,NCE1" "0: No non-correctable error event on Memory 1..,1: Non-correctable error event on Memory 1 detected" newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 27. "SBC1,SBC1" "0: No single-bit correction event on Memory 1..,1: Single-bit correction event on Memory 1 detected" bitfld.long 0x0 26. "NCE1,NCE1" "0: No non-correctable error event on Memory 1..,1: Non-correctable error event on Memory 1 detected" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 27. "SBC1,SBC1" "0: No single-bit correction event on Memory 1..,1: Single-bit correction event on Memory 1 detected" bitfld.long 0x0 26. "NCE1,NCE1" "0: No non-correctable error event on Memory 1..,1: Non-correctable error event on Memory 1 detected" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 27. "SBC1,SBC1" "0: No single-bit correction event on Memory 1..,1: Single-bit correction event on Memory 1 detected" bitfld.long 0x0 26. "NCE1,NCE1" "0: No non-correctable error event on Memory 1..,1: Non-correctable error event on Memory 1 detected" endif rgroup.long 0x100++0x3 line.long 0x0 "EAR0,ERM Memory n Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" sif (cpuis("S32K142*")) rgroup.long 0x110++0x3 line.long 0x0 "EAR1,ERM Memory n Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" endif sif (cpuis("S32K144*")) rgroup.long 0x110++0x3 line.long 0x0 "EAR1,ERM Memory n Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" endif sif (cpuis("S32K146*")) rgroup.long 0x110++0x3 line.long 0x0 "EAR1,ERM Memory n Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" endif sif (cpuis("S32K148*")) rgroup.long 0x110++0x3 line.long 0x0 "EAR1,ERM Memory n Error Address Register" hexmask.long 0x0 0.--31. 1. "EAR,EAR" endif tree.end sif (cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")||cpuis("S32K148*")) tree "EWM (External Watchdog Monitor)" base ad:0x40061000 group.byte 0x0++0x0 line.byte 0x0 "CTRL,Control Register" bitfld.byte 0x0 3. "INTEN,Interrupt Enable." "0,1" eventfld.byte 0x0 2. "INEN,Input Enable." "0,1" eventfld.byte 0x0 1. "ASSIN,EWM_in's Assertion State Select." "0,1" eventfld.byte 0x0 0. "EWMEN,EWM enable." "0,1" wgroup.byte 0x1++0x0 line.byte 0x0 "SERV,Service Register" hexmask.byte 0x0 0.--7. 1. "SERVICE,SERVICE" group.byte 0x2++0x1 line.byte 0x0 "CMPL,Compare Low Register" hexmask.byte 0x0 0.--7. 1. "COMPAREL,COMPAREL" line.byte 0x1 "CMPH,Compare High Register" hexmask.byte 0x1 0.--7. 1. "COMPAREH,COMPAREH" group.byte 0x5++0x0 line.byte 0x0 "CLKPRESCALER,Clock Prescaler Register" hexmask.byte 0x0 0.--7. 1. "CLK_DIV,CLK_DIV" tree.end endif tree "FLEXIO (Flexible I/O)" base ad:0x4005A000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 24.--31. 1. "TRIGGER,Trigger Number" hexmask.long.byte 0x4 16.--23. 1. "PIN,Pin Number" newline hexmask.long.byte 0x4 8.--15. 1. "TIMER,Timer Number" hexmask.long.byte 0x4 0.--7. 1. "SHIFTER,Shifter Number" group.long 0x8++0x3 line.long 0x0 "CTRL,FlexIO Control Register" bitfld.long 0x0 31. "DOZEN,Doze Enable" "0: FlexIO enabled in Doze modes.,1: FlexIO disabled in Doze modes." bitfld.long 0x0 30. "DBGE,Debug Enable" "0: FlexIO is disabled in debug modes.,1: FlexIO is enabled in debug modes" newline bitfld.long 0x0 2. "FASTACC,Fast Access" "0: Configures for normal register accesses to FlexIO,1: Configures for fast register accesses to FlexIO" bitfld.long 0x0 1. "SWRST,Software Reset" "0: Software reset is disabled,1: Software reset is enabled all FlexIO registers.." newline bitfld.long 0x0 0. "FLEXEN,FlexIO Enable" "0: FlexIO module is disabled.,1: FlexIO module is enabled." rgroup.long 0xC++0x3 line.long 0x0 "PIN,Pin State Register" hexmask.long.byte 0x0 0.--7. 1. "PDI,Pin Data Input" group.long 0x10++0xB line.long 0x0 "SHIFTSTAT,Shifter Status Register" hexmask.long.byte 0x0 0.--3. 1. "SSF,Shifter Status Flag" line.long 0x4 "SHIFTERR,Shifter Error Register" hexmask.long.byte 0x4 0.--3. 1. "SEF,Shifter Error Flags" line.long 0x8 "TIMSTAT,Timer Status Register" hexmask.long.byte 0x8 0.--3. 1. "TSF,Timer Status Flags" group.long 0x20++0xB line.long 0x0 "SHIFTSIEN,Shifter Status Interrupt Enable" hexmask.long.byte 0x0 0.--3. 1. "SSIE,Shifter Status Interrupt Enable" line.long 0x4 "SHIFTEIEN,Shifter Error Interrupt Enable" hexmask.long.byte 0x4 0.--3. 1. "SEIE,Shifter Error Interrupt Enable" line.long 0x8 "TIMIEN,Timer Interrupt Enable Register" hexmask.long.byte 0x8 0.--3. 1. "TEIE,Timer Status Interrupt Enable" group.long 0x30++0x3 line.long 0x0 "SHIFTSDEN,Shifter Status DMA Enable" hexmask.long.byte 0x0 0.--3. 1. "SSDE,Shifter Status DMA Enable" group.long 0x80++0xF line.long 0x0 "SHIFTCTL0,Shifter Control N Register" bitfld.long 0x0 24.--25. "TIMSEL,Timer Select" "0,1,2,3" bitfld.long 0x0 23. "TIMPOL,Timer Polarity" "0: Shift on posedge of Shift clock,1: Shift on negedge of Shift clock" newline bitfld.long 0x0 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open drain or bidirectional output..,?,?" bitfld.long 0x0 8.--10. "PINSEL,Shifter Pin Select" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 7. "PINPOL,Shifter Pin Polarity" "0: Pin is active high,1: Pin is active low" bitfld.long 0x0 0.--2. "SMOD,Shifter Mode" "0: Disabled.,1: Receive mode. Captures the current Shifter..,?,?,?,?,?,?" line.long 0x4 "SHIFTCTL1,Shifter Control N Register" bitfld.long 0x4 24.--25. "TIMSEL,Timer Select" "0,1,2,3" bitfld.long 0x4 23. "TIMPOL,Timer Polarity" "0: Shift on posedge of Shift clock,1: Shift on negedge of Shift clock" newline bitfld.long 0x4 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open drain or bidirectional output..,?,?" bitfld.long 0x4 8.--10. "PINSEL,Shifter Pin Select" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 7. "PINPOL,Shifter Pin Polarity" "0: Pin is active high,1: Pin is active low" bitfld.long 0x4 0.--2. "SMOD,Shifter Mode" "0: Disabled.,1: Receive mode. Captures the current Shifter..,?,?,?,?,?,?" line.long 0x8 "SHIFTCTL2,Shifter Control N Register" bitfld.long 0x8 24.--25. "TIMSEL,Timer Select" "0,1,2,3" bitfld.long 0x8 23. "TIMPOL,Timer Polarity" "0: Shift on posedge of Shift clock,1: Shift on negedge of Shift clock" newline bitfld.long 0x8 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open drain or bidirectional output..,?,?" bitfld.long 0x8 8.--10. "PINSEL,Shifter Pin Select" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 7. "PINPOL,Shifter Pin Polarity" "0: Pin is active high,1: Pin is active low" bitfld.long 0x8 0.--2. "SMOD,Shifter Mode" "0: Disabled.,1: Receive mode. Captures the current Shifter..,?,?,?,?,?,?" line.long 0xC "SHIFTCTL3,Shifter Control N Register" bitfld.long 0xC 24.--25. "TIMSEL,Timer Select" "0,1,2,3" bitfld.long 0xC 23. "TIMPOL,Timer Polarity" "0: Shift on posedge of Shift clock,1: Shift on negedge of Shift clock" newline bitfld.long 0xC 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open drain or bidirectional output..,?,?" bitfld.long 0xC 8.--10. "PINSEL,Shifter Pin Select" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 7. "PINPOL,Shifter Pin Polarity" "0: Pin is active high,1: Pin is active low" bitfld.long 0xC 0.--2. "SMOD,Shifter Mode" "0: Disabled.,1: Receive mode. Captures the current Shifter..,?,?,?,?,?,?" group.long 0x100++0xF line.long 0x0 "SHIFTCFG0,Shifter Configuration N Register" bitfld.long 0x0 8. "INSRC,Input Source" "0: Pin,1: Shifter N+1 Output" bitfld.long 0x0 4.--5. "SSTOP,Shifter Stop bit" "0: Stop bit disabled for transmitter/receiver/match..,1: Reserved for transmitter/receiver/match store,?,?" newline bitfld.long 0x0 0.--1. "SSTART,Shifter Start bit" "0: Start bit disabled for..,1: Start bit disabled for..,?,?" line.long 0x4 "SHIFTCFG1,Shifter Configuration N Register" bitfld.long 0x4 8. "INSRC,Input Source" "0: Pin,1: Shifter N+1 Output" bitfld.long 0x4 4.--5. "SSTOP,Shifter Stop bit" "0: Stop bit disabled for transmitter/receiver/match..,1: Reserved for transmitter/receiver/match store,?,?" newline bitfld.long 0x4 0.--1. "SSTART,Shifter Start bit" "0: Start bit disabled for..,1: Start bit disabled for..,?,?" line.long 0x8 "SHIFTCFG2,Shifter Configuration N Register" bitfld.long 0x8 8. "INSRC,Input Source" "0: Pin,1: Shifter N+1 Output" bitfld.long 0x8 4.--5. "SSTOP,Shifter Stop bit" "0: Stop bit disabled for transmitter/receiver/match..,1: Reserved for transmitter/receiver/match store,?,?" newline bitfld.long 0x8 0.--1. "SSTART,Shifter Start bit" "0: Start bit disabled for..,1: Start bit disabled for..,?,?" line.long 0xC "SHIFTCFG3,Shifter Configuration N Register" bitfld.long 0xC 8. "INSRC,Input Source" "0: Pin,1: Shifter N+1 Output" bitfld.long 0xC 4.--5. "SSTOP,Shifter Stop bit" "0: Stop bit disabled for transmitter/receiver/match..,1: Reserved for transmitter/receiver/match store,?,?" newline bitfld.long 0xC 0.--1. "SSTART,Shifter Start bit" "0: Start bit disabled for..,1: Start bit disabled for..,?,?" group.long 0x200++0xF line.long 0x0 "SHIFTBUF0,Shifter Buffer N Register" hexmask.long 0x0 0.--31. 1. "SHIFTBUF,Shift Buffer" line.long 0x4 "SHIFTBUF1,Shifter Buffer N Register" hexmask.long 0x4 0.--31. 1. "SHIFTBUF,Shift Buffer" line.long 0x8 "SHIFTBUF2,Shifter Buffer N Register" hexmask.long 0x8 0.--31. 1. "SHIFTBUF,Shift Buffer" line.long 0xC "SHIFTBUF3,Shifter Buffer N Register" hexmask.long 0xC 0.--31. 1. "SHIFTBUF,Shift Buffer" group.long 0x280++0xF line.long 0x0 "SHIFTBUFBIS0,Shifter Buffer N Bit Swapped Register" hexmask.long 0x0 0.--31. 1. "SHIFTBUFBIS,Shift Buffer" line.long 0x4 "SHIFTBUFBIS1,Shifter Buffer N Bit Swapped Register" hexmask.long 0x4 0.--31. 1. "SHIFTBUFBIS,Shift Buffer" line.long 0x8 "SHIFTBUFBIS2,Shifter Buffer N Bit Swapped Register" hexmask.long 0x8 0.--31. 1. "SHIFTBUFBIS,Shift Buffer" line.long 0xC "SHIFTBUFBIS3,Shifter Buffer N Bit Swapped Register" hexmask.long 0xC 0.--31. 1. "SHIFTBUFBIS,Shift Buffer" group.long 0x300++0xF line.long 0x0 "SHIFTBUFBYS0,Shifter Buffer N Byte Swapped Register" hexmask.long 0x0 0.--31. 1. "SHIFTBUFBYS,Shift Buffer" line.long 0x4 "SHIFTBUFBYS1,Shifter Buffer N Byte Swapped Register" hexmask.long 0x4 0.--31. 1. "SHIFTBUFBYS,Shift Buffer" line.long 0x8 "SHIFTBUFBYS2,Shifter Buffer N Byte Swapped Register" hexmask.long 0x8 0.--31. 1. "SHIFTBUFBYS,Shift Buffer" line.long 0xC "SHIFTBUFBYS3,Shifter Buffer N Byte Swapped Register" hexmask.long 0xC 0.--31. 1. "SHIFTBUFBYS,Shift Buffer" group.long 0x380++0xF line.long 0x0 "SHIFTBUFBBS0,Shifter Buffer N Bit Byte Swapped Register" hexmask.long 0x0 0.--31. 1. "SHIFTBUFBBS,Shift Buffer" line.long 0x4 "SHIFTBUFBBS1,Shifter Buffer N Bit Byte Swapped Register" hexmask.long 0x4 0.--31. 1. "SHIFTBUFBBS,Shift Buffer" line.long 0x8 "SHIFTBUFBBS2,Shifter Buffer N Bit Byte Swapped Register" hexmask.long 0x8 0.--31. 1. "SHIFTBUFBBS,Shift Buffer" line.long 0xC "SHIFTBUFBBS3,Shifter Buffer N Bit Byte Swapped Register" hexmask.long 0xC 0.--31. 1. "SHIFTBUFBBS,Shift Buffer" group.long 0x400++0xF line.long 0x0 "TIMCTL0,Timer Control N Register" hexmask.long.byte 0x0 24.--27. 1. "TRGSEL,Trigger Select" bitfld.long 0x0 23. "TRGPOL,Trigger Polarity" "0: Trigger active high,1: Trigger active low" newline bitfld.long 0x0 22. "TRGSRC,Trigger Source" "0: External trigger selected,1: Internal trigger selected" bitfld.long 0x0 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open drain or bidirectional output..,?,?" newline bitfld.long 0x0 8.--10. "PINSEL,Timer Pin Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0 7. "PINPOL,Timer Pin Polarity" "0: Pin is active high,1: Pin is active low" newline bitfld.long 0x0 0.--1. "TIMOD,Timer Mode" "0: Timer Disabled.,1: Dual 8-bit counters baud/bit mode.,?,?" line.long 0x4 "TIMCTL1,Timer Control N Register" hexmask.long.byte 0x4 24.--27. 1. "TRGSEL,Trigger Select" bitfld.long 0x4 23. "TRGPOL,Trigger Polarity" "0: Trigger active high,1: Trigger active low" newline bitfld.long 0x4 22. "TRGSRC,Trigger Source" "0: External trigger selected,1: Internal trigger selected" bitfld.long 0x4 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open drain or bidirectional output..,?,?" newline bitfld.long 0x4 8.--10. "PINSEL,Timer Pin Select" "0,1,2,3,4,5,6,7" bitfld.long 0x4 7. "PINPOL,Timer Pin Polarity" "0: Pin is active high,1: Pin is active low" newline bitfld.long 0x4 0.--1. "TIMOD,Timer Mode" "0: Timer Disabled.,1: Dual 8-bit counters baud/bit mode.,?,?" line.long 0x8 "TIMCTL2,Timer Control N Register" hexmask.long.byte 0x8 24.--27. 1. "TRGSEL,Trigger Select" bitfld.long 0x8 23. "TRGPOL,Trigger Polarity" "0: Trigger active high,1: Trigger active low" newline bitfld.long 0x8 22. "TRGSRC,Trigger Source" "0: External trigger selected,1: Internal trigger selected" bitfld.long 0x8 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open drain or bidirectional output..,?,?" newline bitfld.long 0x8 8.--10. "PINSEL,Timer Pin Select" "0,1,2,3,4,5,6,7" bitfld.long 0x8 7. "PINPOL,Timer Pin Polarity" "0: Pin is active high,1: Pin is active low" newline bitfld.long 0x8 0.--1. "TIMOD,Timer Mode" "0: Timer Disabled.,1: Dual 8-bit counters baud/bit mode.,?,?" line.long 0xC "TIMCTL3,Timer Control N Register" hexmask.long.byte 0xC 24.--27. 1. "TRGSEL,Trigger Select" bitfld.long 0xC 23. "TRGPOL,Trigger Polarity" "0: Trigger active high,1: Trigger active low" newline bitfld.long 0xC 22. "TRGSRC,Trigger Source" "0: External trigger selected,1: Internal trigger selected" bitfld.long 0xC 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open drain or bidirectional output..,?,?" newline bitfld.long 0xC 8.--10. "PINSEL,Timer Pin Select" "0,1,2,3,4,5,6,7" bitfld.long 0xC 7. "PINPOL,Timer Pin Polarity" "0: Pin is active high,1: Pin is active low" newline bitfld.long 0xC 0.--1. "TIMOD,Timer Mode" "0: Timer Disabled.,1: Dual 8-bit counters baud/bit mode.,?,?" group.long 0x480++0xF line.long 0x0 "TIMCFG0,Timer Configuration N Register" bitfld.long 0x0 24.--25. "TIMOUT,Timer Output" "0: Timer output is logic one when enabled and is..,1: Timer output is logic zero when enabled and is..,?,?" bitfld.long 0x0 20.--21. "TIMDEC,Timer Decrement" "0: Decrement counter on FlexIO clock Shift clock..,1: Decrement counter on Trigger input (both edges)..,?,?" newline bitfld.long 0x0 16.--18. "TIMRST,Timer Reset" "0: Timer never reset,?,?,?,?,?,?,?" bitfld.long 0x0 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on Timer N-1 disable,?,?,?,?,?,?" newline bitfld.long 0x0 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on Timer N-1 enable,?,?,?,?,?,?" bitfld.long 0x0 4.--5. "TSTOP,Timer Stop Bit" "0: Stop bit disabled,1: Stop bit is enabled on timer compare,?,?" newline bitfld.long 0x0 1. "TSTART,Timer Start Bit" "0: Start bit disabled,1: Start bit enabled" line.long 0x4 "TIMCFG1,Timer Configuration N Register" bitfld.long 0x4 24.--25. "TIMOUT,Timer Output" "0: Timer output is logic one when enabled and is..,1: Timer output is logic zero when enabled and is..,?,?" bitfld.long 0x4 20.--21. "TIMDEC,Timer Decrement" "0: Decrement counter on FlexIO clock Shift clock..,1: Decrement counter on Trigger input (both edges)..,?,?" newline bitfld.long 0x4 16.--18. "TIMRST,Timer Reset" "0: Timer never reset,?,?,?,?,?,?,?" bitfld.long 0x4 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on Timer N-1 disable,?,?,?,?,?,?" newline bitfld.long 0x4 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on Timer N-1 enable,?,?,?,?,?,?" bitfld.long 0x4 4.--5. "TSTOP,Timer Stop Bit" "0: Stop bit disabled,1: Stop bit is enabled on timer compare,?,?" newline bitfld.long 0x4 1. "TSTART,Timer Start Bit" "0: Start bit disabled,1: Start bit enabled" line.long 0x8 "TIMCFG2,Timer Configuration N Register" bitfld.long 0x8 24.--25. "TIMOUT,Timer Output" "0: Timer output is logic one when enabled and is..,1: Timer output is logic zero when enabled and is..,?,?" bitfld.long 0x8 20.--21. "TIMDEC,Timer Decrement" "0: Decrement counter on FlexIO clock Shift clock..,1: Decrement counter on Trigger input (both edges)..,?,?" newline bitfld.long 0x8 16.--18. "TIMRST,Timer Reset" "0: Timer never reset,?,?,?,?,?,?,?" bitfld.long 0x8 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on Timer N-1 disable,?,?,?,?,?,?" newline bitfld.long 0x8 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on Timer N-1 enable,?,?,?,?,?,?" bitfld.long 0x8 4.--5. "TSTOP,Timer Stop Bit" "0: Stop bit disabled,1: Stop bit is enabled on timer compare,?,?" newline bitfld.long 0x8 1. "TSTART,Timer Start Bit" "0: Start bit disabled,1: Start bit enabled" line.long 0xC "TIMCFG3,Timer Configuration N Register" bitfld.long 0xC 24.--25. "TIMOUT,Timer Output" "0: Timer output is logic one when enabled and is..,1: Timer output is logic zero when enabled and is..,?,?" bitfld.long 0xC 20.--21. "TIMDEC,Timer Decrement" "0: Decrement counter on FlexIO clock Shift clock..,1: Decrement counter on Trigger input (both edges)..,?,?" newline bitfld.long 0xC 16.--18. "TIMRST,Timer Reset" "0: Timer never reset,?,?,?,?,?,?,?" bitfld.long 0xC 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on Timer N-1 disable,?,?,?,?,?,?" newline bitfld.long 0xC 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on Timer N-1 enable,?,?,?,?,?,?" bitfld.long 0xC 4.--5. "TSTOP,Timer Stop Bit" "0: Stop bit disabled,1: Stop bit is enabled on timer compare,?,?" newline bitfld.long 0xC 1. "TSTART,Timer Start Bit" "0: Start bit disabled,1: Start bit enabled" group.long 0x500++0xF line.long 0x0 "TIMCMP0,Timer Compare N Register" hexmask.long.word 0x0 0.--15. 1. "CMP,Timer Compare Value" line.long 0x4 "TIMCMP1,Timer Compare N Register" hexmask.long.word 0x4 0.--15. 1. "CMP,Timer Compare Value" line.long 0x8 "TIMCMP2,Timer Compare N Register" hexmask.long.word 0x8 0.--15. 1. "CMP,Timer Compare Value" line.long 0xC "TIMCMP3,Timer Compare N Register" hexmask.long.word 0xC 0.--15. 1. "CMP,Timer Compare Value" tree.end tree "FTFC (Flash Memory Module)" base ad:0x40020000 group.byte 0x0++0x1 line.byte 0x0 "FSTAT,Flash Status Register" bitfld.byte 0x0 7. "CCIF,Command Complete Interrupt Flag" "0,1" bitfld.byte 0x0 6. "RDCOLERR,FTFC Read Collision Error Flag" "0: No collision error detected,1: Collision error detected" newline bitfld.byte 0x0 5. "ACCERR,Flash Access Error Flag" "0: No access error detected,1: Access error detected" bitfld.byte 0x0 4. "FPVIOL,Flash Protection Violation Flag" "0: No protection violation detected,1: Protection violation detected" newline rbitfld.byte 0x0 0. "MGSTAT0,Memory Controller Command Completion Status Flag" "0,1" line.byte 0x1 "FCNFG,Flash Configuration Register" bitfld.byte 0x1 7. "CCIE,Command Complete Interrupt Enable" "0: Command complete interrupt disabled,1: Command complete interrupt enabled. An interrupt.." bitfld.byte 0x1 6. "RDCOLLIE,Read Collision Error Interrupt Enable" "0: Read collision error interrupt disabled,1: Read collision error interrupt enabled. An.." newline rbitfld.byte 0x1 5. "ERSAREQ,Erase All Request" "0: No request or request complete,?" bitfld.byte 0x1 4. "ERSSUSP,Erase Suspend" "0: No suspend requested,1: Suspend the current Erase Flash Sector command.." newline rbitfld.byte 0x1 1. "RAMRDY,RAM Ready" "0,1" rbitfld.byte 0x1 0. "EEERDY,EEERDY" "0,1" rgroup.byte 0x2++0x1 line.byte 0x0 "FSEC,Flash Security Register" bitfld.byte 0x0 6.--7. "KEYEN,Backdoor Key Security Enable" "0: Backdoor key access disabled,1: Backdoor key access disabled (preferred KEYEN..,?,?" bitfld.byte 0x0 4.--5. "MEEN,Mass Erase Enable Bits" "0: Mass erase is enabled,1: Mass erase is enabled,?,?" newline bitfld.byte 0x0 2.--3. "FSLACC,Factory Failure Analysis Access Code" "0: Factory access granted,?,?,?" bitfld.byte 0x0 0.--1. "SEC,Flash Security" "0,1,2,3" line.byte 0x1 "FOPT,Flash Option Register" hexmask.byte 0x1 0.--7. 1. "OPT,Nonvolatile Option" group.byte 0x4++0xF line.byte 0x0 "FCCOB3,Flash Common Command Object Registers" hexmask.byte 0x0 0.--7. 1. "CCOBn,CCOBn" line.byte 0x1 "FCCOB2,Flash Common Command Object Registers" hexmask.byte 0x1 0.--7. 1. "CCOBn,CCOBn" line.byte 0x2 "FCCOB1,Flash Common Command Object Registers" hexmask.byte 0x2 0.--7. 1. "CCOBn,CCOBn" line.byte 0x3 "FCCOB0,Flash Common Command Object Registers" hexmask.byte 0x3 0.--7. 1. "CCOBn,CCOBn" line.byte 0x4 "FCCOB7,Flash Common Command Object Registers" hexmask.byte 0x4 0.--7. 1. "CCOBn,CCOBn" line.byte 0x5 "FCCOB6,Flash Common Command Object Registers" hexmask.byte 0x5 0.--7. 1. "CCOBn,CCOBn" line.byte 0x6 "FCCOB5,Flash Common Command Object Registers" hexmask.byte 0x6 0.--7. 1. "CCOBn,CCOBn" line.byte 0x7 "FCCOB4,Flash Common Command Object Registers" hexmask.byte 0x7 0.--7. 1. "CCOBn,CCOBn" line.byte 0x8 "FCCOBB,Flash Common Command Object Registers" hexmask.byte 0x8 0.--7. 1. "CCOBn,CCOBn" line.byte 0x9 "FCCOBA,Flash Common Command Object Registers" hexmask.byte 0x9 0.--7. 1. "CCOBn,CCOBn" line.byte 0xA "FCCOB9,Flash Common Command Object Registers" hexmask.byte 0xA 0.--7. 1. "CCOBn,CCOBn" line.byte 0xB "FCCOB8,Flash Common Command Object Registers" hexmask.byte 0xB 0.--7. 1. "CCOBn,CCOBn" line.byte 0xC "FPROT3,Program Flash Protection Registers" hexmask.byte 0xC 0.--7. 1. "PROT,Program Flash Region Protect" line.byte 0xD "FPROT2,Program Flash Protection Registers" hexmask.byte 0xD 0.--7. 1. "PROT,Program Flash Region Protect" line.byte 0xE "FPROT1,Program Flash Protection Registers" hexmask.byte 0xE 0.--7. 1. "PROT,Program Flash Region Protect" line.byte 0xF "FPROT0,Program Flash Protection Registers" hexmask.byte 0xF 0.--7. 1. "PROT,Program Flash Region Protect" group.byte 0x16++0x1 line.byte 0x0 "FEPROT,EEPROM Protection Register" hexmask.byte 0x0 0.--7. 1. "EPROT,EEPROM Region Protect" line.byte 0x1 "FDPROT,Data Flash Protection Register" hexmask.byte 0x1 0.--7. 1. "DPROT,Data Flash Region Protect" rgroup.byte 0x2C++0x0 line.byte 0x0 "FCSESTAT,Flash CSEc Status Register" bitfld.byte 0x0 7. "IDB,Internal Debug" "0,1" bitfld.byte 0x0 6. "EDB,External Debug" "0,1" newline bitfld.byte 0x0 5. "RIN,Random Number Generator Initialized" "0,1" bitfld.byte 0x0 4. "BOK,Secure Boot OK" "0,1" newline bitfld.byte 0x0 3. "BFN,Secure Boot Finished" "0,1" bitfld.byte 0x0 2. "BIN,Secure Boot Initialization" "0,1" newline bitfld.byte 0x0 1. "SB,Secure Boot" "0,1" bitfld.byte 0x0 0. "BSY,Busy" "0,1" group.byte 0x2E++0x1 line.byte 0x0 "FERSTAT,Flash Error Status Register" bitfld.byte 0x0 1. "DFDIF,Double Bit Fault Detect Interrupt Flag" "0: Double bit fault not detected during a valid..,1: Double bit fault detected (or FERCNFG[FDFD] is.." line.byte 0x1 "FERCNFG,Flash Error Configuration Register" bitfld.byte 0x1 5. "FDFD,Force Double Bit Fault Detect" "0: FERSTAT[DFDIF] sets only if a double bit fault..,1: FERSTAT[DFDIF] sets during any valid flash read.." bitfld.byte 0x1 1. "DFDIE,Double Bit Fault Detect Interrupt Enable" "0: Double bit fault detect interrupt disabled,1: Double bit fault detect interrupt enabled. An.." tree.end tree "FTM (FlexTimer Module)" base ad:0x0 sif (cpuis("S32K142*")) tree "FTM3" base ad:0x40026000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end endif sif (cpuis("S32K144*")) tree "FTM3" base ad:0x40026000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" tree.end endif sif (cpuis("S32K146*")) tree "FTM3" base ad:0x40026000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end endif sif (cpuis("S32K148*")) tree "FTM3" base ad:0x40026000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end tree "FTM4" base ad:0x4006E000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end endif sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) tree "FTM0" base ad:0x40038000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" endif tree.end endif sif (cpuis("S32K146*")) tree "FTM0" base ad:0x40038000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end tree "FTM1" base ad:0x40039000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end endif sif (cpuis("S32K148*")) tree "FTM0" base ad:0x40038000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end tree "FTM1" base ad:0x40039000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end tree "FTM2" base ad:0x4003A000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end endif sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) tree "FTM1" base ad:0x40039000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" endif tree.end endif sif (cpuis("S32K142*")) tree "FTM2" base ad:0x4003A000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end endif sif (cpuis("S32K144*")) tree "FTM2" base ad:0x4003A000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" tree.end endif sif (cpuis("S32K146*")) tree "FTM2" base ad:0x4003A000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end tree "FTM4" base ad:0x4006E000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end tree "FTM5" base ad:0x4006F000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end endif sif (cpuis("S32K148*")) tree "FTM5" base ad:0x4006F000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end tree "FTM6" base ad:0x40070000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end tree "FTM7" base ad:0x40071000 group.long 0x0++0x4F line.long 0x0 "SC,Status And Control" hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler" bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" newline bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled,1: Channel output port is enabled" rbitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed." newline bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.." rbitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened." newline bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled." bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode." newline bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,?,?" bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" line.long 0x4 "CNT,Counter" hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value" line.long 0x8 "MOD,Modulo" hexmask.long.word 0x8 0.--15. 1. "MOD,MOD" line.long 0xC "C0SC,Channel (n) Status And Control" rbitfld.long 0xC 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0xC 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0xC 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0xC 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0xC 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0xC 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0xC 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0xC 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0xC 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0xC 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0xC 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x10 "C0V,Channel (n) Value" hexmask.long.word 0x10 0.--15. 1. "VAL,Channel Value" line.long 0x14 "C1SC,Channel (n) Status And Control" rbitfld.long 0x14 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x14 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x14 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x14 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x14 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x14 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x14 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x14 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x14 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x14 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x14 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x18 "C1V,Channel (n) Value" hexmask.long.word 0x18 0.--15. 1. "VAL,Channel Value" line.long 0x1C "C2SC,Channel (n) Status And Control" rbitfld.long 0x1C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x1C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x1C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x1C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x1C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x1C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x1C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x1C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x1C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x1C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x1C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x20 "C2V,Channel (n) Value" hexmask.long.word 0x20 0.--15. 1. "VAL,Channel Value" line.long 0x24 "C3SC,Channel (n) Status And Control" rbitfld.long 0x24 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x24 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x24 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x24 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x24 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x24 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x24 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x24 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x24 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x24 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x24 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x28 "C3V,Channel (n) Value" hexmask.long.word 0x28 0.--15. 1. "VAL,Channel Value" line.long 0x2C "C4SC,Channel (n) Status And Control" rbitfld.long 0x2C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x2C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x2C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x2C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x2C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x2C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x2C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x2C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x2C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x2C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x2C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x30 "C4V,Channel (n) Value" hexmask.long.word 0x30 0.--15. 1. "VAL,Channel Value" line.long 0x34 "C5SC,Channel (n) Status And Control" rbitfld.long 0x34 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x34 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x34 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x34 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x34 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x34 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x34 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x34 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x34 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x34 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x34 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x38 "C5V,Channel (n) Value" hexmask.long.word 0x38 0.--15. 1. "VAL,Channel Value" line.long 0x3C "C6SC,Channel (n) Status And Control" rbitfld.long 0x3C 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x3C 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x3C 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x3C 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x3C 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x3C 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x3C 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x3C 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x3C 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x3C 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x3C 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x40 "C6V,Channel (n) Value" hexmask.long.word 0x40 0.--15. 1. "VAL,Channel Value" line.long 0x44 "C7SC,Channel (n) Status And Control" rbitfld.long 0x44 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one." rbitfld.long 0x44 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one." newline bitfld.long 0x44 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.." rbitfld.long 0x44 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred." newline bitfld.long 0x44 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt." bitfld.long 0x44 5. "MSB,Channel (n) Mode Select" "0,1" newline bitfld.long 0x44 4. "MSA,Channel (n) Mode Select" "0,1" bitfld.long 0x44 3. "ELSB,Channel (n) Edge or Level Select" "0,1" newline bitfld.long 0x44 2. "ELSA,Channel (n) Edge or Level Select" "0,1" bitfld.long 0x44 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.." newline bitfld.long 0x44 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers." line.long 0x48 "C7V,Channel (n) Value" hexmask.long.word 0x48 0.--15. 1. "VAL,Channel Value" line.long 0x4C "CNTIN,Counter Initial Value" hexmask.long.word 0x4C 0.--15. 1. "INIT,INIT" rgroup.long 0x50++0x3 line.long 0x0 "STATUS,Capture And Compare Status" bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred." newline bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred." bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred." group.long 0x54++0x4F line.long 0x0 "MODE,Features Mode Selection" bitfld.long 0x0 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled." bitfld.long 0x0 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,?,?" newline bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled." bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.." newline bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled." bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1" newline bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.." line.long 0x4 "SYNC,Synchronization" bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected." bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled." bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled." newline bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.." bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.." newline bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled." bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled." line.long 0x8 "OUTINIT,Initial State For Channels Output" bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." newline bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1." line.long 0xC "OUTMASK,Output Mask" bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." newline bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.." line.long 0x10 "COMBINE,Function For Linked Channels" bitfld.long 0x10 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1" bitfld.long 0x10 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1" newline bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0,1" newline bitfld.long 0x10 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1" bitfld.long 0x10 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1" newline bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0,1" newline bitfld.long 0x10 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1" bitfld.long 0x10 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1" newline bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0,1" newline bitfld.long 0x10 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1" bitfld.long 0x10 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.." newline bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.." bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.." newline bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active." bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1" newline bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.." bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0,1" line.long 0x14 "DEADTIME,Deadtime Configuration" hexmask.long.byte 0x14 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value" line.long 0x18 "EXTTRIG,FTM External Trigger" bitfld.long 0x18 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated." bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.." newline bitfld.long 0x18 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." newline bitfld.long 0x18 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." bitfld.long 0x18 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.." line.long 0x1C "POL,Channels Polarity" bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." newline bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low." line.long 0x20 "FMS,Fault Mode Status" rbitfld.long 0x20 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected." bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.." newline rbitfld.long 0x20 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1." rbitfld.long 0x20 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." rbitfld.long 0x20 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." newline rbitfld.long 0x20 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input." line.long 0x24 "FILTER,Input Capture Filter Control" hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter" hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter" newline hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter" hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter" line.long 0x28 "FLTCTRL,Fault Control" bitfld.long 0x28 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.." hexmask.long.byte 0x28 8.--11. 1. "FFVAL,Fault Input Filter" newline bitfld.long 0x28 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." bitfld.long 0x28 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled." newline bitfld.long 0x28 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled." newline bitfld.long 0x28 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled." bitfld.long 0x28 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled." line.long 0x2C "QDCTRL,Quadrature Decoder Control And Status" bitfld.long 0x2C 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled." bitfld.long 0x2C 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled." newline bitfld.long 0x2C 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.." bitfld.long 0x2C 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.." newline bitfld.long 0x2C 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode." rbitfld.long 0x2C 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.." newline rbitfld.long 0x2C 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.." bitfld.long 0x2C 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled." line.long 0x30 "CONF,Configuration" bitfld.long 0x30 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.." bitfld.long 0x30 10. "GTBEOUT,Global Time Base Output" "0,1" newline bitfld.long 0x30 9. "GTBEEN,Global Time Base Enable" "0,1" bitfld.long 0x30 6.--7. "BDMMODE,Debug Mode" "0,1,2,3" newline hexmask.long.byte 0x30 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities" line.long 0x34 "FLTPOL,FTM Fault Input Polarity" bitfld.long 0x34 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." newline bitfld.long 0x34 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." bitfld.long 0x34 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.." line.long 0x38 "SYNCONF,Synchronization Configuration" bitfld.long 0x38 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.." bitfld.long 0x38 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.." newline bitfld.long 0x38 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.." bitfld.long 0x38 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.." newline bitfld.long 0x38 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.." bitfld.long 0x38 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.." newline bitfld.long 0x38 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.." bitfld.long 0x38 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.." newline bitfld.long 0x38 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.." bitfld.long 0x38 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.." newline bitfld.long 0x38 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected." bitfld.long 0x38 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.." newline bitfld.long 0x38 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.." bitfld.long 0x38 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.." newline bitfld.long 0x38 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.." line.long 0x3C "INVCTRL,FTM Inverting Control" bitfld.long 0x3C 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." newline bitfld.long 0x3C 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." bitfld.long 0x3C 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled." line.long 0x40 "SWOCTRL,FTM Software Output Control" bitfld.long 0x40 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." bitfld.long 0x40 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.." newline bitfld.long 0x40 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." newline bitfld.long 0x40 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." bitfld.long 0x40 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.." line.long 0x44 "PWMLOAD,FTM PWM Load" bitfld.long 0x44 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set." bitfld.long 0x44 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.." newline bitfld.long 0x44 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled." bitfld.long 0x44 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.." newline bitfld.long 0x44 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." newline bitfld.long 0x44 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." bitfld.long 0x44 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity." line.long 0x48 "HCR,Half Cycle Register" hexmask.long.word 0x48 0.--15. 1. "HCVAL,Half Cycle Value" line.long 0x4C "PAIR0DEADTIME,Pair 0 Deadtime Configuration" hexmask.long.byte 0x4C 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x4C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x4C 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xA8++0x3 line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB0++0x3 line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0xB8++0x3 line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration" hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value" bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,?,?" newline hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value" group.long 0x200++0x23 line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value" hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value" hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value" line.long 0x4 "C0V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x4 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x4 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x8 "C1V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x8 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x8 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0xC "C2V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0xC 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0xC 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x10 "C3V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x10 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x10 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x14 "C4V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x14 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x14 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x18 "C5V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x18 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x18 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x1C "C6V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x1C 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x1C 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" line.long 0x20 "C7V_MIRROR,Mirror of Channel (n) Match Value" hexmask.long.word 0x20 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value" hexmask.long.byte 0x20 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value" tree.end endif tree.end tree "GPIO (General-Purpose Input/Output)" base ad:0x0 tree "PTA" base ad:0x400FF000 group.long 0x0++0x3 line.long 0x0 "PDOR,Port Data Output Register" hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output" wgroup.long 0x4++0xB line.long 0x0 "PSOR,Port Set Output Register" hexmask.long 0x0 0.--31. 1. "PTSO,Port Set Output" line.long 0x4 "PCOR,Port Clear Output Register" hexmask.long 0x4 0.--31. 1. "PTCO,Port Clear Output" line.long 0x8 "PTOR,Port Toggle Output Register" hexmask.long 0x8 0.--31. 1. "PTTO,Port Toggle Output" rgroup.long 0x10++0x3 line.long 0x0 "PDIR,Port Data Input Register" hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input" group.long 0x14++0x7 line.long 0x0 "PDDR,Port Data Direction Register" hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction" line.long 0x4 "PIDR,Port Input Disable Register" hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable" tree.end tree "PTB" base ad:0x400FF040 group.long 0x0++0x3 line.long 0x0 "PDOR,Port Data Output Register" hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output" wgroup.long 0x4++0xB line.long 0x0 "PSOR,Port Set Output Register" hexmask.long 0x0 0.--31. 1. "PTSO,Port Set Output" line.long 0x4 "PCOR,Port Clear Output Register" hexmask.long 0x4 0.--31. 1. "PTCO,Port Clear Output" line.long 0x8 "PTOR,Port Toggle Output Register" hexmask.long 0x8 0.--31. 1. "PTTO,Port Toggle Output" rgroup.long 0x10++0x3 line.long 0x0 "PDIR,Port Data Input Register" hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input" group.long 0x14++0x7 line.long 0x0 "PDDR,Port Data Direction Register" hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction" line.long 0x4 "PIDR,Port Input Disable Register" hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable" tree.end tree "PTC" base ad:0x400FF080 group.long 0x0++0x3 line.long 0x0 "PDOR,Port Data Output Register" hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output" wgroup.long 0x4++0xB line.long 0x0 "PSOR,Port Set Output Register" hexmask.long 0x0 0.--31. 1. "PTSO,Port Set Output" line.long 0x4 "PCOR,Port Clear Output Register" hexmask.long 0x4 0.--31. 1. "PTCO,Port Clear Output" line.long 0x8 "PTOR,Port Toggle Output Register" hexmask.long 0x8 0.--31. 1. "PTTO,Port Toggle Output" rgroup.long 0x10++0x3 line.long 0x0 "PDIR,Port Data Input Register" hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input" group.long 0x14++0x7 line.long 0x0 "PDDR,Port Data Direction Register" hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction" line.long 0x4 "PIDR,Port Input Disable Register" hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable" tree.end tree "PTD" base ad:0x400FF0C0 group.long 0x0++0x3 line.long 0x0 "PDOR,Port Data Output Register" hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output" wgroup.long 0x4++0xB line.long 0x0 "PSOR,Port Set Output Register" hexmask.long 0x0 0.--31. 1. "PTSO,Port Set Output" line.long 0x4 "PCOR,Port Clear Output Register" hexmask.long 0x4 0.--31. 1. "PTCO,Port Clear Output" line.long 0x8 "PTOR,Port Toggle Output Register" hexmask.long 0x8 0.--31. 1. "PTTO,Port Toggle Output" rgroup.long 0x10++0x3 line.long 0x0 "PDIR,Port Data Input Register" hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input" group.long 0x14++0x7 line.long 0x0 "PDDR,Port Data Direction Register" hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction" line.long 0x4 "PIDR,Port Input Disable Register" hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable" tree.end tree "PTE" base ad:0x400FF100 group.long 0x0++0x3 line.long 0x0 "PDOR,Port Data Output Register" hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output" wgroup.long 0x4++0xB line.long 0x0 "PSOR,Port Set Output Register" hexmask.long 0x0 0.--31. 1. "PTSO,Port Set Output" line.long 0x4 "PCOR,Port Clear Output Register" hexmask.long 0x4 0.--31. 1. "PTCO,Port Clear Output" line.long 0x8 "PTOR,Port Toggle Output Register" hexmask.long 0x8 0.--31. 1. "PTTO,Port Toggle Output" rgroup.long 0x10++0x3 line.long 0x0 "PDIR,Port Data Input Register" hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input" group.long 0x14++0x7 line.long 0x0 "PDDR,Port Data Direction Register" hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction" line.long 0x4 "PIDR,Port Input Disable Register" hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable" tree.end tree.end tree "LMEM (Local Memory Controller)" base ad:0xE0082000 group.long 0x0++0xF line.long 0x0 "LMEM_PCCCR,Cache control register" bitfld.long 0x0 31. "GO,Initiate Cache Command" "0: Write: no effect. Read: no cache command active.,1: Write: initiate command indicated by bits 27-24." bitfld.long 0x0 27. "PUSHW1,Push Way 1" "0: No operation,1: When setting the GO bit push all modified lines.." newline bitfld.long 0x0 26. "INVW1,Invalidate Way 1" "0: No operation,1: When setting the GO bit invalidate all lines in.." bitfld.long 0x0 25. "PUSHW0,Push Way 0" "0: No operation,1: When setting the GO bit push all modified lines.." newline bitfld.long 0x0 24. "INVW0,Invalidate Way 0" "0: No operation,1: When setting the GO bit invalidate all lines in.." bitfld.long 0x0 3. "PCCR3,Forces no allocation on cache misses (must also have PCCR2 asserted)" "0,1" newline bitfld.long 0x0 2. "PCCR2,Forces all cacheable spaces to write through" "0,1" bitfld.long 0x0 0. "ENCACHE,Cache enable" "0: Cache disabled,1: Cache enabled" line.long 0x4 "LMEM_PCCLCR,Cache line control register" bitfld.long 0x4 27. "LACC,Line access type" "0: Read,1: Write" bitfld.long 0x4 26. "LADSEL,Line Address Select" "0: Cache address,1: Physical address" newline bitfld.long 0x4 24.--25. "LCMD,Line Command" "0: Search and read or write,1: Invalidate,?,?" bitfld.long 0x4 22. "LCWAY,Line Command Way" "0,1" newline bitfld.long 0x4 21. "LCIMB,Line Command Initial Modified Bit" "0,1" bitfld.long 0x4 20. "LCIVB,Line Command Initial Valid Bit" "0,1" newline bitfld.long 0x4 16. "TDSEL,Tag/Data Select" "0: Data,1: Tag" bitfld.long 0x4 14. "WSEL,Way select" "0: Way 0,1: Way 1" newline hexmask.long.word 0x4 2.--13. 1. "CACHEADDR,Cache address" bitfld.long 0x4 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.." line.long 0x8 "LMEM_PCCSAR,Cache search address register" hexmask.long 0x8 2.--31. 1. "PHYADDR,Physical Address" bitfld.long 0x8 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.." line.long 0xC "LMEM_PCCCVR,Cache read/write value register" hexmask.long 0xC 0.--31. 1. "DATA,Cache read/write Data" group.long 0x20++0x3 line.long 0x0 "PCCRMR,Cache regions mode register" bitfld.long 0x0 30.--31. "R0,Region 0 mode" "0: Non-cacheable,1: Non-cacheable,?,?" bitfld.long 0x0 28.--29. "R1,Region 1 mode" "0: Non-cacheable,1: Non-cacheable,?,?" newline bitfld.long 0x0 26.--27. "R2,Region 2 mode" "0: Non-cacheable,1: Non-cacheable,?,?" bitfld.long 0x0 24.--25. "R3,Region 3 mode" "0: Non-cacheable,1: Non-cacheable,?,?" newline bitfld.long 0x0 22.--23. "R4,Region 4 mode" "0: Non-cacheable,1: Non-cacheable,?,?" bitfld.long 0x0 20.--21. "R5,Region 5 mode" "0: Non-cacheable,1: Non-cacheable,?,?" newline bitfld.long 0x0 18.--19. "R6,Region 6 mode" "0: Non-cacheable,1: Non-cacheable,?,?" bitfld.long 0x0 16.--17. "R7,Region 7 mode" "0: Non-cacheable,1: Non-cacheable,?,?" newline bitfld.long 0x0 14.--15. "R8,Region 8 mode" "0: Non-cacheable,1: Non-cacheable,?,?" bitfld.long 0x0 12.--13. "R9,Region 9 mode" "0: Non-cacheable,1: Non-cacheable,?,?" newline bitfld.long 0x0 10.--11. "R10,Region 10 mode" "0: Non-cacheable,1: Non-cacheable,?,?" bitfld.long 0x0 8.--9. "R11,Region 11 mode" "0: Non-cacheable,1: Non-cacheable,?,?" newline bitfld.long 0x0 6.--7. "R12,Region 12 mode" "0: Non-cacheable,1: Non-cacheable,?,?" bitfld.long 0x0 4.--5. "R13,Region 13 mode" "0: Non-cacheable,1: Non-cacheable,?,?" newline bitfld.long 0x0 2.--3. "R14,Region 14 mode" "0: Non-cacheable,1: Non-cacheable,?,?" bitfld.long 0x0 0.--1. "R15,Region 15 mode" "0: Non-cacheable,1: Non-cacheable,?,?" tree.end sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")) base ad:0x40066000 elif (cpuis("S32K148*")) base ad:0x0 endif tree "LPI2C (Low-Power Inter-Integrated Circuit)" sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")) rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Master Receive FIFO Size" hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Master Transmit FIFO Size" group.long 0x10++0x1F line.long 0x0 "MCR,Master Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Master is disabled in debug mode.,1: Master is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Master is enabled in Doze mode.,1: Master is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Master Enable" "0: Master logic is disabled.,1: Master logic is enabled." line.long 0x4 "MSR,Master Status Register" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle.,1: I2C Bus is busy." rbitfld.long 0x4 24. "MBF,Master Busy Flag" "0: I2C Master is idle.,1: I2C Master is busy." newline bitfld.long 0x4 14. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." bitfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout has not occurred or is disabled.,1: Pin low timeout has occurred." newline bitfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No error.,1: Master sending or receiving data without START.." bitfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Master has not lost arbitration.,1: Master has lost arbitration." newline bitfld.long 0x4 10. "NDF,NACK Detect Flag" "0: Unexpected NACK not detected.,1: Unexpected NACK was detected." bitfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Master has not generated a STOP condition.,1: Master has generated a STOP condition." newline bitfld.long 0x4 8. "EPF,End Packet Flag" "0: Master has not generated a STOP or Repeated..,1: Master has generated a STOP or Repeated START.." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "MIER,Master Interrupt Enable Register" bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Interrupt enabled.,1: Interrupt disabled." bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "MDER,Master DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "MCFGR0,Master Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the RMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request input is disabled.,1: Host request input is enabled." line.long 0x14 "MCFGR1,Master Configuration Register 1" bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: LPI2C configured for 2-pin open drain mode.,1: LPI2C configured for 2-pin output only mode..,?,?,?,?,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match disabled.,?,?,?,?,?,?,?" newline bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: Pin Low Timeout Flag will set if SCL is low for..,1: Pin Low Timeout Flag will set if either SCL or.." bitfld.long 0x14 9. "IGNACK,IGNACK" "0: LPI2C Master will receive ACK and NACK normally.,1: LPI2C Master will treat a received NACK as if it.." newline bitfld.long 0x14 8. "AUTOSTOP,Automatic STOP Generation" "0: No effect.,1: STOP condition is automatically generated.." bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" line.long 0x18 "MCFGR2,Master Configuration Register 2" hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout" line.long 0x1C "MCFGR3,Master Configuration Register 3" hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout" group.long 0x40++0x3 line.long 0x0 "MDMR,Master Data Match Register" hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value" hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value" group.long 0x48++0x3 line.long 0x0 "MCCR0,Master Clock Configuration Register 0" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x50++0x3 line.long 0x0 "MCCR1,Master Clock Configuration Register 1" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x58++0x3 line.long 0x0 "MFCR,Master FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "MFSR,Master FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" wgroup.long 0x60++0x3 line.long 0x0 "MTDR,Master Transmit Data Register" bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit DATA[7:0].,1: Receive (DATA[7:0] + 1) bytes.,?,?,?,?,?,?" hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x70++0x3 line.long 0x0 "MRDR,Master Receive Data Register" bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Receive FIFO is not empty.,1: Receive FIFO is empty." hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data" group.long 0x110++0xF line.long 0x0 "SCR,Slave Control Register" bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Filter remains enabled in Doze mode.,1: Filter is disabled in Doze mode." bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable digital filter and output delay counter..,1: Enable digital filter and output delay counter.." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Slave logic is not reset.,1: Slave logic is reset." bitfld.long 0x0 0. "SEN,Slave Enable" "0: Slave mode is disabled.,1: Slave mode is enabled." line.long 0x4 "SSR,Slave Status Register" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle.,1: I2C Bus is busy." rbitfld.long 0x4 24. "SBF,Slave Busy Flag" "0: I2C Slave is idle.,1: I2C Slave is busy." newline rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: SMBus Alert Response disabled or not detected.,1: SMBus Alert Response enabled and detected." rbitfld.long 0x4 14. "GCF,General Call Flag" "0: Slave has not detected the General Call Address..,1: Slave has detected the General Call Address." newline rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Have not received ADDR1 or ADDR0/ADDR1 range..,1: Have received ADDR1 or ADDR0/ADDR1 range.." rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: Have not received ADDR0 matching address.,1: Have received ADDR0 matching address." newline bitfld.long 0x4 11. "FEF,FIFO Error Flag" "0: FIFO underflow or overflow not detected.,1: FIFO underflow or overflow detected." bitfld.long 0x4 10. "BEF,Bit Error Flag" "0: Slave has not detected a bit error.,1: Slave has detected a bit error." newline bitfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Slave has not detected a STOP condition.,1: Slave has detected a STOP condition." bitfld.long 0x4 8. "RSF,Repeated Start Flag" "0: Slave has not detected a Repeated START condition.,1: Slave has detected a Repeated START condition." newline rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Transmit ACK/NACK is not required.,1: Transmit ACK/NACK is required." rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Address Status Register is not valid.,1: Address Status Register is valid." newline rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "SIER,Slave Interrupt Enable Register" bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 13. "AM1F,Address Match 1 Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Interrupt enabled.,1: Interrupt disabled." newline bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "SDER,Slave DMA Enable Register" bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." newline bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" group.long 0x124++0x7 line.long 0x0 "SCFGR1,Slave Configuration Register 1" bitfld.long 0x0 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit).,1: Address match 0 (10-bit).,?,?,?,?,?,?" bitfld.long 0x0 13. "HSMEN,High Speed Mode Enable" "0: Disables detection of Hs-mode master code.,1: Enables detection of Hs-mode master code." newline bitfld.long 0x0 12. "IGNACK,Ignore NACK" "0: Slave will end transfer when NACK detected.,1: Slave will not end transfer when NACK detected." bitfld.long 0x0 11. "RXCFG,Receive Data Configuration" "0: Reading the receive data register will return..,1: Reading the receive data register when the.." newline bitfld.long 0x0 10. "TXCFG,Transmit Flag Configuration" "0: Transmit Data Flag will only assert during a..,1: Transmit Data Flag will assert whenever the.." bitfld.long 0x0 9. "SAEN,SMBus Alert Enable" "0: Disables match on SMBus Alert.,1: Enables match on SMBus Alert." newline bitfld.long 0x0 8. "GCEN,General Call Enable" "0: General Call address is disabled.,1: General call address is enabled." bitfld.long 0x0 3. "ACKSTALL,ACK SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." newline bitfld.long 0x0 2. "TXDSTALL,TX Data SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." bitfld.long 0x0 1. "RXSTALL,RX SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." newline bitfld.long 0x0 0. "ADRSTALL,Address SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." line.long 0x4 "SCFGR2,Slave Configuration Register 2" hexmask.long.byte 0x4 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x4 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.byte 0x4 8.--13. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x4 0.--3. 1. "CLKHOLD,Clock Hold Time" group.long 0x140++0x3 line.long 0x0 "SAMR,Slave Address Match Register" hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value" hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value" rgroup.long 0x150++0x3 line.long 0x0 "SASR,Slave Address Status Register" bitfld.long 0x0 14. "ANV,Address Not Valid" "0: RADDR is valid.,1: RADDR is not valid." hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address" group.long 0x154++0x3 line.long 0x0 "STAR,Slave Transmit ACK Register" bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK for received word.,1: Transmit NACK for received word." wgroup.long 0x160++0x3 line.long 0x0 "STDR,Slave Transmit Data Register" hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x170++0x3 line.long 0x0 "SRDR,Slave Receive Data Register" bitfld.long 0x0 15. "SOF,Start Of Frame" "0: Indicates this is not the first data word since..,1: Indicates this is the first data word since a.." bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: The Receive Data Register is not empty.,1: The Receive Data Register is empty." newline hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data" endif sif (cpuis("S32K148*")) tree "LPI2C0" base ad:0x40066000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Master Receive FIFO Size" hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Master Transmit FIFO Size" group.long 0x10++0x1F line.long 0x0 "MCR,Master Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Master is disabled in debug mode.,1: Master is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Master is enabled in Doze mode.,1: Master is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Master Enable" "0: Master logic is disabled.,1: Master logic is enabled." line.long 0x4 "MSR,Master Status Register" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle.,1: I2C Bus is busy." rbitfld.long 0x4 24. "MBF,Master Busy Flag" "0: I2C Master is idle.,1: I2C Master is busy." newline bitfld.long 0x4 14. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." bitfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout has not occurred or is disabled.,1: Pin low timeout has occurred." newline bitfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No error.,1: Master sending or receiving data without START.." bitfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Master has not lost arbitration.,1: Master has lost arbitration." newline bitfld.long 0x4 10. "NDF,NACK Detect Flag" "0: Unexpected NACK not detected.,1: Unexpected NACK was detected." bitfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Master has not generated a STOP condition.,1: Master has generated a STOP condition." newline bitfld.long 0x4 8. "EPF,End Packet Flag" "0: Master has not generated a STOP or Repeated..,1: Master has generated a STOP or Repeated START.." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "MIER,Master Interrupt Enable Register" bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Interrupt enabled.,1: Interrupt disabled." bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "MDER,Master DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "MCFGR0,Master Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the RMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request input is disabled.,1: Host request input is enabled." line.long 0x14 "MCFGR1,Master Configuration Register 1" bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: LPI2C configured for 2-pin open drain mode.,1: LPI2C configured for 2-pin output only mode..,?,?,?,?,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match disabled.,?,?,?,?,?,?,?" newline bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: Pin Low Timeout Flag will set if SCL is low for..,1: Pin Low Timeout Flag will set if either SCL or.." bitfld.long 0x14 9. "IGNACK,IGNACK" "0: LPI2C Master will receive ACK and NACK normally.,1: LPI2C Master will treat a received NACK as if it.." newline bitfld.long 0x14 8. "AUTOSTOP,Automatic STOP Generation" "0: No effect.,1: STOP condition is automatically generated.." bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" line.long 0x18 "MCFGR2,Master Configuration Register 2" hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout" line.long 0x1C "MCFGR3,Master Configuration Register 3" hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout" group.long 0x40++0x3 line.long 0x0 "MDMR,Master Data Match Register" hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value" hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value" group.long 0x48++0x3 line.long 0x0 "MCCR0,Master Clock Configuration Register 0" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x50++0x3 line.long 0x0 "MCCR1,Master Clock Configuration Register 1" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x58++0x3 line.long 0x0 "MFCR,Master FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "MFSR,Master FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" wgroup.long 0x60++0x3 line.long 0x0 "MTDR,Master Transmit Data Register" bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit DATA[7:0].,1: Receive (DATA[7:0] + 1) bytes.,?,?,?,?,?,?" hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x70++0x3 line.long 0x0 "MRDR,Master Receive Data Register" bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Receive FIFO is not empty.,1: Receive FIFO is empty." hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data" group.long 0x110++0xF line.long 0x0 "SCR,Slave Control Register" bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Filter remains enabled in Doze mode.,1: Filter is disabled in Doze mode." bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable digital filter and output delay counter..,1: Enable digital filter and output delay counter.." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Slave logic is not reset.,1: Slave logic is reset." bitfld.long 0x0 0. "SEN,Slave Enable" "0: Slave mode is disabled.,1: Slave mode is enabled." line.long 0x4 "SSR,Slave Status Register" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle.,1: I2C Bus is busy." rbitfld.long 0x4 24. "SBF,Slave Busy Flag" "0: I2C Slave is idle.,1: I2C Slave is busy." newline rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: SMBus Alert Response disabled or not detected.,1: SMBus Alert Response enabled and detected." rbitfld.long 0x4 14. "GCF,General Call Flag" "0: Slave has not detected the General Call Address..,1: Slave has detected the General Call Address." newline rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Have not received ADDR1 or ADDR0/ADDR1 range..,1: Have received ADDR1 or ADDR0/ADDR1 range.." rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: Have not received ADDR0 matching address.,1: Have received ADDR0 matching address." newline bitfld.long 0x4 11. "FEF,FIFO Error Flag" "0: FIFO underflow or overflow not detected.,1: FIFO underflow or overflow detected." bitfld.long 0x4 10. "BEF,Bit Error Flag" "0: Slave has not detected a bit error.,1: Slave has detected a bit error." newline bitfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Slave has not detected a STOP condition.,1: Slave has detected a STOP condition." bitfld.long 0x4 8. "RSF,Repeated Start Flag" "0: Slave has not detected a Repeated START condition.,1: Slave has detected a Repeated START condition." newline rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Transmit ACK/NACK is not required.,1: Transmit ACK/NACK is required." rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Address Status Register is not valid.,1: Address Status Register is valid." newline rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "SIER,Slave Interrupt Enable Register" bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 13. "AM1F,Address Match 1 Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Interrupt enabled.,1: Interrupt disabled." newline bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "SDER,Slave DMA Enable Register" bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." newline bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" group.long 0x124++0x7 line.long 0x0 "SCFGR1,Slave Configuration Register 1" bitfld.long 0x0 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit).,1: Address match 0 (10-bit).,?,?,?,?,?,?" bitfld.long 0x0 13. "HSMEN,High Speed Mode Enable" "0: Disables detection of Hs-mode master code.,1: Enables detection of Hs-mode master code." newline bitfld.long 0x0 12. "IGNACK,Ignore NACK" "0: Slave will end transfer when NACK detected.,1: Slave will not end transfer when NACK detected." bitfld.long 0x0 11. "RXCFG,Receive Data Configuration" "0: Reading the receive data register will return..,1: Reading the receive data register when the.." newline bitfld.long 0x0 10. "TXCFG,Transmit Flag Configuration" "0: Transmit Data Flag will only assert during a..,1: Transmit Data Flag will assert whenever the.." bitfld.long 0x0 9. "SAEN,SMBus Alert Enable" "0: Disables match on SMBus Alert.,1: Enables match on SMBus Alert." newline bitfld.long 0x0 8. "GCEN,General Call Enable" "0: General Call address is disabled.,1: General call address is enabled." bitfld.long 0x0 3. "ACKSTALL,ACK SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." newline bitfld.long 0x0 2. "TXDSTALL,TX Data SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." bitfld.long 0x0 1. "RXSTALL,RX SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." newline bitfld.long 0x0 0. "ADRSTALL,Address SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." line.long 0x4 "SCFGR2,Slave Configuration Register 2" hexmask.long.byte 0x4 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x4 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.byte 0x4 8.--13. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x4 0.--3. 1. "CLKHOLD,Clock Hold Time" group.long 0x140++0x3 line.long 0x0 "SAMR,Slave Address Match Register" hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value" hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value" rgroup.long 0x150++0x3 line.long 0x0 "SASR,Slave Address Status Register" bitfld.long 0x0 14. "ANV,Address Not Valid" "0: RADDR is valid.,1: RADDR is not valid." hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address" group.long 0x154++0x3 line.long 0x0 "STAR,Slave Transmit ACK Register" bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK for received word.,1: Transmit NACK for received word." wgroup.long 0x160++0x3 line.long 0x0 "STDR,Slave Transmit Data Register" hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x170++0x3 line.long 0x0 "SRDR,Slave Receive Data Register" bitfld.long 0x0 15. "SOF,Start Of Frame" "0: Indicates this is not the first data word since..,1: Indicates this is the first data word since a.." bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: The Receive Data Register is not empty.,1: The Receive Data Register is empty." newline hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data" tree.end tree "LPI2C1" base ad:0x40067000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Master Receive FIFO Size" hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Master Transmit FIFO Size" group.long 0x10++0x1F line.long 0x0 "MCR,Master Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Master is disabled in debug mode.,1: Master is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Master is enabled in Doze mode.,1: Master is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Master Enable" "0: Master logic is disabled.,1: Master logic is enabled." line.long 0x4 "MSR,Master Status Register" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle.,1: I2C Bus is busy." rbitfld.long 0x4 24. "MBF,Master Busy Flag" "0: I2C Master is idle.,1: I2C Master is busy." newline bitfld.long 0x4 14. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." bitfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout has not occurred or is disabled.,1: Pin low timeout has occurred." newline bitfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No error.,1: Master sending or receiving data without START.." bitfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Master has not lost arbitration.,1: Master has lost arbitration." newline bitfld.long 0x4 10. "NDF,NACK Detect Flag" "0: Unexpected NACK not detected.,1: Unexpected NACK was detected." bitfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Master has not generated a STOP condition.,1: Master has generated a STOP condition." newline bitfld.long 0x4 8. "EPF,End Packet Flag" "0: Master has not generated a STOP or Repeated..,1: Master has generated a STOP or Repeated START.." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "MIER,Master Interrupt Enable Register" bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Interrupt enabled.,1: Interrupt disabled." bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "MDER,Master DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "MCFGR0,Master Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the RMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request input is disabled.,1: Host request input is enabled." line.long 0x14 "MCFGR1,Master Configuration Register 1" bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: LPI2C configured for 2-pin open drain mode.,1: LPI2C configured for 2-pin output only mode..,?,?,?,?,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match disabled.,?,?,?,?,?,?,?" newline bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: Pin Low Timeout Flag will set if SCL is low for..,1: Pin Low Timeout Flag will set if either SCL or.." bitfld.long 0x14 9. "IGNACK,IGNACK" "0: LPI2C Master will receive ACK and NACK normally.,1: LPI2C Master will treat a received NACK as if it.." newline bitfld.long 0x14 8. "AUTOSTOP,Automatic STOP Generation" "0: No effect.,1: STOP condition is automatically generated.." bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" line.long 0x18 "MCFGR2,Master Configuration Register 2" hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout" line.long 0x1C "MCFGR3,Master Configuration Register 3" hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout" group.long 0x40++0x3 line.long 0x0 "MDMR,Master Data Match Register" hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value" hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value" group.long 0x48++0x3 line.long 0x0 "MCCR0,Master Clock Configuration Register 0" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x50++0x3 line.long 0x0 "MCCR1,Master Clock Configuration Register 1" hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay" newline hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period" hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period" group.long 0x58++0x3 line.long 0x0 "MFCR,Master FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "MFSR,Master FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" wgroup.long 0x60++0x3 line.long 0x0 "MTDR,Master Transmit Data Register" bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit DATA[7:0].,1: Receive (DATA[7:0] + 1) bytes.,?,?,?,?,?,?" hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x70++0x3 line.long 0x0 "MRDR,Master Receive Data Register" bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Receive FIFO is not empty.,1: Receive FIFO is empty." hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data" group.long 0x110++0xF line.long 0x0 "SCR,Slave Control Register" bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Filter remains enabled in Doze mode.,1: Filter is disabled in Doze mode." bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable digital filter and output delay counter..,1: Enable digital filter and output delay counter.." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Slave logic is not reset.,1: Slave logic is reset." bitfld.long 0x0 0. "SEN,Slave Enable" "0: Slave mode is disabled.,1: Slave mode is enabled." line.long 0x4 "SSR,Slave Status Register" rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle.,1: I2C Bus is busy." rbitfld.long 0x4 24. "SBF,Slave Busy Flag" "0: I2C Slave is idle.,1: I2C Slave is busy." newline rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: SMBus Alert Response disabled or not detected.,1: SMBus Alert Response enabled and detected." rbitfld.long 0x4 14. "GCF,General Call Flag" "0: Slave has not detected the General Call Address..,1: Slave has detected the General Call Address." newline rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Have not received ADDR1 or ADDR0/ADDR1 range..,1: Have received ADDR1 or ADDR0/ADDR1 range.." rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: Have not received ADDR0 matching address.,1: Have received ADDR0 matching address." newline bitfld.long 0x4 11. "FEF,FIFO Error Flag" "0: FIFO underflow or overflow not detected.,1: FIFO underflow or overflow detected." bitfld.long 0x4 10. "BEF,Bit Error Flag" "0: Slave has not detected a bit error.,1: Slave has detected a bit error." newline bitfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Slave has not detected a STOP condition.,1: Slave has detected a STOP condition." bitfld.long 0x4 8. "RSF,Repeated Start Flag" "0: Slave has not detected a Repeated START condition.,1: Slave has detected a Repeated START condition." newline rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Transmit ACK/NACK is not required.,1: Transmit ACK/NACK is required." rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Address Status Register is not valid.,1: Address Status Register is valid." newline rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "SIER,Slave Interrupt Enable Register" bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 13. "AM1F,Address Match 1 Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Interrupt enabled.,1: Interrupt disabled." newline bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "SDER,Slave DMA Enable Register" bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." newline bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" group.long 0x124++0x7 line.long 0x0 "SCFGR1,Slave Configuration Register 1" bitfld.long 0x0 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit).,1: Address match 0 (10-bit).,?,?,?,?,?,?" bitfld.long 0x0 13. "HSMEN,High Speed Mode Enable" "0: Disables detection of Hs-mode master code.,1: Enables detection of Hs-mode master code." newline bitfld.long 0x0 12. "IGNACK,Ignore NACK" "0: Slave will end transfer when NACK detected.,1: Slave will not end transfer when NACK detected." bitfld.long 0x0 11. "RXCFG,Receive Data Configuration" "0: Reading the receive data register will return..,1: Reading the receive data register when the.." newline bitfld.long 0x0 10. "TXCFG,Transmit Flag Configuration" "0: Transmit Data Flag will only assert during a..,1: Transmit Data Flag will assert whenever the.." bitfld.long 0x0 9. "SAEN,SMBus Alert Enable" "0: Disables match on SMBus Alert.,1: Enables match on SMBus Alert." newline bitfld.long 0x0 8. "GCEN,General Call Enable" "0: General Call address is disabled.,1: General call address is enabled." bitfld.long 0x0 3. "ACKSTALL,ACK SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." newline bitfld.long 0x0 2. "TXDSTALL,TX Data SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." bitfld.long 0x0 1. "RXSTALL,RX SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." newline bitfld.long 0x0 0. "ADRSTALL,Address SCL Stall" "0: Clock stretching disabled.,1: Clock stretching enabled." line.long 0x4 "SCFGR2,Slave Configuration Register 2" hexmask.long.byte 0x4 24.--27. 1. "FILTSDA,Glitch Filter SDA" hexmask.long.byte 0x4 16.--19. 1. "FILTSCL,Glitch Filter SCL" newline hexmask.long.byte 0x4 8.--13. 1. "DATAVD,Data Valid Delay" hexmask.long.byte 0x4 0.--3. 1. "CLKHOLD,Clock Hold Time" group.long 0x140++0x3 line.long 0x0 "SAMR,Slave Address Match Register" hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value" hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value" rgroup.long 0x150++0x3 line.long 0x0 "SASR,Slave Address Status Register" bitfld.long 0x0 14. "ANV,Address Not Valid" "0: RADDR is valid.,1: RADDR is not valid." hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address" group.long 0x154++0x3 line.long 0x0 "STAR,Slave Transmit ACK Register" bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Transmit ACK for received word.,1: Transmit NACK for received word." wgroup.long 0x160++0x3 line.long 0x0 "STDR,Slave Transmit Data Register" hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data" rgroup.long 0x170++0x3 line.long 0x0 "SRDR,Slave Receive Data Register" bitfld.long 0x0 15. "SOF,Start Of Frame" "0: Indicates this is not the first data word since..,1: Indicates this is the first data word since a.." bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: The Receive Data Register is not empty.,1: The Receive Data Register is empty." newline hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data" tree.end endif tree.end tree "LPIT (Low Power Periodic Interrupt Timer)" base ad:0x40037000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "EXT_TRIG,Number of External Trigger Inputs" hexmask.long.byte 0x4 0.--7. 1. "CHANNEL,Number of Timer Channels" group.long 0x8++0xF line.long 0x0 "MCR,Module Control Register" bitfld.long 0x0 3. "DBG_EN,Debug Enable Bit" "0: Timer channels are stopped in Debug mode,1: Timer channels continue to run in Debug mode" bitfld.long 0x0 2. "DOZE_EN,DOZE Mode Enable Bit" "0: Timer channels are stopped in DOZE mode,1: Timer channels continue to run in DOZE mode" newline bitfld.long 0x0 1. "SW_RST,Software Reset Bit" "0: Timer channels and registers are not reset,1: Timer channels and registers are reset" bitfld.long 0x0 0. "M_CEN,Module Clock Enable" "0: Peripheral clock to timers is disabled,1: Peripheral clock to timers is enabled" line.long 0x4 "MSR,Module Status Register" bitfld.long 0x4 3. "TIF3,Channel 3 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred" bitfld.long 0x4 2. "TIF2,Channel 2 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred" newline bitfld.long 0x4 1. "TIF1,Channel 1 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred" bitfld.long 0x4 0. "TIF0,Channel 0 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred" line.long 0x8 "MIER,Module Interrupt Enable Register" bitfld.long 0x8 3. "TIE3,Channel 3 Timer Interrupt Enable" "0: Interrupt generation is disabled,1: Interrupt generation is enabled" bitfld.long 0x8 2. "TIE2,Channel 2 Timer Interrupt Enable" "0: Interrupt generation is disabled,1: Interrupt generation is enabled" newline bitfld.long 0x8 1. "TIE1,Channel 1 Timer Interrupt Enable" "0: Interrupt generation is disabled,1: Interrupt generation is enabled" bitfld.long 0x8 0. "TIE0,Channel 0 Timer Interrupt Enable" "0: Interrupt generation is disabled,1: Interrupt generation is enabled" line.long 0xC "SETTEN,Set Timer Enable Register" bitfld.long 0xC 3. "SET_T_EN_3,Set Timer 3 Enable" "0: No effect,1: Enables the Timer Channel 3" bitfld.long 0xC 2. "SET_T_EN_2,Set Timer 2 Enable" "0: No Effect,1: Enables the Timer Channel 2" newline bitfld.long 0xC 1. "SET_T_EN_1,Set Timer 1 Enable" "0: No Effect,1: Enables the Timer Channel 1" bitfld.long 0xC 0. "SET_T_EN_0,Set Timer 0 Enable" "0: No effect,1: Enables the Timer Channel 0" wgroup.long 0x18++0x3 line.long 0x0 "CLRTEN,Clear Timer Enable Register" bitfld.long 0x0 3. "CLR_T_EN_3,Clear Timer 3 Enable" "0: No Action,1: Clear T_EN bit for Timer Channel 3" bitfld.long 0x0 2. "CLR_T_EN_2,Clear Timer 2 Enable" "0: No Action,1: Clear T_EN bit for Timer Channel 2" newline bitfld.long 0x0 1. "CLR_T_EN_1,Clear Timer 1 Enable" "0: No Action,1: Clear T_EN bit for Timer Channel 1" bitfld.long 0x0 0. "CLR_T_EN_0,Clear Timer 0 Enable" "0: No action,1: Clear T_EN bit for Timer Channel 0" group.long 0x20++0x3 line.long 0x0 "TVAL0,Timer Value Register" hexmask.long 0x0 0.--31. 1. "TMR_VAL,Timer Value" rgroup.long 0x24++0x3 line.long 0x0 "CVAL0,Current Timer Value" hexmask.long 0x0 0.--31. 1. "TMR_CUR_VAL,Current Timer Value" group.long 0x28++0x3 line.long 0x0 "TCTRL0,Timer Control Register" hexmask.long.byte 0x0 24.--27. 1. "TRG_SEL,Trigger Select" bitfld.long 0x0 23. "TRG_SRC,Trigger Source" "0: Trigger source selected in external,1: Trigger source selected is the internal trigger" newline bitfld.long 0x0 18. "TROT,Timer Reload On Trigger" "0: Timer will not reload on selected trigger,1: Timer will reload on selected trigger" bitfld.long 0x0 17. "TSOI,Timer Stop On Interrupt" "0: The channel timer does not stop after timeout.,1: The channel timer will stop after a timeout and.." newline bitfld.long 0x0 16. "TSOT,Timer Start On Trigger" "0: Timer starts to decrement immediately based on..,1: Timer starts to decrement when rising edge on.." bitfld.long 0x0 2.--3. "MODE,Timer Operation Mode" "0: 32-bit Periodic Counter,1: Dual 16-bit Periodic Counter,?,?" newline bitfld.long 0x0 1. "CHAIN,Chain Channel" "0: Channel Chaining is disabled. Channel Timer runs..,1: Channel Chaining is enabled. Timer decrements on.." bitfld.long 0x0 0. "T_EN,Timer Enable" "0: Timer Channel is disabled,1: Timer Channel is enabled" group.long 0x30++0x3 line.long 0x0 "TVAL1,Timer Value Register" hexmask.long 0x0 0.--31. 1. "TMR_VAL,Timer Value" rgroup.long 0x34++0x3 line.long 0x0 "CVAL1,Current Timer Value" hexmask.long 0x0 0.--31. 1. "TMR_CUR_VAL,Current Timer Value" group.long 0x38++0x3 line.long 0x0 "TCTRL1,Timer Control Register" hexmask.long.byte 0x0 24.--27. 1. "TRG_SEL,Trigger Select" bitfld.long 0x0 23. "TRG_SRC,Trigger Source" "0: Trigger source selected in external,1: Trigger source selected is the internal trigger" newline bitfld.long 0x0 18. "TROT,Timer Reload On Trigger" "0: Timer will not reload on selected trigger,1: Timer will reload on selected trigger" bitfld.long 0x0 17. "TSOI,Timer Stop On Interrupt" "0: The channel timer does not stop after timeout.,1: The channel timer will stop after a timeout and.." newline bitfld.long 0x0 16. "TSOT,Timer Start On Trigger" "0: Timer starts to decrement immediately based on..,1: Timer starts to decrement when rising edge on.." bitfld.long 0x0 2.--3. "MODE,Timer Operation Mode" "0: 32-bit Periodic Counter,1: Dual 16-bit Periodic Counter,?,?" newline bitfld.long 0x0 1. "CHAIN,Chain Channel" "0: Channel Chaining is disabled. Channel Timer runs..,1: Channel Chaining is enabled. Timer decrements on.." bitfld.long 0x0 0. "T_EN,Timer Enable" "0: Timer Channel is disabled,1: Timer Channel is enabled" group.long 0x40++0x3 line.long 0x0 "TVAL2,Timer Value Register" hexmask.long 0x0 0.--31. 1. "TMR_VAL,Timer Value" rgroup.long 0x44++0x3 line.long 0x0 "CVAL2,Current Timer Value" hexmask.long 0x0 0.--31. 1. "TMR_CUR_VAL,Current Timer Value" group.long 0x48++0x3 line.long 0x0 "TCTRL2,Timer Control Register" hexmask.long.byte 0x0 24.--27. 1. "TRG_SEL,Trigger Select" bitfld.long 0x0 23. "TRG_SRC,Trigger Source" "0: Trigger source selected in external,1: Trigger source selected is the internal trigger" newline bitfld.long 0x0 18. "TROT,Timer Reload On Trigger" "0: Timer will not reload on selected trigger,1: Timer will reload on selected trigger" bitfld.long 0x0 17. "TSOI,Timer Stop On Interrupt" "0: The channel timer does not stop after timeout.,1: The channel timer will stop after a timeout and.." newline bitfld.long 0x0 16. "TSOT,Timer Start On Trigger" "0: Timer starts to decrement immediately based on..,1: Timer starts to decrement when rising edge on.." bitfld.long 0x0 2.--3. "MODE,Timer Operation Mode" "0: 32-bit Periodic Counter,1: Dual 16-bit Periodic Counter,?,?" newline bitfld.long 0x0 1. "CHAIN,Chain Channel" "0: Channel Chaining is disabled. Channel Timer runs..,1: Channel Chaining is enabled. Timer decrements on.." bitfld.long 0x0 0. "T_EN,Timer Enable" "0: Timer Channel is disabled,1: Timer Channel is enabled" group.long 0x50++0x3 line.long 0x0 "TVAL3,Timer Value Register" hexmask.long 0x0 0.--31. 1. "TMR_VAL,Timer Value" rgroup.long 0x54++0x3 line.long 0x0 "CVAL3,Current Timer Value" hexmask.long 0x0 0.--31. 1. "TMR_CUR_VAL,Current Timer Value" group.long 0x58++0x3 line.long 0x0 "TCTRL3,Timer Control Register" hexmask.long.byte 0x0 24.--27. 1. "TRG_SEL,Trigger Select" bitfld.long 0x0 23. "TRG_SRC,Trigger Source" "0: Trigger source selected in external,1: Trigger source selected is the internal trigger" newline bitfld.long 0x0 18. "TROT,Timer Reload On Trigger" "0: Timer will not reload on selected trigger,1: Timer will reload on selected trigger" bitfld.long 0x0 17. "TSOI,Timer Stop On Interrupt" "0: The channel timer does not stop after timeout.,1: The channel timer will stop after a timeout and.." newline bitfld.long 0x0 16. "TSOT,Timer Start On Trigger" "0: Timer starts to decrement immediately based on..,1: Timer starts to decrement when rising edge on.." bitfld.long 0x0 2.--3. "MODE,Timer Operation Mode" "0: 32-bit Periodic Counter,1: Dual 16-bit Periodic Counter,?,?" newline bitfld.long 0x0 1. "CHAIN,Chain Channel" "0: Channel Chaining is disabled. Channel Timer runs..,1: Channel Chaining is enabled. Timer decrements on.." bitfld.long 0x0 0. "T_EN,Timer Enable" "0: Timer Channel is disabled,1: Timer Channel is enabled" tree.end sif (cpuis("S32K116*")) base ad:0x4002C000 elif (cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")||cpuis("S32K148*")) base ad:0x0 endif tree "LPSPI (Low Power Serial Peripheral Interface)" sif (cpuis("S32K116*")) rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" endif sif (cpuis("S32K118*")) tree "LPSPI0" base ad:0x4002C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end tree "LPSPI1" base ad:0x4002D000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end endif sif (cpuis("S32K142*")) tree "LPSPI0" base ad:0x4002C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end tree "LPSPI1" base ad:0x4002D000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end endif sif (cpuis("S32K144*")) tree "LPSPI0" base ad:0x4002C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end tree "LPSPI1" base ad:0x4002D000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end tree "LPSPI2" base ad:0x4002E000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end endif sif (cpuis("S32K146*")) tree "LPSPI0" base ad:0x4002C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end tree "LPSPI1" base ad:0x4002D000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end tree "LPSPI2" base ad:0x4002E000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end endif sif (cpuis("S32K148*")) tree "LPSPI0" base ad:0x4002C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end tree "LPSPI1" base ad:0x4002D000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end tree "LPSPI2" base ad:0x4002E000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x10++0x17 line.long 0x0 "CR,Control Register" bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect.,1: Receive FIFO is reset." bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect.,1: Transmit FIFO is reset." newline bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Module is disabled in debug mode.,1: Module is enabled in debug mode." bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Module is enabled in Doze mode.,1: Module is disabled in Doze mode." newline bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset.,1: Master logic is reset." bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled.,1: Module is enabled." line.long 0x4 "SR,Status Register" rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle.,1: LPSPI is busy." bitfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data.,1: Have received matching data." newline bitfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed.,1: Receive FIFO has overflowed." bitfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred.,1: Transmit FIFO underrun has occurred" newline bitfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed.,1: All transfers have completed." bitfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed.,1: Frame transfer has completed." newline bitfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer word not completed.,1: Transfer word completed." rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready.,1: Receive data is ready." newline rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested.,1: Transmit data is requested." line.long 0x8 "IER,Interrupt Enable Register" bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Interrupt disabled.,1: Interrupt enabled" line.long 0xC "DER,DMA Enable Register" bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request disabled.,1: DMA request enabled" line.long 0x10 "CFGR0,Configuration Register 0" bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the DMF is set." bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled.,1: Circular FIFO is enabled." newline bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin LPSPI_HREQ.,1: Host request input is input trigger." bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low.,1: Active high." newline bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled.,1: Host request is enabled." line.long 0x14 "CFGR1,Configuration Register 1" bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are enabled.,1: PCS[3:2] are disabled." bitfld.long 0x14 26. "OUTCFG,Output Config" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.." newline bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT for output..,1: SIN is used for both input and output data.,?,?" bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled.,?,?,?,?,?,?,?" newline hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity" bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when transmit FIFO is empty..,1: Transfers will not stall allowing transmit FIFO.." newline bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation disabled.,1: Automatic PCS generation enabled." bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data sampled on SCK edge.,1: Input data sampled on delayed SCK edge." newline bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode.,1: Master mode." group.long 0x30++0x7 line.long 0x0 "DMR0,Data Match Register 0" hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value" line.long 0x4 "DMR1,Data Match Register 1" hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value" group.long 0x40++0x3 line.long 0x0 "CCR,Clock Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK to PCS Delay" hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS to SCK Delay" newline hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers" hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider" group.long 0x58++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3" bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3" rgroup.long 0x5C++0x3 line.long 0x0 "FSR,FIFO Status Register" bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7" group.long 0x60++0x3 line.long 0x0 "TCR,Transmit Command Register" bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high." bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.." newline bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],?,?" newline bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first." bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap disabled.,1: Byte swap enabled." newline bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer disabled.,1: Continuous transfer enabled." bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer.,1: Command word for continuing transfer." newline bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer.,1: Receive data is masked." bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer.,1: Mask transmit data." newline bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: Single bit transfer.,1: Two bit transfer.,?,?" hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size" wgroup.long 0x64++0x3 line.long 0x0 "TDR,Transmit Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data" rgroup.long 0x70++0x7 line.long 0x0 "RSR,Receive Status Register" bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty.,1: RX FIFO is empty." bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS.." line.long 0x4 "RDR,Receive Data Register" hexmask.long 0x4 0.--31. 1. "DATA,Receive Data" tree.end endif tree.end tree "LPTMR (Low-Power Timer)" base ad:0x40040000 group.long 0x0++0xF line.long 0x0 "CSR,Low Power Timer Control Status Register" bitfld.long 0x0 8. "TDRE,Timer DMA Request Enable" "0: Timer DMA Request disabled.,1: Timer DMA Request enabled." bitfld.long 0x0 7. "TCF,Timer Compare Flag" "0: The value of CNR is not equal to CMR and..,1: The value of CNR is equal to CMR and increments." newline bitfld.long 0x0 6. "TIE,Timer Interrupt Enable" "0: Timer interrupt disabled.,1: Timer interrupt enabled." bitfld.long 0x0 4.--5. "TPS,Timer Pin Select" "0: Pulse counter input 0 is selected.,1: Pulse counter input 1 is selected.,?,?" newline bitfld.long 0x0 3. "TPP,Timer Pin Polarity" "0: Pulse Counter input source is active-high and..,1: Pulse Counter input source is active-low and the.." bitfld.long 0x0 2. "TFC,Timer Free-Running Counter" "0: CNR is reset whenever TCF is set.,1: CNR is reset on overflow." newline bitfld.long 0x0 1. "TMS,Timer Mode Select" "0: Time Counter mode.,1: Pulse Counter mode." bitfld.long 0x0 0. "TEN,Timer Enable" "0: LPTMR is disabled and internal logic is reset.,1: LPTMR is enabled." line.long 0x4 "PSR,Low Power Timer Prescale Register" hexmask.long.byte 0x4 3.--6. 1. "PRESCALE,Prescale Value" bitfld.long 0x4 2. "PBYP,Prescaler Bypass" "0: Prescaler/glitch filter is enabled.,1: Prescaler/glitch filter is bypassed." newline bitfld.long 0x4 0.--1. "PCS,Prescaler Clock Select" "0: Prescaler/glitch filter clock 0 selected.,1: Prescaler/glitch filter clock 1 selected.,?,?" line.long 0x8 "CMR,Low Power Timer Compare Register" hexmask.long.word 0x8 0.--15. 1. "COMPARE,Compare Value" line.long 0xC "CNR,Low Power Timer Counter Register" hexmask.long.word 0xC 0.--15. 1. "COUNTER,Counter Value" tree.end tree "LPUART (Low Power Universal Asynchronous Receiver/Transmitter)" base ad:0x0 tree "LPUART0" base ad:0x4006A000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,LPUART Global Register" bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset.,1: Module is reset." line.long 0x4 "PINCFG,LPUART Pin Configuration Register" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger is disabled.,1: Input trigger is used instead of RXD pin input.,?,?" line.long 0x8 "BAUD,LPUART Baud Rate Register" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Normal operation.,1: Enables automatic address matching or data.." bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Normal operation.,1: Enables automatic address matching or data.." newline bitfld.long 0x8 29. "M10,10-bit Mode select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: DMA request disabled.,1: DMA request enabled." newline bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address Match Wakeup,1: Idle Match Wakeup,?,?" newline bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Resynchronization during received data word is..,1: Resynchronization during received data word is.." newline bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[LBKDIF]..,1: Hardware interrupt requested when.." bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[RXEDGIF]..,1: Hardware interrupt requested when.." newline bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit.,1: Two stop bits." hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor." line.long 0xC "STAT,LPUART Status Register" bitfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: No LIN break character has been detected.,1: LIN break character has been detected." bitfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: No active edge on the receive pin has occurred.,1: An active edge on the receive pin has occurred." newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB (bit0) is the first bit that is transmitted..,1: MSB (bit9 bit8 bit7 or bit6) is the first bit.." bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Receive data not inverted.,1: Receive data inverted." newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: During receive standby state (RWU = 1) the IDLE..,1: During receive standby state (RWU = 1) the IDLE.." bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: Break character is transmitted with length of 9..,1: Break character is transmitted with length of 12.." newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: LIN break detect is disabled normal break..,1: LIN break detect is enabled. LIN break character.." rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: LPUART receiver idle waiting for a start bit.,1: LPUART receiver active (RXD input not idle)." newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Transmit data buffer full.,1: Transmit data buffer empty." rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)." newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Receive data buffer empty.,1: Receive data buffer full." bitfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected.,1: Idle line was detected." newline bitfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun.,1: Receive overrun (new LPUART data lost)." bitfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected.,1: Noise detected in the received character in.." newline bitfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected. This does not..,1: Framing error." bitfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error.,1: Parity error." newline bitfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Received data is not equal to MA1,1: Received data is equal to MA1" bitfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Received data is not equal to MA2,1: Received data is equal to MA2" line.long 0x10 "CTRL,LPUART Control Register" bitfld.long 0x10 31. "R8T9,Receive Bit 8 / Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 / Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in single-wire mode.,1: TXD pin is an output in single-wire mode." bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Transmit data not inverted.,1: Transmit data inverted." newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: OR interrupts disabled; use polling.,1: Hardware interrupt requested when OR is set." bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: NF interrupts disabled; use polling.,1: Hardware interrupt requested when NF is set." newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: FE interrupts disabled; use polling.,1: Hardware interrupt requested when FE is set." bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: PF interrupts disabled; use polling).,1: Hardware interrupt requested when PF is set." newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Hardware interrupts from TDRE disabled; use..,1: Hardware interrupt requested when TDRE flag is 1." bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable for" "0: Hardware interrupts from TC disabled; use polling.,1: Hardware interrupt requested when TC flag is 1." newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Hardware interrupts from RDRF disabled; use..,1: Hardware interrupt requested when RDRF flag is 1." bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Hardware interrupts from IDLE disabled; use..,1: Hardware interrupt requested when IDLE flag is 1." newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Transmitter disabled.,1: Transmitter enabled." bitfld.long 0x10 18. "RE,Receiver Enable" "0: Receiver disabled.,1: Receiver enabled." newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation.,1: LPUART receiver in standby waiting for wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation.,1: Queue break character(s) to be sent." newline bitfld.long 0x10 15. "MA1IE,Match 1 Interrupt Enable" "0: MA1F interrupt disabled,1: MA1F interrupt enabled" bitfld.long 0x10 14. "MA2IE,Match 2 Interrupt Enable" "0: MA2F interrupt disabled,1: MA2F interrupt enabled" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: Receiver and transmitter use 8-bit to 10-bit..,1: Receiver and transmitter use 7-bit data.." bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1 idle character,1: 2 idle characters,?,?,?,?,?,?" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation - RXD and TXD use separate pins.,1: Loop mode or single-wire mode where transmitter.." bitfld.long 0x10 6. "DOZEEN,Doze Enable" "0: LPUART is enabled in Doze mode.,1: LPUART is disabled in Doze mode." newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Provided LOOPS is set RSRC is cleared selects..,1: Single-wire LPUART mode where the TXD pin is.." bitfld.long 0x10 4. "M,9-Bit or 8-Bit Mode Select" "0: Receiver and transmitter use 8-bit data..,1: Receiver and transmitter use 9-bit data.." newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures RWU for idle-line wakeup.,1: Configures RWU with address-mark wakeup." bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: Idle character bit count starts after start bit.,1: Idle character bit count starts after stop bit." newline bitfld.long 0x10 1. "PE,Parity Enable" "0: No hardware parity generation or checking.,1: Parity enabled." bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity.,1: Odd parity." line.long 0x14 "DATA,LPUART Data Register" rbitfld.long 0x14 15. "NOISY,NOISY" "0: The dataword was received without noise.,1: The data was received with noise." rbitfld.long 0x14 14. "PARITYE,PARITYE" "0: The dataword was received without a parity error.,1: The dataword was received with a parity error." newline bitfld.long 0x14 13. "FRETSC,Frame Error / Transmit Special Character" "0: The dataword was received without a frame error..,1: The dataword was received with a frame error or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Receive buffer contains valid data.,1: Receive buffer is empty data returned on read is.." newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Receiver was not idle before receiving this..,1: Receiver was idle before receiving this character." bitfld.long 0x14 9. "R9T9,R9T9" "0,1" newline bitfld.long 0x14 8. "R8T8,R8T8" "0,1" bitfld.long 0x14 7. "R7T7,R7T7" "0,1" newline bitfld.long 0x14 6. "R6T6,R6T6" "0,1" bitfld.long 0x14 5. "R5T5,R5T5" "0,1" newline bitfld.long 0x14 4. "R4T4,R4T4" "0,1" bitfld.long 0x14 3. "R3T3,R3T3" "0,1" newline bitfld.long 0x14 2. "R2T2,R2T2" "0,1" bitfld.long 0x14 1. "R1T1,R1T1" "0,1" newline bitfld.long 0x14 0. "R0T0,R0T0" "0,1" line.long 0x18 "MATCH,LPUART Match Address Register" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,LPUART Modem IrDA Register" bitfld.long 0x1C 18. "IREN,Infrared enable" "0: IR disabled.,1: IR enabled." bitfld.long 0x1C 16.--17. "TNP,Transmitter narrow pulse" "0: 1/OSR.,1: 2/OSR.,?,?" newline bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: CTS input is the CTS_B pin.,1: CTS input is the inverted Receiver Match result." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: CTS input is sampled at the start of each..,1: CTS input is sampled when the transmitter is idle." bitfld.long 0x1C 3. "RXRTSE,Receiver request-to-send enable" "0: The receiver has no effect on RTS.,?" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter request-to-send polarity" "0: Transmitter RTS is active low.,1: Transmitter RTS is active high." bitfld.long 0x1C 1. "TXRTSE,Transmitter request-to-send enable" "0: The transmitter has no effect on RTS.,1: When a character is placed into an empty.." newline bitfld.long 0x1C 0. "TXCTSE,Transmitter clear-to-send enable" "0: CTS has no effect on the transmitter.,1: Enables clear-to-send operation. The transmitter.." line.long 0x20 "FIFO,LPUART FIFO Register" rbitfld.long 0x20 23. "TXEMPT,Transmit Buffer/FIFO Empty" "0: Transmit buffer is not empty.,1: Transmit buffer is empty." rbitfld.long 0x20 22. "RXEMPT,Receive Buffer/FIFO Empty" "0: Receive buffer is not empty.,1: Receive buffer is empty." newline bitfld.long 0x20 17. "TXOF,Transmitter Buffer Overflow Flag" "0: No transmit buffer overflow has occurred since..,1: At least one transmit buffer overflow has.." bitfld.long 0x20 16. "RXUF,Receiver Buffer Underflow Flag" "0: No receive buffer underflow has occurred since..,1: At least one receive buffer underflow has.." newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the transmit FIFO/Buffer is cleared.." bitfld.long 0x20 14. "RXFLUSH,Receive FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the receive FIFO/buffer is cleared.." newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable RDRF assertion due to partially filled..,1: Enable RDRF assertion due to partially filled..,?,?,?,?,?,?" bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: TXOF flag does not generate an interrupt to the..,1: TXOF flag generates an interrupt to the host." newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: RXUF flag does not generate an interrupt to the..,1: RXUF flag generates an interrupt to the host." bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Transmit FIFO is not enabled. Buffer is depth 1.,1: Transmit FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO. Buffer Depth" "0: Transmit FIFO/Buffer depth = 1 dataword.,1: Transmit FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Receive FIFO is not enabled. Buffer is depth 1.,1: Receive FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO. Buffer Depth" "0: Receive FIFO/Buffer depth = 1 dataword.,1: Receive FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" line.long 0x24 "WATER,LPUART Watermark Register" rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3" newline rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3" tree.end tree "LPUART1" base ad:0x4006B000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,LPUART Global Register" bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset.,1: Module is reset." line.long 0x4 "PINCFG,LPUART Pin Configuration Register" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger is disabled.,1: Input trigger is used instead of RXD pin input.,?,?" line.long 0x8 "BAUD,LPUART Baud Rate Register" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Normal operation.,1: Enables automatic address matching or data.." bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Normal operation.,1: Enables automatic address matching or data.." newline bitfld.long 0x8 29. "M10,10-bit Mode select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: DMA request disabled.,1: DMA request enabled." newline bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address Match Wakeup,1: Idle Match Wakeup,?,?" newline bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Resynchronization during received data word is..,1: Resynchronization during received data word is.." newline bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[LBKDIF]..,1: Hardware interrupt requested when.." bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[RXEDGIF]..,1: Hardware interrupt requested when.." newline bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit.,1: Two stop bits." hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor." line.long 0xC "STAT,LPUART Status Register" bitfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: No LIN break character has been detected.,1: LIN break character has been detected." bitfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: No active edge on the receive pin has occurred.,1: An active edge on the receive pin has occurred." newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB (bit0) is the first bit that is transmitted..,1: MSB (bit9 bit8 bit7 or bit6) is the first bit.." bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Receive data not inverted.,1: Receive data inverted." newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: During receive standby state (RWU = 1) the IDLE..,1: During receive standby state (RWU = 1) the IDLE.." bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: Break character is transmitted with length of 9..,1: Break character is transmitted with length of 12.." newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: LIN break detect is disabled normal break..,1: LIN break detect is enabled. LIN break character.." rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: LPUART receiver idle waiting for a start bit.,1: LPUART receiver active (RXD input not idle)." newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Transmit data buffer full.,1: Transmit data buffer empty." rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)." newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Receive data buffer empty.,1: Receive data buffer full." bitfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected.,1: Idle line was detected." newline bitfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun.,1: Receive overrun (new LPUART data lost)." bitfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected.,1: Noise detected in the received character in.." newline bitfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected. This does not..,1: Framing error." bitfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error.,1: Parity error." newline bitfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Received data is not equal to MA1,1: Received data is equal to MA1" bitfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Received data is not equal to MA2,1: Received data is equal to MA2" line.long 0x10 "CTRL,LPUART Control Register" bitfld.long 0x10 31. "R8T9,Receive Bit 8 / Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 / Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in single-wire mode.,1: TXD pin is an output in single-wire mode." bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Transmit data not inverted.,1: Transmit data inverted." newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: OR interrupts disabled; use polling.,1: Hardware interrupt requested when OR is set." bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: NF interrupts disabled; use polling.,1: Hardware interrupt requested when NF is set." newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: FE interrupts disabled; use polling.,1: Hardware interrupt requested when FE is set." bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: PF interrupts disabled; use polling).,1: Hardware interrupt requested when PF is set." newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Hardware interrupts from TDRE disabled; use..,1: Hardware interrupt requested when TDRE flag is 1." bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable for" "0: Hardware interrupts from TC disabled; use polling.,1: Hardware interrupt requested when TC flag is 1." newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Hardware interrupts from RDRF disabled; use..,1: Hardware interrupt requested when RDRF flag is 1." bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Hardware interrupts from IDLE disabled; use..,1: Hardware interrupt requested when IDLE flag is 1." newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Transmitter disabled.,1: Transmitter enabled." bitfld.long 0x10 18. "RE,Receiver Enable" "0: Receiver disabled.,1: Receiver enabled." newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation.,1: LPUART receiver in standby waiting for wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation.,1: Queue break character(s) to be sent." newline bitfld.long 0x10 15. "MA1IE,Match 1 Interrupt Enable" "0: MA1F interrupt disabled,1: MA1F interrupt enabled" bitfld.long 0x10 14. "MA2IE,Match 2 Interrupt Enable" "0: MA2F interrupt disabled,1: MA2F interrupt enabled" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: Receiver and transmitter use 8-bit to 10-bit..,1: Receiver and transmitter use 7-bit data.." bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1 idle character,1: 2 idle characters,?,?,?,?,?,?" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation - RXD and TXD use separate pins.,1: Loop mode or single-wire mode where transmitter.." bitfld.long 0x10 6. "DOZEEN,Doze Enable" "0: LPUART is enabled in Doze mode.,1: LPUART is disabled in Doze mode." newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Provided LOOPS is set RSRC is cleared selects..,1: Single-wire LPUART mode where the TXD pin is.." bitfld.long 0x10 4. "M,9-Bit or 8-Bit Mode Select" "0: Receiver and transmitter use 8-bit data..,1: Receiver and transmitter use 9-bit data.." newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures RWU for idle-line wakeup.,1: Configures RWU with address-mark wakeup." bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: Idle character bit count starts after start bit.,1: Idle character bit count starts after stop bit." newline bitfld.long 0x10 1. "PE,Parity Enable" "0: No hardware parity generation or checking.,1: Parity enabled." bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity.,1: Odd parity." line.long 0x14 "DATA,LPUART Data Register" rbitfld.long 0x14 15. "NOISY,NOISY" "0: The dataword was received without noise.,1: The data was received with noise." rbitfld.long 0x14 14. "PARITYE,PARITYE" "0: The dataword was received without a parity error.,1: The dataword was received with a parity error." newline bitfld.long 0x14 13. "FRETSC,Frame Error / Transmit Special Character" "0: The dataword was received without a frame error..,1: The dataword was received with a frame error or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Receive buffer contains valid data.,1: Receive buffer is empty data returned on read is.." newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Receiver was not idle before receiving this..,1: Receiver was idle before receiving this character." bitfld.long 0x14 9. "R9T9,R9T9" "0,1" newline bitfld.long 0x14 8. "R8T8,R8T8" "0,1" bitfld.long 0x14 7. "R7T7,R7T7" "0,1" newline bitfld.long 0x14 6. "R6T6,R6T6" "0,1" bitfld.long 0x14 5. "R5T5,R5T5" "0,1" newline bitfld.long 0x14 4. "R4T4,R4T4" "0,1" bitfld.long 0x14 3. "R3T3,R3T3" "0,1" newline bitfld.long 0x14 2. "R2T2,R2T2" "0,1" bitfld.long 0x14 1. "R1T1,R1T1" "0,1" newline bitfld.long 0x14 0. "R0T0,R0T0" "0,1" line.long 0x18 "MATCH,LPUART Match Address Register" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,LPUART Modem IrDA Register" bitfld.long 0x1C 18. "IREN,Infrared enable" "0: IR disabled.,1: IR enabled." bitfld.long 0x1C 16.--17. "TNP,Transmitter narrow pulse" "0: 1/OSR.,1: 2/OSR.,?,?" newline bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: CTS input is the CTS_B pin.,1: CTS input is the inverted Receiver Match result." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: CTS input is sampled at the start of each..,1: CTS input is sampled when the transmitter is idle." bitfld.long 0x1C 3. "RXRTSE,Receiver request-to-send enable" "0: The receiver has no effect on RTS.,?" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter request-to-send polarity" "0: Transmitter RTS is active low.,1: Transmitter RTS is active high." bitfld.long 0x1C 1. "TXRTSE,Transmitter request-to-send enable" "0: The transmitter has no effect on RTS.,1: When a character is placed into an empty.." newline bitfld.long 0x1C 0. "TXCTSE,Transmitter clear-to-send enable" "0: CTS has no effect on the transmitter.,1: Enables clear-to-send operation. The transmitter.." line.long 0x20 "FIFO,LPUART FIFO Register" rbitfld.long 0x20 23. "TXEMPT,Transmit Buffer/FIFO Empty" "0: Transmit buffer is not empty.,1: Transmit buffer is empty." rbitfld.long 0x20 22. "RXEMPT,Receive Buffer/FIFO Empty" "0: Receive buffer is not empty.,1: Receive buffer is empty." newline bitfld.long 0x20 17. "TXOF,Transmitter Buffer Overflow Flag" "0: No transmit buffer overflow has occurred since..,1: At least one transmit buffer overflow has.." bitfld.long 0x20 16. "RXUF,Receiver Buffer Underflow Flag" "0: No receive buffer underflow has occurred since..,1: At least one receive buffer underflow has.." newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the transmit FIFO/Buffer is cleared.." bitfld.long 0x20 14. "RXFLUSH,Receive FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the receive FIFO/buffer is cleared.." newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable RDRF assertion due to partially filled..,1: Enable RDRF assertion due to partially filled..,?,?,?,?,?,?" bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: TXOF flag does not generate an interrupt to the..,1: TXOF flag generates an interrupt to the host." newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: RXUF flag does not generate an interrupt to the..,1: RXUF flag generates an interrupt to the host." bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Transmit FIFO is not enabled. Buffer is depth 1.,1: Transmit FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO. Buffer Depth" "0: Transmit FIFO/Buffer depth = 1 dataword.,1: Transmit FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Receive FIFO is not enabled. Buffer is depth 1.,1: Receive FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO. Buffer Depth" "0: Receive FIFO/Buffer depth = 1 dataword.,1: Receive FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" line.long 0x24 "WATER,LPUART Watermark Register" rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3" newline rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3" tree.end sif (cpuis("S32K144*")) tree "LPUART2" base ad:0x4006C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,LPUART Global Register" bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset.,1: Module is reset." line.long 0x4 "PINCFG,LPUART Pin Configuration Register" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger is disabled.,1: Input trigger is used instead of RXD pin input.,?,?" line.long 0x8 "BAUD,LPUART Baud Rate Register" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Normal operation.,1: Enables automatic address matching or data.." bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Normal operation.,1: Enables automatic address matching or data.." newline bitfld.long 0x8 29. "M10,10-bit Mode select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: DMA request disabled.,1: DMA request enabled." newline bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address Match Wakeup,1: Idle Match Wakeup,?,?" newline bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Resynchronization during received data word is..,1: Resynchronization during received data word is.." newline bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[LBKDIF]..,1: Hardware interrupt requested when.." bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[RXEDGIF]..,1: Hardware interrupt requested when.." newline bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit.,1: Two stop bits." hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor." line.long 0xC "STAT,LPUART Status Register" bitfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: No LIN break character has been detected.,1: LIN break character has been detected." bitfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: No active edge on the receive pin has occurred.,1: An active edge on the receive pin has occurred." newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB (bit0) is the first bit that is transmitted..,1: MSB (bit9 bit8 bit7 or bit6) is the first bit.." bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Receive data not inverted.,1: Receive data inverted." newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: During receive standby state (RWU = 1) the IDLE..,1: During receive standby state (RWU = 1) the IDLE.." bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: Break character is transmitted with length of 9..,1: Break character is transmitted with length of 12.." newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: LIN break detect is disabled normal break..,1: LIN break detect is enabled. LIN break character.." rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: LPUART receiver idle waiting for a start bit.,1: LPUART receiver active (RXD input not idle)." newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Transmit data buffer full.,1: Transmit data buffer empty." rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)." newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Receive data buffer empty.,1: Receive data buffer full." bitfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected.,1: Idle line was detected." newline bitfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun.,1: Receive overrun (new LPUART data lost)." bitfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected.,1: Noise detected in the received character in.." newline bitfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected. This does not..,1: Framing error." bitfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error.,1: Parity error." newline bitfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Received data is not equal to MA1,1: Received data is equal to MA1" bitfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Received data is not equal to MA2,1: Received data is equal to MA2" line.long 0x10 "CTRL,LPUART Control Register" bitfld.long 0x10 31. "R8T9,Receive Bit 8 / Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 / Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in single-wire mode.,1: TXD pin is an output in single-wire mode." bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Transmit data not inverted.,1: Transmit data inverted." newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: OR interrupts disabled; use polling.,1: Hardware interrupt requested when OR is set." bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: NF interrupts disabled; use polling.,1: Hardware interrupt requested when NF is set." newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: FE interrupts disabled; use polling.,1: Hardware interrupt requested when FE is set." bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: PF interrupts disabled; use polling).,1: Hardware interrupt requested when PF is set." newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Hardware interrupts from TDRE disabled; use..,1: Hardware interrupt requested when TDRE flag is 1." bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable for" "0: Hardware interrupts from TC disabled; use polling.,1: Hardware interrupt requested when TC flag is 1." newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Hardware interrupts from RDRF disabled; use..,1: Hardware interrupt requested when RDRF flag is 1." bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Hardware interrupts from IDLE disabled; use..,1: Hardware interrupt requested when IDLE flag is 1." newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Transmitter disabled.,1: Transmitter enabled." bitfld.long 0x10 18. "RE,Receiver Enable" "0: Receiver disabled.,1: Receiver enabled." newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation.,1: LPUART receiver in standby waiting for wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation.,1: Queue break character(s) to be sent." newline bitfld.long 0x10 15. "MA1IE,Match 1 Interrupt Enable" "0: MA1F interrupt disabled,1: MA1F interrupt enabled" bitfld.long 0x10 14. "MA2IE,Match 2 Interrupt Enable" "0: MA2F interrupt disabled,1: MA2F interrupt enabled" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: Receiver and transmitter use 8-bit to 10-bit..,1: Receiver and transmitter use 7-bit data.." bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1 idle character,1: 2 idle characters,?,?,?,?,?,?" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation - RXD and TXD use separate pins.,1: Loop mode or single-wire mode where transmitter.." bitfld.long 0x10 6. "DOZEEN,Doze Enable" "0: LPUART is enabled in Doze mode.,1: LPUART is disabled in Doze mode." newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Provided LOOPS is set RSRC is cleared selects..,1: Single-wire LPUART mode where the TXD pin is.." bitfld.long 0x10 4. "M,9-Bit or 8-Bit Mode Select" "0: Receiver and transmitter use 8-bit data..,1: Receiver and transmitter use 9-bit data.." newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures RWU for idle-line wakeup.,1: Configures RWU with address-mark wakeup." bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: Idle character bit count starts after start bit.,1: Idle character bit count starts after stop bit." newline bitfld.long 0x10 1. "PE,Parity Enable" "0: No hardware parity generation or checking.,1: Parity enabled." bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity.,1: Odd parity." line.long 0x14 "DATA,LPUART Data Register" rbitfld.long 0x14 15. "NOISY,NOISY" "0: The dataword was received without noise.,1: The data was received with noise." rbitfld.long 0x14 14. "PARITYE,PARITYE" "0: The dataword was received without a parity error.,1: The dataword was received with a parity error." newline bitfld.long 0x14 13. "FRETSC,Frame Error / Transmit Special Character" "0: The dataword was received without a frame error..,1: The dataword was received with a frame error or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Receive buffer contains valid data.,1: Receive buffer is empty data returned on read is.." newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Receiver was not idle before receiving this..,1: Receiver was idle before receiving this character." bitfld.long 0x14 9. "R9T9,R9T9" "0,1" newline bitfld.long 0x14 8. "R8T8,R8T8" "0,1" bitfld.long 0x14 7. "R7T7,R7T7" "0,1" newline bitfld.long 0x14 6. "R6T6,R6T6" "0,1" bitfld.long 0x14 5. "R5T5,R5T5" "0,1" newline bitfld.long 0x14 4. "R4T4,R4T4" "0,1" bitfld.long 0x14 3. "R3T3,R3T3" "0,1" newline bitfld.long 0x14 2. "R2T2,R2T2" "0,1" bitfld.long 0x14 1. "R1T1,R1T1" "0,1" newline bitfld.long 0x14 0. "R0T0,R0T0" "0,1" line.long 0x18 "MATCH,LPUART Match Address Register" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,LPUART Modem IrDA Register" bitfld.long 0x1C 18. "IREN,Infrared enable" "0: IR disabled.,1: IR enabled." bitfld.long 0x1C 16.--17. "TNP,Transmitter narrow pulse" "0: 1/OSR.,1: 2/OSR.,?,?" newline bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: CTS input is the CTS_B pin.,1: CTS input is the inverted Receiver Match result." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: CTS input is sampled at the start of each..,1: CTS input is sampled when the transmitter is idle." bitfld.long 0x1C 3. "RXRTSE,Receiver request-to-send enable" "0: The receiver has no effect on RTS.,?" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter request-to-send polarity" "0: Transmitter RTS is active low.,1: Transmitter RTS is active high." bitfld.long 0x1C 1. "TXRTSE,Transmitter request-to-send enable" "0: The transmitter has no effect on RTS.,1: When a character is placed into an empty.." newline bitfld.long 0x1C 0. "TXCTSE,Transmitter clear-to-send enable" "0: CTS has no effect on the transmitter.,1: Enables clear-to-send operation. The transmitter.." line.long 0x20 "FIFO,LPUART FIFO Register" rbitfld.long 0x20 23. "TXEMPT,Transmit Buffer/FIFO Empty" "0: Transmit buffer is not empty.,1: Transmit buffer is empty." rbitfld.long 0x20 22. "RXEMPT,Receive Buffer/FIFO Empty" "0: Receive buffer is not empty.,1: Receive buffer is empty." newline bitfld.long 0x20 17. "TXOF,Transmitter Buffer Overflow Flag" "0: No transmit buffer overflow has occurred since..,1: At least one transmit buffer overflow has.." bitfld.long 0x20 16. "RXUF,Receiver Buffer Underflow Flag" "0: No receive buffer underflow has occurred since..,1: At least one receive buffer underflow has.." newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the transmit FIFO/Buffer is cleared.." bitfld.long 0x20 14. "RXFLUSH,Receive FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the receive FIFO/buffer is cleared.." newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable RDRF assertion due to partially filled..,1: Enable RDRF assertion due to partially filled..,?,?,?,?,?,?" bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: TXOF flag does not generate an interrupt to the..,1: TXOF flag generates an interrupt to the host." newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: RXUF flag does not generate an interrupt to the..,1: RXUF flag generates an interrupt to the host." bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Transmit FIFO is not enabled. Buffer is depth 1.,1: Transmit FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO. Buffer Depth" "0: Transmit FIFO/Buffer depth = 1 dataword.,1: Transmit FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Receive FIFO is not enabled. Buffer is depth 1.,1: Receive FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO. Buffer Depth" "0: Receive FIFO/Buffer depth = 1 dataword.,1: Receive FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" line.long 0x24 "WATER,LPUART Watermark Register" rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3" newline rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3" tree.end endif sif (cpuis("S32K146*")) tree "LPUART2" base ad:0x4006C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,LPUART Global Register" bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset.,1: Module is reset." line.long 0x4 "PINCFG,LPUART Pin Configuration Register" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger is disabled.,1: Input trigger is used instead of RXD pin input.,?,?" line.long 0x8 "BAUD,LPUART Baud Rate Register" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Normal operation.,1: Enables automatic address matching or data.." bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Normal operation.,1: Enables automatic address matching or data.." newline bitfld.long 0x8 29. "M10,10-bit Mode select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: DMA request disabled.,1: DMA request enabled." newline bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address Match Wakeup,1: Idle Match Wakeup,?,?" newline bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Resynchronization during received data word is..,1: Resynchronization during received data word is.." newline bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[LBKDIF]..,1: Hardware interrupt requested when.." bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[RXEDGIF]..,1: Hardware interrupt requested when.." newline bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit.,1: Two stop bits." hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor." line.long 0xC "STAT,LPUART Status Register" bitfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: No LIN break character has been detected.,1: LIN break character has been detected." bitfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: No active edge on the receive pin has occurred.,1: An active edge on the receive pin has occurred." newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB (bit0) is the first bit that is transmitted..,1: MSB (bit9 bit8 bit7 or bit6) is the first bit.." bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Receive data not inverted.,1: Receive data inverted." newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: During receive standby state (RWU = 1) the IDLE..,1: During receive standby state (RWU = 1) the IDLE.." bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: Break character is transmitted with length of 9..,1: Break character is transmitted with length of 12.." newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: LIN break detect is disabled normal break..,1: LIN break detect is enabled. LIN break character.." rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: LPUART receiver idle waiting for a start bit.,1: LPUART receiver active (RXD input not idle)." newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Transmit data buffer full.,1: Transmit data buffer empty." rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)." newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Receive data buffer empty.,1: Receive data buffer full." bitfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected.,1: Idle line was detected." newline bitfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun.,1: Receive overrun (new LPUART data lost)." bitfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected.,1: Noise detected in the received character in.." newline bitfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected. This does not..,1: Framing error." bitfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error.,1: Parity error." newline bitfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Received data is not equal to MA1,1: Received data is equal to MA1" bitfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Received data is not equal to MA2,1: Received data is equal to MA2" line.long 0x10 "CTRL,LPUART Control Register" bitfld.long 0x10 31. "R8T9,Receive Bit 8 / Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 / Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in single-wire mode.,1: TXD pin is an output in single-wire mode." bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Transmit data not inverted.,1: Transmit data inverted." newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: OR interrupts disabled; use polling.,1: Hardware interrupt requested when OR is set." bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: NF interrupts disabled; use polling.,1: Hardware interrupt requested when NF is set." newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: FE interrupts disabled; use polling.,1: Hardware interrupt requested when FE is set." bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: PF interrupts disabled; use polling).,1: Hardware interrupt requested when PF is set." newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Hardware interrupts from TDRE disabled; use..,1: Hardware interrupt requested when TDRE flag is 1." bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable for" "0: Hardware interrupts from TC disabled; use polling.,1: Hardware interrupt requested when TC flag is 1." newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Hardware interrupts from RDRF disabled; use..,1: Hardware interrupt requested when RDRF flag is 1." bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Hardware interrupts from IDLE disabled; use..,1: Hardware interrupt requested when IDLE flag is 1." newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Transmitter disabled.,1: Transmitter enabled." bitfld.long 0x10 18. "RE,Receiver Enable" "0: Receiver disabled.,1: Receiver enabled." newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation.,1: LPUART receiver in standby waiting for wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation.,1: Queue break character(s) to be sent." newline bitfld.long 0x10 15. "MA1IE,Match 1 Interrupt Enable" "0: MA1F interrupt disabled,1: MA1F interrupt enabled" bitfld.long 0x10 14. "MA2IE,Match 2 Interrupt Enable" "0: MA2F interrupt disabled,1: MA2F interrupt enabled" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: Receiver and transmitter use 8-bit to 10-bit..,1: Receiver and transmitter use 7-bit data.." bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1 idle character,1: 2 idle characters,?,?,?,?,?,?" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation - RXD and TXD use separate pins.,1: Loop mode or single-wire mode where transmitter.." bitfld.long 0x10 6. "DOZEEN,Doze Enable" "0: LPUART is enabled in Doze mode.,1: LPUART is disabled in Doze mode." newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Provided LOOPS is set RSRC is cleared selects..,1: Single-wire LPUART mode where the TXD pin is.." bitfld.long 0x10 4. "M,9-Bit or 8-Bit Mode Select" "0: Receiver and transmitter use 8-bit data..,1: Receiver and transmitter use 9-bit data.." newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures RWU for idle-line wakeup.,1: Configures RWU with address-mark wakeup." bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: Idle character bit count starts after start bit.,1: Idle character bit count starts after stop bit." newline bitfld.long 0x10 1. "PE,Parity Enable" "0: No hardware parity generation or checking.,1: Parity enabled." bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity.,1: Odd parity." line.long 0x14 "DATA,LPUART Data Register" rbitfld.long 0x14 15. "NOISY,NOISY" "0: The dataword was received without noise.,1: The data was received with noise." rbitfld.long 0x14 14. "PARITYE,PARITYE" "0: The dataword was received without a parity error.,1: The dataword was received with a parity error." newline bitfld.long 0x14 13. "FRETSC,Frame Error / Transmit Special Character" "0: The dataword was received without a frame error..,1: The dataword was received with a frame error or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Receive buffer contains valid data.,1: Receive buffer is empty data returned on read is.." newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Receiver was not idle before receiving this..,1: Receiver was idle before receiving this character." bitfld.long 0x14 9. "R9T9,R9T9" "0,1" newline bitfld.long 0x14 8. "R8T8,R8T8" "0,1" bitfld.long 0x14 7. "R7T7,R7T7" "0,1" newline bitfld.long 0x14 6. "R6T6,R6T6" "0,1" bitfld.long 0x14 5. "R5T5,R5T5" "0,1" newline bitfld.long 0x14 4. "R4T4,R4T4" "0,1" bitfld.long 0x14 3. "R3T3,R3T3" "0,1" newline bitfld.long 0x14 2. "R2T2,R2T2" "0,1" bitfld.long 0x14 1. "R1T1,R1T1" "0,1" newline bitfld.long 0x14 0. "R0T0,R0T0" "0,1" line.long 0x18 "MATCH,LPUART Match Address Register" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,LPUART Modem IrDA Register" bitfld.long 0x1C 18. "IREN,Infrared enable" "0: IR disabled.,1: IR enabled." bitfld.long 0x1C 16.--17. "TNP,Transmitter narrow pulse" "0: 1/OSR.,1: 2/OSR.,?,?" newline bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: CTS input is the CTS_B pin.,1: CTS input is the inverted Receiver Match result." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: CTS input is sampled at the start of each..,1: CTS input is sampled when the transmitter is idle." bitfld.long 0x1C 3. "RXRTSE,Receiver request-to-send enable" "0: The receiver has no effect on RTS.,?" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter request-to-send polarity" "0: Transmitter RTS is active low.,1: Transmitter RTS is active high." bitfld.long 0x1C 1. "TXRTSE,Transmitter request-to-send enable" "0: The transmitter has no effect on RTS.,1: When a character is placed into an empty.." newline bitfld.long 0x1C 0. "TXCTSE,Transmitter clear-to-send enable" "0: CTS has no effect on the transmitter.,1: Enables clear-to-send operation. The transmitter.." line.long 0x20 "FIFO,LPUART FIFO Register" rbitfld.long 0x20 23. "TXEMPT,Transmit Buffer/FIFO Empty" "0: Transmit buffer is not empty.,1: Transmit buffer is empty." rbitfld.long 0x20 22. "RXEMPT,Receive Buffer/FIFO Empty" "0: Receive buffer is not empty.,1: Receive buffer is empty." newline bitfld.long 0x20 17. "TXOF,Transmitter Buffer Overflow Flag" "0: No transmit buffer overflow has occurred since..,1: At least one transmit buffer overflow has.." bitfld.long 0x20 16. "RXUF,Receiver Buffer Underflow Flag" "0: No receive buffer underflow has occurred since..,1: At least one receive buffer underflow has.." newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the transmit FIFO/Buffer is cleared.." bitfld.long 0x20 14. "RXFLUSH,Receive FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the receive FIFO/buffer is cleared.." newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable RDRF assertion due to partially filled..,1: Enable RDRF assertion due to partially filled..,?,?,?,?,?,?" bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: TXOF flag does not generate an interrupt to the..,1: TXOF flag generates an interrupt to the host." newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: RXUF flag does not generate an interrupt to the..,1: RXUF flag generates an interrupt to the host." bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Transmit FIFO is not enabled. Buffer is depth 1.,1: Transmit FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO. Buffer Depth" "0: Transmit FIFO/Buffer depth = 1 dataword.,1: Transmit FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Receive FIFO is not enabled. Buffer is depth 1.,1: Receive FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO. Buffer Depth" "0: Receive FIFO/Buffer depth = 1 dataword.,1: Receive FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" line.long 0x24 "WATER,LPUART Watermark Register" rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3" newline rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3" tree.end endif sif (cpuis("S32K148*")) tree "LPUART2" base ad:0x4006C000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size" hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size" group.long 0x8++0x27 line.long 0x0 "GLOBAL,LPUART Global Register" bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset.,1: Module is reset." line.long 0x4 "PINCFG,LPUART Pin Configuration Register" bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger is disabled.,1: Input trigger is used instead of RXD pin input.,?,?" line.long 0x8 "BAUD,LPUART Baud Rate Register" bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Normal operation.,1: Enables automatic address matching or data.." bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Normal operation.,1: Enables automatic address matching or data.." newline bitfld.long 0x8 29. "M10,10-bit Mode select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.." hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio" newline bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: DMA request disabled.,1: DMA request enabled." newline bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: DMA request disabled.,1: DMA request enabled." bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address Match Wakeup,1: Idle Match Wakeup,?,?" newline bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.." bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Resynchronization during received data word is..,1: Resynchronization during received data word is.." newline bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[LBKDIF]..,1: Hardware interrupt requested when.." bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Hardware interrupts from LPUART_STAT[RXEDGIF]..,1: Hardware interrupt requested when.." newline bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit.,1: Two stop bits." hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor." line.long 0xC "STAT,LPUART Status Register" bitfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: No LIN break character has been detected.,1: LIN break character has been detected." bitfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: No active edge on the receive pin has occurred.,1: An active edge on the receive pin has occurred." newline bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB (bit0) is the first bit that is transmitted..,1: MSB (bit9 bit8 bit7 or bit6) is the first bit.." bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Receive data not inverted.,1: Receive data inverted." newline bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: During receive standby state (RWU = 1) the IDLE..,1: During receive standby state (RWU = 1) the IDLE.." bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: Break character is transmitted with length of 9..,1: Break character is transmitted with length of 12.." newline bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: LIN break detect is disabled normal break..,1: LIN break detect is enabled. LIN break character.." rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: LPUART receiver idle waiting for a start bit.,1: LPUART receiver active (RXD input not idle)." newline rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Transmit data buffer full.,1: Transmit data buffer empty." rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)." newline rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Receive data buffer empty.,1: Receive data buffer full." bitfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected.,1: Idle line was detected." newline bitfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun.,1: Receive overrun (new LPUART data lost)." bitfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected.,1: Noise detected in the received character in.." newline bitfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected. This does not..,1: Framing error." bitfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error.,1: Parity error." newline bitfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Received data is not equal to MA1,1: Received data is equal to MA1" bitfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Received data is not equal to MA2,1: Received data is equal to MA2" line.long 0x10 "CTRL,LPUART Control Register" bitfld.long 0x10 31. "R8T9,Receive Bit 8 / Transmit Bit 9" "0,1" bitfld.long 0x10 30. "R9T8,Receive Bit 9 / Transmit Bit 8" "0,1" newline bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in single-wire mode.,1: TXD pin is an output in single-wire mode." bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Transmit data not inverted.,1: Transmit data inverted." newline bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: OR interrupts disabled; use polling.,1: Hardware interrupt requested when OR is set." bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: NF interrupts disabled; use polling.,1: Hardware interrupt requested when NF is set." newline bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: FE interrupts disabled; use polling.,1: Hardware interrupt requested when FE is set." bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: PF interrupts disabled; use polling).,1: Hardware interrupt requested when PF is set." newline bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Hardware interrupts from TDRE disabled; use..,1: Hardware interrupt requested when TDRE flag is 1." bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable for" "0: Hardware interrupts from TC disabled; use polling.,1: Hardware interrupt requested when TC flag is 1." newline bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Hardware interrupts from RDRF disabled; use..,1: Hardware interrupt requested when RDRF flag is 1." bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Hardware interrupts from IDLE disabled; use..,1: Hardware interrupt requested when IDLE flag is 1." newline bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Transmitter disabled.,1: Transmitter enabled." bitfld.long 0x10 18. "RE,Receiver Enable" "0: Receiver disabled.,1: Receiver enabled." newline bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation.,1: LPUART receiver in standby waiting for wakeup.." bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation.,1: Queue break character(s) to be sent." newline bitfld.long 0x10 15. "MA1IE,Match 1 Interrupt Enable" "0: MA1F interrupt disabled,1: MA1F interrupt enabled" bitfld.long 0x10 14. "MA2IE,Match 2 Interrupt Enable" "0: MA2F interrupt disabled,1: MA2F interrupt enabled" newline bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: Receiver and transmitter use 8-bit to 10-bit..,1: Receiver and transmitter use 7-bit data.." bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1 idle character,1: 2 idle characters,?,?,?,?,?,?" newline bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation - RXD and TXD use separate pins.,1: Loop mode or single-wire mode where transmitter.." bitfld.long 0x10 6. "DOZEEN,Doze Enable" "0: LPUART is enabled in Doze mode.,1: LPUART is disabled in Doze mode." newline bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Provided LOOPS is set RSRC is cleared selects..,1: Single-wire LPUART mode where the TXD pin is.." bitfld.long 0x10 4. "M,9-Bit or 8-Bit Mode Select" "0: Receiver and transmitter use 8-bit data..,1: Receiver and transmitter use 9-bit data.." newline bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures RWU for idle-line wakeup.,1: Configures RWU with address-mark wakeup." bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: Idle character bit count starts after start bit.,1: Idle character bit count starts after stop bit." newline bitfld.long 0x10 1. "PE,Parity Enable" "0: No hardware parity generation or checking.,1: Parity enabled." bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity.,1: Odd parity." line.long 0x14 "DATA,LPUART Data Register" rbitfld.long 0x14 15. "NOISY,NOISY" "0: The dataword was received without noise.,1: The data was received with noise." rbitfld.long 0x14 14. "PARITYE,PARITYE" "0: The dataword was received without a parity error.,1: The dataword was received with a parity error." newline bitfld.long 0x14 13. "FRETSC,Frame Error / Transmit Special Character" "0: The dataword was received without a frame error..,1: The dataword was received with a frame error or.." rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Receive buffer contains valid data.,1: Receive buffer is empty data returned on read is.." newline rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Receiver was not idle before receiving this..,1: Receiver was idle before receiving this character." bitfld.long 0x14 9. "R9T9,R9T9" "0,1" newline bitfld.long 0x14 8. "R8T8,R8T8" "0,1" bitfld.long 0x14 7. "R7T7,R7T7" "0,1" newline bitfld.long 0x14 6. "R6T6,R6T6" "0,1" bitfld.long 0x14 5. "R5T5,R5T5" "0,1" newline bitfld.long 0x14 4. "R4T4,R4T4" "0,1" bitfld.long 0x14 3. "R3T3,R3T3" "0,1" newline bitfld.long 0x14 2. "R2T2,R2T2" "0,1" bitfld.long 0x14 1. "R1T1,R1T1" "0,1" newline bitfld.long 0x14 0. "R0T0,R0T0" "0,1" line.long 0x18 "MATCH,LPUART Match Address Register" hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2" hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1" line.long 0x1C "MODIR,LPUART Modem IrDA Register" bitfld.long 0x1C 18. "IREN,Infrared enable" "0: IR disabled.,1: IR enabled." bitfld.long 0x1C 16.--17. "TNP,Transmitter narrow pulse" "0: 1/OSR.,1: 2/OSR.,?,?" newline bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3" bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: CTS input is the CTS_B pin.,1: CTS input is the inverted Receiver Match result." newline bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: CTS input is sampled at the start of each..,1: CTS input is sampled when the transmitter is idle." bitfld.long 0x1C 3. "RXRTSE,Receiver request-to-send enable" "0: The receiver has no effect on RTS.,?" newline bitfld.long 0x1C 2. "TXRTSPOL,Transmitter request-to-send polarity" "0: Transmitter RTS is active low.,1: Transmitter RTS is active high." bitfld.long 0x1C 1. "TXRTSE,Transmitter request-to-send enable" "0: The transmitter has no effect on RTS.,1: When a character is placed into an empty.." newline bitfld.long 0x1C 0. "TXCTSE,Transmitter clear-to-send enable" "0: CTS has no effect on the transmitter.,1: Enables clear-to-send operation. The transmitter.." line.long 0x20 "FIFO,LPUART FIFO Register" rbitfld.long 0x20 23. "TXEMPT,Transmit Buffer/FIFO Empty" "0: Transmit buffer is not empty.,1: Transmit buffer is empty." rbitfld.long 0x20 22. "RXEMPT,Receive Buffer/FIFO Empty" "0: Receive buffer is not empty.,1: Receive buffer is empty." newline bitfld.long 0x20 17. "TXOF,Transmitter Buffer Overflow Flag" "0: No transmit buffer overflow has occurred since..,1: At least one transmit buffer overflow has.." bitfld.long 0x20 16. "RXUF,Receiver Buffer Underflow Flag" "0: No receive buffer underflow has occurred since..,1: At least one receive buffer underflow has.." newline bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the transmit FIFO/Buffer is cleared.." bitfld.long 0x20 14. "RXFLUSH,Receive FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the receive FIFO/buffer is cleared.." newline bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable RDRF assertion due to partially filled..,1: Enable RDRF assertion due to partially filled..,?,?,?,?,?,?" bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: TXOF flag does not generate an interrupt to the..,1: TXOF flag generates an interrupt to the host." newline bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: RXUF flag does not generate an interrupt to the..,1: RXUF flag generates an interrupt to the host." bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Transmit FIFO is not enabled. Buffer is depth 1.,1: Transmit FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO. Buffer Depth" "0: Transmit FIFO/Buffer depth = 1 dataword.,1: Transmit FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Receive FIFO is not enabled. Buffer is depth 1.,1: Receive FIFO is enabled. Buffer is depth.." newline rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO. Buffer Depth" "0: Receive FIFO/Buffer depth = 1 dataword.,1: Receive FIFO/Buffer depth = 4 datawords.,?,?,?,?,?,?" line.long 0x24 "WATER,LPUART Watermark Register" rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3" newline rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3" tree.end endif tree.end sif (cpuis("S32K116*")||cpuis("S32K118*")) base ad:0xF0003000 elif (cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")||cpuis("S32K148*")) base ad:0xE0080000 endif tree "MCM (Miscellaneous Control Module)" rgroup.word 0x8++0x3 line.word 0x0 "PLASC,Crossbar Switch (AXBS) Slave Configuration" hexmask.word.byte 0x0 0.--7. 1. "ASC,Each bit in the ASC field indicates whether there is a corresponding connection to the crossbar switch's slave input port." line.word 0x2 "PLAMC,Crossbar Switch (AXBS) Master Configuration" hexmask.word.byte 0x2 0.--7. 1. "AMC,Each bit in the AMC field indicates whether there is a corresponding connection to the AXBS master input port." group.long 0xC++0x3 line.long 0x0 "CPCR,Core Platform Control Register" sif (cpuis("S32K142*")) bitfld.long 0x0 30. "SRAMLWP,SRAM_L Write Protect" "0,1" bitfld.long 0x0 28.--29. "SRAMLAP,SRAM_L Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 30. "SRAMLWP,SRAM_L Write Protect" "0,1" bitfld.long 0x0 28.--29. "SRAMLAP,SRAM_L Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 30. "SRAMLWP,SRAM_L Write Protect" "0,1" bitfld.long 0x0 28.--29. "SRAMLAP,SRAM_L Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 30. "SRAMLWP,SRAM_L Write Protect" "0,1" bitfld.long 0x0 28.--29. "SRAMLAP,SRAM_L Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x0 26. "SRAMUWP,SRAM_U Write Protect" "0,1" bitfld.long 0x0 24.--25. "SRAMUAP,SRAM_U Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 26. "SRAMUWP,SRAM_U Write Protect" "0,1" bitfld.long 0x0 24.--25. "SRAMUAP,SRAM_U Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 26. "SRAMUWP,SRAM_U Write Protect" "0,1" bitfld.long 0x0 24.--25. "SRAMUAP,SRAM_U Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 26. "SRAMUWP,SRAM_U Write Protect" "0,1" bitfld.long 0x0 24.--25. "SRAMUAP,SRAM_U Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,?,?" newline endif bitfld.long 0x0 9. "CBRR,Crossbar Round-robin Arbitration Enable" "0: Fixed-priority arbitration,1: Round-robin arbitration" rbitfld.long 0x0 6. "PBRIDGE_IDLE,Peripheral Bridge Idle" "0: PBRIDGE is not idle,1: PBRIDGE is currently idle" newline rbitfld.long 0x0 4. "FMC_PF_IDLE,Flash Memory Controller Program Flash Idle" "0: FMC program flash is not idle,1: FMC program flash is currently idle" rbitfld.long 0x0 3. "AXBS_HLTD,AXBS Halted" "0: AXBS is not currently halted,1: AXBS is currently halted" newline rbitfld.long 0x0 2. "AXBS_HLT_REQ,AXBS Halt Request" "0: AXBS is not receiving halt request,1: AXBS is receiving halt request" rbitfld.long 0x0 0.--1. "HLT_FSM_ST,AXBS Halt State Machine Status" "0: Waiting for request,1: Waiting for platform idle,?,?" sif (cpuis("S32K142*")) group.long 0x10++0x3 line.long 0x0 "ISCR,Interrupt Status and Control Register" bitfld.long 0x0 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x0 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x0 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline rbitfld.long 0x0 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x0 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x0 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred" endif sif (cpuis("S32K144*")) group.long 0x10++0x3 line.long 0x0 "ISCR,Interrupt Status and Control Register" bitfld.long 0x0 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x0 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x0 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline rbitfld.long 0x0 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x0 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x0 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred" endif sif (cpuis("S32K146*")) group.long 0x10++0x3 line.long 0x0 "ISCR,Interrupt Status and Control Register" bitfld.long 0x0 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x0 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x0 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline rbitfld.long 0x0 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x0 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x0 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred" endif sif (cpuis("S32K148*")) group.long 0x10++0x3 line.long 0x0 "ISCR,Interrupt Status and Control Register" bitfld.long 0x0 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x0 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline bitfld.long 0x0 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" bitfld.long 0x0 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt" newline rbitfld.long 0x0 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x0 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred" newline rbitfld.long 0x0 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred" rbitfld.long 0x0 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred" endif group.long 0x30++0x3 line.long 0x0 "PID,Process ID Register" hexmask.long.byte 0x0 0.--7. 1. "PID,M0_PID and M1_PID for MPU" group.long 0x40++0x3 line.long 0x0 "CPO,Compute Operation Control Register" bitfld.long 0x0 2. "CPOWOI,Compute Operation Wakeup On Interrupt" "0: No effect.,1: When set the CPOREQ is cleared on any interrupt.." rbitfld.long 0x0 1. "CPOACK,Compute Operation Acknowledge" "0: Compute operation entry has not completed or..,1: Compute operation entry has completed or compute.." newline bitfld.long 0x0 0. "CPOREQ,Compute Operation Request" "0: Request is cleared.,1: Request Compute Operation." group.long 0x400++0xB line.long 0x0 "LMDR0,Local Memory Descriptor Register" rbitfld.long 0x0 31. "V,Local Memory Valid" "0: LMEMn is not present.,1: LMEMn is present." rbitfld.long 0x0 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity.,1: LMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x0 24.--27. 1. "LMSZ,LMEM Size" hexmask.long.byte 0x0 20.--23. 1. "WY,Level 1 Cache Ways" newline rbitfld.long 0x0 17.--19. "DPW,LMEM Data Path Width. This field defines the width of the local memory." "0,1,2,3,4,5,6,7" sif (cpuis("S32K142*")) bitfld.long 0x0 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." endif sif (cpuis("S32K146*")) bitfld.long 0x0 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." endif rbitfld.long 0x0 13.--15. "MT,Memory Type" "0: SRAM_L,1: SRAM_U,?,?,?,?,?,?" newline hexmask.long.byte 0x0 0.--3. 1. "CF0,Control Field 0" line.long 0x4 "LMDR1,Local Memory Descriptor Register" rbitfld.long 0x4 31. "V,Local Memory Valid" "0: LMEMn is not present.,1: LMEMn is present." rbitfld.long 0x4 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity.,1: LMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x4 24.--27. 1. "LMSZ,LMEM Size" hexmask.long.byte 0x4 20.--23. 1. "WY,Level 1 Cache Ways" newline rbitfld.long 0x4 17.--19. "DPW,LMEM Data Path Width. This field defines the width of the local memory." "0,1,2,3,4,5,6,7" sif (cpuis("S32K142*")) bitfld.long 0x4 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." newline endif sif (cpuis("S32K144*")) bitfld.long 0x4 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." endif sif (cpuis("S32K146*")) bitfld.long 0x4 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." newline endif sif (cpuis("S32K148*")) bitfld.long 0x4 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." endif rbitfld.long 0x4 13.--15. "MT,Memory Type" "0: SRAM_L,1: SRAM_U,?,?,?,?,?,?" newline hexmask.long.byte 0x4 0.--3. 1. "CF0,Control Field 0" line.long 0x8 "LMDR2,Local Memory Descriptor Register2" rbitfld.long 0x8 31. "V,Local Memory Valid" "0: LMEMn is not present.,1: LMEMn is present." rbitfld.long 0x8 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity.,1: LMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x8 24.--27. 1. "LMSZ,LMEM Size" hexmask.long.byte 0x8 20.--23. 1. "WY,Level 1 Cache Ways" newline rbitfld.long 0x8 17.--19. "DPW,LMEM Data Path Width. This field defines the width of the local memory." "0,1,2,3,4,5,6,7" sif (cpuis("S32K142*")) bitfld.long 0x8 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." newline endif sif (cpuis("S32K144*")) bitfld.long 0x8 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." endif sif (cpuis("S32K146*")) bitfld.long 0x8 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored." endif rbitfld.long 0x8 13.--15. "MT,Memory Type" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 4.--7. 1. "CF1,Control Field 1" group.long 0x480++0x3 line.long 0x0 "LMPECR,LMEM Parity and ECC Control Register" sif (cpuis("S32K142*")) bitfld.long 0x0 20. "ECPR,Enable Cache Parity Reporting" "0: Reporting disabled,1: Reporting enabled" newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 20. "ECPR,Enable Cache Parity Reporting" "0: Reporting disabled,1: Reporting enabled" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 20. "ECPR,Enable Cache Parity Reporting" "0: Reporting disabled,1: Reporting enabled" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 20. "ECPR,Enable Cache Parity Reporting" "0: Reporting disabled,1: Reporting enabled" newline endif bitfld.long 0x0 8. "ER1BR,Enable RAM ECC 1 Bit Reporting" "0: Reporting disabled,1: Reporting enabled" bitfld.long 0x0 0. "ERNCR,Enable RAM ECC Noncorrectable Reporting" "0: Reporting disabled,1: Reporting enabled" group.long 0x488++0x3 line.long 0x0 "LMPEIR,LMEM Parity and ECC Interrupt Register" rbitfld.long 0x0 31. "V,Valid Bit" "0,1" hexmask.long.byte 0x0 24.--28. 1. "PEELOC,Parity or ECC Error Location" newline sif (cpuis("S32K142*")) hexmask.long.byte 0x0 16.--23. 1. "PE,Cache Parity Error" newline endif sif (cpuis("S32K144*")) hexmask.long.byte 0x0 16.--23. 1. "PE,Cache Parity Error" newline endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 16.--23. 1. "PE,Cache Parity Error" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 16.--23. 1. "PE,Cache Parity Error" newline endif hexmask.long.byte 0x0 8.--15. 1. "E1B,E1Bn = ECC 1-bit Error n" hexmask.long.byte 0x0 0.--7. 1. "ENC,ENCn = ECC Noncorrectable Error n" rgroup.long 0x490++0x7 line.long 0x0 "LMFAR,LMEM Fault Address Register" hexmask.long 0x0 0.--31. 1. "EFADD,ECC Fault Address" line.long 0x4 "LMFATR,LMEM Fault Attribute Register" bitfld.long 0x4 31. "OVR,Overrun" "0,1" hexmask.long.byte 0x4 8.--15. 1. "PEFMST,Parity/ECC Fault Master Number" newline bitfld.long 0x4 7. "PEFW,Parity/ECC Fault Write" "0,1" bitfld.long 0x4 4.--6. "PEFSIZE,Parity/ECC Fault Master Size" "0: 8-bit access,1: 16-bit access,?,?,?,?,?,?" newline hexmask.long.byte 0x4 0.--3. 1. "PEFPRT,Parity/ECC Fault Protection" rgroup.long 0x4A0++0x7 line.long 0x0 "LMFDHR,LMEM Fault Data High Register" hexmask.long 0x0 0.--31. 1. "PEFDH,Parity or ECC Fault Data High" line.long 0x4 "LMFDLR,LMEM Fault Data Low Register" hexmask.long 0x4 0.--31. 1. "PEFDL,Parity or ECC Fault Data Low" tree.end tree "MPU (Memory Protection Unit)" base ad:0x4000D000 group.long 0x0++0x3 line.long 0x0 "CESR,Control/Error Status Register" bitfld.long 0x0 31. "SPERR0,Slave Port 0 Error" "0: No error has occurred for slave port 0.,1: An error has occurred for slave port 0." bitfld.long 0x0 30. "SPERR1,Slave Port 1 Error" "0: No error has occurred for slave port 1.,1: An error has occurred for slave port 1." newline sif (cpuis("S32K148*")) bitfld.long 0x0 29. "SPERR2,Slave Port 2 Error" "0: No error has occurred for slave port 2.,1: An error has occurred for slave port 2." bitfld.long 0x0 28. "SPERR3,Slave Port 3 Error" "0: No error has occurred for slave port 3.,1: An error has occurred for slave port 3." newline bitfld.long 0x0 27. "SPERR4,Slave Port 4 Error" "0: No error has occurred for slave port 4.,1: An error has occurred for slave port 4." endif sif (cpuis("S32K142*")) bitfld.long 0x0 29. "SPERR2,Slave Port 2 Error" "0: No error has occurred for slave port 2.,1: An error has occurred for slave port 2." newline bitfld.long 0x0 28. "SPERR3,Slave Port 3 Error" "0: No error has occurred for slave port 3.,1: An error has occurred for slave port 3." endif sif (cpuis("S32K144*")) bitfld.long 0x0 29. "SPERR2,Slave Port 2 Error" "0: No error has occurred for slave port 2.,1: An error has occurred for slave port 2." newline bitfld.long 0x0 28. "SPERR3,Slave Port 3 Error" "0: No error has occurred for slave port 3.,1: An error has occurred for slave port 3." endif sif (cpuis("S32K146*")) bitfld.long 0x0 29. "SPERR2,Slave Port 2 Error" "0: No error has occurred for slave port 2.,1: An error has occurred for slave port 2." newline bitfld.long 0x0 28. "SPERR3,Slave Port 3 Error" "0: No error has occurred for slave port 3.,1: An error has occurred for slave port 3." endif hexmask.long.byte 0x0 16.--19. 1. "HRL,Hardware Revision Level" newline hexmask.long.byte 0x0 12.--15. 1. "NSP,Number Of Slave Ports" hexmask.long.byte 0x0 8.--11. 1. "NRGD,Number Of Region Descriptors" newline bitfld.long 0x0 0. "VLD,Valid" "0: MPU is disabled. All accesses from all bus..,1: MPU is enabled" rgroup.long 0x10++0xF line.long 0x0 "EAR0,Error Address Register. slave port 0" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "EDR0,Error Detail Register. slave port 0" hexmask.long.word 0x4 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0x4 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0x4 4.--7. 1. "EMN,Error Master Number" bitfld.long 0x4 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0x4 0. "ERW,Error Read/Write" "0: Read,1: Write" line.long 0x8 "EAR1,Error Address Register. slave port 1" hexmask.long 0x8 0.--31. 1. "EADDR,Error Address" line.long 0xC "EDR1,Error Detail Register. slave port 1" hexmask.long.word 0xC 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0xC 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0xC 4.--7. 1. "EMN,Error Master Number" bitfld.long 0xC 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0xC 0. "ERW,Error Read/Write" "0: Read,1: Write" sif (cpuis("S32K142*")) rgroup.long 0x20++0xF line.long 0x0 "EAR2,Error Address Register. slave port 2" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "EDR2,Error Detail Register. slave port 2" hexmask.long.word 0x4 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0x4 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0x4 4.--7. 1. "EMN,Error Master Number" bitfld.long 0x4 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0x4 0. "ERW,Error Read/Write" "0: Read,1: Write" line.long 0x8 "EAR3,Error Address Register. slave port 3" hexmask.long 0x8 0.--31. 1. "EADDR,Error Address" line.long 0xC "EDR3,Error Detail Register. slave port 3" hexmask.long.word 0xC 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0xC 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0xC 4.--7. 1. "EMN,Error Master Number" bitfld.long 0xC 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0xC 0. "ERW,Error Read/Write" "0: Read,1: Write" endif sif (cpuis("S32K144*")) rgroup.long 0x20++0xF line.long 0x0 "EAR2,Error Address Register. slave port 2" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "EDR2,Error Detail Register. slave port 2" hexmask.long.word 0x4 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0x4 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0x4 4.--7. 1. "EMN,Error Master Number" bitfld.long 0x4 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0x4 0. "ERW,Error Read/Write" "0: Read,1: Write" line.long 0x8 "EAR3,Error Address Register. slave port 3" hexmask.long 0x8 0.--31. 1. "EADDR,Error Address" line.long 0xC "EDR3,Error Detail Register. slave port 3" hexmask.long.word 0xC 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0xC 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0xC 4.--7. 1. "EMN,Error Master Number" bitfld.long 0xC 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0xC 0. "ERW,Error Read/Write" "0: Read,1: Write" endif sif (cpuis("S32K146*")) rgroup.long 0x20++0xF line.long 0x0 "EAR2,Error Address Register. slave port 2" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "EDR2,Error Detail Register. slave port 2" hexmask.long.word 0x4 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0x4 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0x4 4.--7. 1. "EMN,Error Master Number" bitfld.long 0x4 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0x4 0. "ERW,Error Read/Write" "0: Read,1: Write" line.long 0x8 "EAR3,Error Address Register. slave port 3" hexmask.long 0x8 0.--31. 1. "EADDR,Error Address" line.long 0xC "EDR3,Error Detail Register. slave port 3" hexmask.long.word 0xC 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0xC 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0xC 4.--7. 1. "EMN,Error Master Number" bitfld.long 0xC 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0xC 0. "ERW,Error Read/Write" "0: Read,1: Write" endif sif (cpuis("S32K148*")) rgroup.long 0x20++0x17 line.long 0x0 "EAR2,Error Address Register. slave port 2" hexmask.long 0x0 0.--31. 1. "EADDR,Error Address" line.long 0x4 "EDR2,Error Detail Register. slave port 2" hexmask.long.word 0x4 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0x4 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0x4 4.--7. 1. "EMN,Error Master Number" bitfld.long 0x4 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0x4 0. "ERW,Error Read/Write" "0: Read,1: Write" line.long 0x8 "EAR3,Error Address Register. slave port 3" hexmask.long 0x8 0.--31. 1. "EADDR,Error Address" line.long 0xC "EDR3,Error Detail Register. slave port 3" hexmask.long.word 0xC 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0xC 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0xC 4.--7. 1. "EMN,Error Master Number" bitfld.long 0xC 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0xC 0. "ERW,Error Read/Write" "0: Read,1: Write" line.long 0x10 "EAR4,Error Address Register. slave port 4" hexmask.long 0x10 0.--31. 1. "EADDR,Error Address" line.long 0x14 "EDR4,Error Detail Register. slave port 4" hexmask.long.word 0x14 16.--31. 1. "EACD,Error Access Control Detail" hexmask.long.byte 0x14 8.--15. 1. "EPID,Error Process Identification" newline hexmask.long.byte 0x14 4.--7. 1. "EMN,Error Master Number" bitfld.long 0x14 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,?,?,?,?,?,?" newline bitfld.long 0x14 0. "ERW,Error Read/Write" "0: Read,1: Write" group.long 0x480++0x7F line.long 0x0 "RGD8_WORD0,Region Descriptor 8. Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "RGD8_WORD1,Region Descriptor 8. Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "RGD8_WORD2,Region Descriptor 8. Word 2" bitfld.long 0x8 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x8 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x8 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x8 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x8 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x8 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x8 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x8 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x8 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x8 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0xC "RGD8_WORD3,Region Descriptor 8. Word 3" hexmask.long.byte 0xC 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0xC 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0xC 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x10 "RGD9_WORD0,Region Descriptor 9. Word 0" hexmask.long 0x10 5.--31. 1. "SRTADDR,Start Address" line.long 0x14 "RGD9_WORD1,Region Descriptor 9. Word 1" hexmask.long 0x14 5.--31. 1. "ENDADDR,End Address" line.long 0x18 "RGD9_WORD2,Region Descriptor 9. Word 2" bitfld.long 0x18 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x18 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x18 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x18 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x18 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x18 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x18 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x18 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x18 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x18 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x1C "RGD9_WORD3,Region Descriptor 9. Word 3" hexmask.long.byte 0x1C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x1C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x1C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x20 "RGD10_WORD0,Region Descriptor 10. Word 0" hexmask.long 0x20 5.--31. 1. "SRTADDR,Start Address" line.long 0x24 "RGD10_WORD1,Region Descriptor 10. Word 1" hexmask.long 0x24 5.--31. 1. "ENDADDR,End Address" line.long 0x28 "RGD10_WORD2,Region Descriptor 10. Word 2" bitfld.long 0x28 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x28 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x28 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x28 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x28 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x28 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x28 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x28 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x28 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x28 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x28 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x28 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x28 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x28 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x28 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x28 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x2C "RGD10_WORD3,Region Descriptor 10. Word 3" hexmask.long.byte 0x2C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x2C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x2C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x30 "RGD11_WORD0,Region Descriptor 11. Word 0" hexmask.long 0x30 5.--31. 1. "SRTADDR,Start Address" line.long 0x34 "RGD11_WORD1,Region Descriptor 11. Word 1" hexmask.long 0x34 5.--31. 1. "ENDADDR,End Address" line.long 0x38 "RGD11_WORD2,Region Descriptor 11. Word 2" bitfld.long 0x38 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x38 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x38 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x38 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x38 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x38 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x38 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x38 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x38 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x38 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x38 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x38 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x38 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x38 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x38 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x38 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x3C "RGD11_WORD3,Region Descriptor 11. Word 3" hexmask.long.byte 0x3C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x3C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x3C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x40 "RGD12_WORD0,Region Descriptor 12. Word 0" hexmask.long 0x40 5.--31. 1. "SRTADDR,Start Address" line.long 0x44 "RGD12_WORD1,Region Descriptor 12. Word 1" hexmask.long 0x44 5.--31. 1. "ENDADDR,End Address" line.long 0x48 "RGD12_WORD2,Region Descriptor 12. Word 2" bitfld.long 0x48 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x48 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x48 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x48 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x48 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x48 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x48 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x48 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x48 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x48 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x48 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x48 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x48 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x48 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x48 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x48 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x4C "RGD12_WORD3,Region Descriptor 12. Word 3" hexmask.long.byte 0x4C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x4C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x4C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x50 "RGD13_WORD0,Region Descriptor 13. Word 0" hexmask.long 0x50 5.--31. 1. "SRTADDR,Start Address" line.long 0x54 "RGD13_WORD1,Region Descriptor 13. Word 1" hexmask.long 0x54 5.--31. 1. "ENDADDR,End Address" line.long 0x58 "RGD13_WORD2,Region Descriptor 13. Word 2" bitfld.long 0x58 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x58 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x58 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x58 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x58 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x58 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x58 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x58 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x58 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x58 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x58 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x58 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x58 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x58 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x58 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x58 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x5C "RGD13_WORD3,Region Descriptor 13. Word 3" hexmask.long.byte 0x5C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x5C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x5C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x60 "RGD14_WORD0,Region Descriptor 14. Word 0" hexmask.long 0x60 5.--31. 1. "SRTADDR,Start Address" line.long 0x64 "RGD14_WORD1,Region Descriptor 14. Word 1" hexmask.long 0x64 5.--31. 1. "ENDADDR,End Address" line.long 0x68 "RGD14_WORD2,Region Descriptor 14. Word 2" bitfld.long 0x68 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x68 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x68 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x68 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x68 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x68 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x68 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x68 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x68 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x68 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x68 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x68 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x68 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x68 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x68 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x68 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x6C "RGD14_WORD3,Region Descriptor 14. Word 3" hexmask.long.byte 0x6C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x6C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x6C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x70 "RGD15_WORD0,Region Descriptor 15. Word 0" hexmask.long 0x70 5.--31. 1. "SRTADDR,Start Address" line.long 0x74 "RGD15_WORD1,Region Descriptor 15. Word 1" hexmask.long 0x74 5.--31. 1. "ENDADDR,End Address" line.long 0x78 "RGD15_WORD2,Region Descriptor 15. Word 2" bitfld.long 0x78 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x78 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x78 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x78 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x78 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x78 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x78 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x78 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x78 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x78 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x78 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x78 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x78 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x78 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x78 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x78 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x78 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x78 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x7C "RGD15_WORD3,Region Descriptor 15. Word 3" hexmask.long.byte 0x7C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x7C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x7C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" endif group.long 0x400++0x7F line.long 0x0 "RGD0_WORD0,Region Descriptor 0. Word 0" hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address" line.long 0x4 "RGD0_WORD1,Region Descriptor 0. Word 1" hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address" line.long 0x8 "RGD0_WORD2,Region Descriptor 0. Word 2" bitfld.long 0x8 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x8 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x8 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x8 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x8 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x8 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x8 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x8 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x8 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x8 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x8 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x8 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0xC "RGD0_WORD3,Region Descriptor 0. Word 3" hexmask.long.byte 0xC 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0xC 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0xC 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x10 "RGD1_WORD0,Region Descriptor 1. Word 0" hexmask.long 0x10 5.--31. 1. "SRTADDR,Start Address" line.long 0x14 "RGD1_WORD1,Region Descriptor 1. Word 1" hexmask.long 0x14 5.--31. 1. "ENDADDR,End Address" line.long 0x18 "RGD1_WORD2,Region Descriptor 1. Word 2" bitfld.long 0x18 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x18 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x18 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x18 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x18 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x18 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x18 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x18 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x18 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x18 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x18 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x18 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x1C "RGD1_WORD3,Region Descriptor 1. Word 3" hexmask.long.byte 0x1C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x1C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x1C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x20 "RGD2_WORD0,Region Descriptor 2. Word 0" hexmask.long 0x20 5.--31. 1. "SRTADDR,Start Address" line.long 0x24 "RGD2_WORD1,Region Descriptor 2. Word 1" hexmask.long 0x24 5.--31. 1. "ENDADDR,End Address" line.long 0x28 "RGD2_WORD2,Region Descriptor 2. Word 2" bitfld.long 0x28 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x28 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x28 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x28 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x28 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x28 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x28 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x28 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x28 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x28 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x28 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x28 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x28 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x28 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x28 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x28 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x28 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x28 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x28 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x28 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x28 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x28 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x28 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x28 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x28 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x28 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x28 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x28 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x28 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x28 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x28 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x28 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x28 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x2C "RGD2_WORD3,Region Descriptor 2. Word 3" hexmask.long.byte 0x2C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x2C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x2C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x30 "RGD3_WORD0,Region Descriptor 3. Word 0" hexmask.long 0x30 5.--31. 1. "SRTADDR,Start Address" line.long 0x34 "RGD3_WORD1,Region Descriptor 3. Word 1" hexmask.long 0x34 5.--31. 1. "ENDADDR,End Address" line.long 0x38 "RGD3_WORD2,Region Descriptor 3. Word 2" bitfld.long 0x38 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x38 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x38 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x38 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x38 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x38 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x38 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x38 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x38 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x38 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x38 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x38 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x38 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x38 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x38 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x38 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x38 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x38 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x38 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x38 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x38 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x38 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x38 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x38 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x38 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x38 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x38 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x38 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x38 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x38 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x38 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x38 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x38 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x3C "RGD3_WORD3,Region Descriptor 3. Word 3" hexmask.long.byte 0x3C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x3C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x3C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x40 "RGD4_WORD0,Region Descriptor 4. Word 0" hexmask.long 0x40 5.--31. 1. "SRTADDR,Start Address" line.long 0x44 "RGD4_WORD1,Region Descriptor 4. Word 1" hexmask.long 0x44 5.--31. 1. "ENDADDR,End Address" line.long 0x48 "RGD4_WORD2,Region Descriptor 4. Word 2" bitfld.long 0x48 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x48 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x48 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x48 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x48 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x48 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x48 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x48 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x48 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x48 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x48 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x48 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x48 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x48 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x48 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x48 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x48 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x48 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x48 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x48 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x48 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x48 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x48 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x48 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x48 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x48 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x48 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x48 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x48 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x48 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x48 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x48 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x48 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x4C "RGD4_WORD3,Region Descriptor 4. Word 3" hexmask.long.byte 0x4C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x4C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x4C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x50 "RGD5_WORD0,Region Descriptor 5. Word 0" hexmask.long 0x50 5.--31. 1. "SRTADDR,Start Address" line.long 0x54 "RGD5_WORD1,Region Descriptor 5. Word 1" hexmask.long 0x54 5.--31. 1. "ENDADDR,End Address" line.long 0x58 "RGD5_WORD2,Region Descriptor 5. Word 2" bitfld.long 0x58 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x58 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x58 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x58 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x58 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x58 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x58 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x58 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x58 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x58 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x58 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x58 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x58 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x58 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x58 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x58 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x58 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x58 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x58 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x58 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x58 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x58 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x58 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x58 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x58 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x58 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x58 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x58 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x58 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x58 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x58 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x58 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x58 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x5C "RGD5_WORD3,Region Descriptor 5. Word 3" hexmask.long.byte 0x5C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x5C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x5C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x60 "RGD6_WORD0,Region Descriptor 6. Word 0" hexmask.long 0x60 5.--31. 1. "SRTADDR,Start Address" line.long 0x64 "RGD6_WORD1,Region Descriptor 6. Word 1" hexmask.long 0x64 5.--31. 1. "ENDADDR,End Address" line.long 0x68 "RGD6_WORD2,Region Descriptor 6. Word 2" bitfld.long 0x68 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x68 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x68 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x68 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x68 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x68 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x68 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x68 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x68 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x68 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x68 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x68 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x68 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x68 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x68 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x68 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x68 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x68 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x68 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x68 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x68 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x68 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x68 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x68 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x68 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x68 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x68 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x68 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x68 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x68 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x68 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x68 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x68 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x6C "RGD6_WORD3,Region Descriptor 6. Word 3" hexmask.long.byte 0x6C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x6C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x6C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" line.long 0x70 "RGD7_WORD0,Region Descriptor 7. Word 0" hexmask.long 0x70 5.--31. 1. "SRTADDR,Start Address" line.long 0x74 "RGD7_WORD1,Region Descriptor 7. Word 1" hexmask.long 0x74 5.--31. 1. "ENDADDR,End Address" line.long 0x78 "RGD7_WORD2,Region Descriptor 7. Word 2" bitfld.long 0x78 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x78 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x78 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x78 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x78 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x78 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x78 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x78 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x78 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x78 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x78 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x78 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x78 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x78 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x78 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x78 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x78 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x78 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x78 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x78 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x78 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x78 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x78 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x78 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x78 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x78 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x78 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x78 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x78 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x78 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x78 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x78 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x78 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x7C "RGD7_WORD3,Region Descriptor 7. Word 3" hexmask.long.byte 0x7C 24.--31. 1. "PID,Process Identifier" hexmask.long.byte 0x7C 16.--23. 1. "PIDMASK,Process Identifier Mask" newline bitfld.long 0x7C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid" group.long 0x800++0x1F line.long 0x0 "RGDAAC0,Region Descriptor Alternate Access Control 0" bitfld.long 0x0 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x0 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x0 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x0 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x0 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x0 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x0 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x0 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x0 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x0 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x0 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x0 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x0 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x0 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x0 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x0 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x0 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x0 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x0 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x0 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x0 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x0 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x0 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x0 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x0 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x0 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x4 "RGDAAC1,Region Descriptor Alternate Access Control 1" bitfld.long 0x4 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x4 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x4 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x4 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x4 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x4 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x4 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x4 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x4 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x4 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x4 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x4 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x4 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x4 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x4 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x4 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x4 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x4 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x4 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x4 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x4 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x4 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x4 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x4 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x4 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x4 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x4 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x4 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x4 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x4 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x4 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x4 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x8 "RGDAAC2,Region Descriptor Alternate Access Control 2" bitfld.long 0x8 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x8 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x8 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x8 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x8 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x8 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x8 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x8 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x8 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x8 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x8 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x8 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0xC "RGDAAC3,Region Descriptor Alternate Access Control 3" bitfld.long 0xC 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0xC 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0xC 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0xC 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0xC 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0xC 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0xC 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0xC 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0xC 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0xC 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0xC 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0xC 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0xC 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0xC 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0xC 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0xC 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0xC 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0xC 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0xC 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0xC 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0xC 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0xC 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0xC 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0xC 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0xC 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0xC 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0xC 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0xC 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0xC 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0xC 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0xC 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0xC 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x10 "RGDAAC4,Region Descriptor Alternate Access Control 4" bitfld.long 0x10 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x10 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x10 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x10 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x10 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x10 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x10 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x10 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x10 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x10 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x10 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x10 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x10 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x10 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x10 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x10 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x10 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x10 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x10 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x10 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x10 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x10 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x10 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x10 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x10 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x10 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x10 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x10 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x10 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x10 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x10 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x10 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x14 "RGDAAC5,Region Descriptor Alternate Access Control 5" bitfld.long 0x14 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x14 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x14 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x14 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x14 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x14 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x14 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x14 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x14 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x14 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x14 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x14 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x14 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x14 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x14 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x14 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x14 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x14 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x14 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x14 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x14 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x14 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x14 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x14 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x14 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x14 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x14 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x14 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x14 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x14 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x14 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x14 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x18 "RGDAAC6,Region Descriptor Alternate Access Control 6" bitfld.long 0x18 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x18 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x18 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x18 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x18 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x18 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x18 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x18 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x18 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x18 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x18 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x18 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x1C "RGDAAC7,Region Descriptor Alternate Access Control 7" bitfld.long 0x1C 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x1C 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x1C 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x1C 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x1C 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x1C 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x1C 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x1C 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x1C 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x1C 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x1C 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x1C 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x1C 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x1C 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x1C 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x1C 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x1C 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x1C 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x1C 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif bitfld.long 0x1C 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline sif (cpuis("S32K144*")) bitfld.long 0x1C 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x1C 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x1C 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x1C 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x1C 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x1C 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K142*")) bitfld.long 0x1C 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." endif bitfld.long 0x1C 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." sif (cpuis("S32K144*")) bitfld.long 0x1C 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x1C 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x1C 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline endif bitfld.long 0x1C 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" sif (cpuis("S32K148*")) group.long 0x820++0x1F line.long 0x0 "RGDAAC8,Region Descriptor Alternate Access Control 8" bitfld.long 0x0 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x0 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x0 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x0 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x0 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x0 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x0 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x0 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x0 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x0 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x0 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x0 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x0 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x0 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x0 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x4 "RGDAAC9,Region Descriptor Alternate Access Control 9" bitfld.long 0x4 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x4 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x4 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x4 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x4 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x4 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x4 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x4 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x4 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x4 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x4 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x4 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x4 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x4 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x4 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x8 "RGDAAC10,Region Descriptor Alternate Access Control 10" bitfld.long 0x8 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x8 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x8 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x8 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x8 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x8 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x8 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x8 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x8 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x8 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x8 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0xC "RGDAAC11,Region Descriptor Alternate Access Control 11" bitfld.long 0xC 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0xC 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0xC 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0xC 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0xC 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0xC 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0xC 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0xC 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0xC 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0xC 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0xC 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0xC 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0xC 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0xC 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0xC 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0xC 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x10 "RGDAAC12,Region Descriptor Alternate Access Control 12" bitfld.long 0x10 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x10 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x10 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x10 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x10 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x10 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x10 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x10 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x10 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x10 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x10 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x10 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x10 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x10 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x10 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x10 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x14 "RGDAAC13,Region Descriptor Alternate Access Control 13" bitfld.long 0x14 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x14 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x14 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x14 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x14 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x14 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x14 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x14 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x14 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x14 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x14 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x14 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x14 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x14 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x14 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x14 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x18 "RGDAAC14,Region Descriptor Alternate Access Control 14" bitfld.long 0x18 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x18 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x18 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x18 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x18 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x18 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x18 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x18 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x18 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x18 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x18 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" line.long 0x1C "RGDAAC15,Region Descriptor Alternate Access Control 15" bitfld.long 0x1C 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed" bitfld.long 0x1C 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed" newline bitfld.long 0x1C 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed" bitfld.long 0x1C 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed" newline bitfld.long 0x1C 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed" bitfld.long 0x1C 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed" newline bitfld.long 0x1C 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed" bitfld.long 0x1C 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed" newline bitfld.long 0x1C 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x1C 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x1C 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." bitfld.long 0x1C 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" newline bitfld.long 0x1C 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.." newline bitfld.long 0x1C 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,?,?" bitfld.long 0x1C 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7" endif tree.end tree "MSCM (Miscellaneous System Control Module)" base ad:0x40001000 rgroup.long 0x0++0x3F line.long 0x0 "CPxTYPE,Processor X Type Register" hexmask.long.tbyte 0x0 8.--31. 1. "PERSONALITY,Processor x Personality" hexmask.long.byte 0x0 0.--7. 1. "RYPZ,Processor x Revision" line.long 0x4 "CPxNUM,Processor X Number Register" bitfld.long 0x4 0. "CPN,Processor x Number" "0,1" line.long 0x8 "CPxMASTER,Processor X Master Register" hexmask.long.byte 0x8 0.--5. 1. "PPMN,Processor x Physical Master Number" line.long 0xC "CPxCOUNT,Processor X Count Register" bitfld.long 0xC 0.--1. "PCNT,Processor Count" "0,1,2,3" line.long 0x10 "CPxCFG0,Processor X Configuration Register 0" hexmask.long.byte 0x10 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size" hexmask.long.byte 0x10 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways" newline hexmask.long.byte 0x10 8.--15. 1. "DCSZ,Level 1 Data Cache Size" hexmask.long.byte 0x10 0.--7. 1. "DCWY,Level 1 Data Cache Ways" line.long 0x14 "CPxCFG1,Processor X Configuration Register 1" hexmask.long.byte 0x14 24.--31. 1. "L2SZ,Level 2 Instruction Cache Size" hexmask.long.byte 0x14 16.--23. 1. "L2WY,Level 2 Instruction Cache Ways" line.long 0x18 "CPxCFG2,Processor X Configuration Register 2" hexmask.long.byte 0x18 24.--31. 1. "TMLSZ,Tightly-coupled Memory Lower Size" hexmask.long.byte 0x18 8.--15. 1. "TMUSZ,Tightly-coupled Memory Upper Size" line.long 0x1C "CPxCFG3,Processor X Configuration Register 3" bitfld.long 0x1C 8.--9. "SBP,System Bus Ports" "0,1,2,3" bitfld.long 0x1C 6. "BB,Bit Banding" "0: Bit Banding is not supported.,1: Bit Banding is supported." newline bitfld.long 0x1C 5. "CMP,Core Memory Protection unit" "0: Core Memory Protection is not included.,1: Core Memory Protection is included." bitfld.long 0x1C 4. "TZ,Trust Zone" "0: Trust Zone support is not included.,1: Trust Zone support is included." newline bitfld.long 0x1C 3. "MMU,Memory Management Unit" "0: MMU support is not included.,1: MMU support is included." bitfld.long 0x1C 2. "JAZ,Jazelle support" "0: Jazelle support is not included.,1: Jazelle support is included." newline bitfld.long 0x1C 1. "SIMD,SIMD/NEON instruction support" "0: SIMD/NEON support is not included.,1: SIMD/NEON support is included." bitfld.long 0x1C 0. "FPU,Floating Point Unit" "0: FPU support is not included.,1: FPU support is included." line.long 0x20 "CP0TYPE,Processor 0 Type Register" hexmask.long.tbyte 0x20 8.--31. 1. "PERSONALITY,Processor 0 Personality" hexmask.long.byte 0x20 0.--7. 1. "RYPZ,Processor 0 Revision" line.long 0x24 "CP0NUM,Processor 0 Number Register" bitfld.long 0x24 0. "CPN,Processor 0 Number" "0,1" line.long 0x28 "CP0MASTER,Processor 0 Master Register" hexmask.long.byte 0x28 0.--5. 1. "PPMN,Processor 0 Physical Master Number" line.long 0x2C "CP0COUNT,Processor 0 Count Register" bitfld.long 0x2C 0.--1. "PCNT,Processor Count" "0,1,2,3" line.long 0x30 "CP0CFG0,Processor 0 Configuration Register 0" hexmask.long.byte 0x30 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size" hexmask.long.byte 0x30 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways" newline hexmask.long.byte 0x30 8.--15. 1. "DCSZ,Level 1 Data Cache Size" hexmask.long.byte 0x30 0.--7. 1. "DCWY,Level 1 Data Cache Ways" line.long 0x34 "CP0CFG1,Processor 0 Configuration Register 1" hexmask.long.byte 0x34 24.--31. 1. "L2SZ,Level 2 Instruction Cache Size" hexmask.long.byte 0x34 16.--23. 1. "L2WY,Level 2 Instruction Cache Ways" line.long 0x38 "CP0CFG2,Processor 0 Configuration Register 2" hexmask.long.byte 0x38 24.--31. 1. "TMLSZ,Tightly-coupled Memory Lower Size" hexmask.long.byte 0x38 8.--15. 1. "TMUSZ,Tightly-coupled Memory Upper Size" line.long 0x3C "CP0CFG3,Processor 0 Configuration Register 3" bitfld.long 0x3C 8.--9. "SBP,System Bus Ports" "0,1,2,3" bitfld.long 0x3C 6. "BB,Bit Banding" "0: Bit Banding is not supported.,1: Bit Banding is supported." newline bitfld.long 0x3C 5. "CMP,Core Memory Protection unit" "0: Core Memory Protection is not included.,1: Core Memory Protection is included." bitfld.long 0x3C 4. "TZ,Trust Zone" "0: Trust Zone support is not included.,1: Trust Zone support is included." newline bitfld.long 0x3C 3. "MMU,Memory Management Unit" "0: MMU support is not included.,1: MMU support is included." bitfld.long 0x3C 2. "JAZ,Jazelle support" "0: Jazelle support is not included.,1: Jazelle support is included." newline bitfld.long 0x3C 1. "SIMD,SIMD/NEON instruction support" "0: SIMD/NEON support is not included.,1: SIMD/NEON support is included." bitfld.long 0x3C 0. "FPU,Floating Point Unit" "0: FPU support is not included.,1: FPU support is included." group.long 0x400++0xB line.long 0x0 "OCMDR0,On-Chip Memory Descriptor Register" rbitfld.long 0x0 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present." rbitfld.long 0x0 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x0 24.--27. 1. "OCMSZ,OCMSZ" rbitfld.long 0x0 17.--19. "OCMW,OCMW" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored" sif (cpuis("S32K116*")||cpuis("S32K118*")) rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4.--5. "OCM1,OCMEM Control Field 1" "0,1,2,3" endif sif (cpuis("S32K142*")) rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline endif sif (cpuis("S32K144*")) rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" endif sif (cpuis("S32K146*")) rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline endif sif (cpuis("S32K148*")) rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" endif rbitfld.long 0x0 12. "OCMPU,OCMPU" "0,1" newline sif (cpuis("S32K142*")) hexmask.long.byte 0x0 8.--11. 1. "OCM2,OCMEM Control Field 2" hexmask.long.byte 0x0 4.--7. 1. "OCM1,OCMEM Control Field 1" newline hexmask.long.byte 0x0 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K144*")) hexmask.long.byte 0x0 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x0 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x0 0.--3. 1. "OCM0,OCMEM Control Field 0" newline endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 8.--11. 1. "OCM2,OCMEM Control Field 2" hexmask.long.byte 0x0 4.--7. 1. "OCM1,OCMEM Control Field 1" newline hexmask.long.byte 0x0 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x0 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x0 0.--3. 1. "OCM0,OCMEM Control Field 0" endif line.long 0x4 "OCMDR1,On-Chip Memory Descriptor Register" rbitfld.long 0x4 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present." rbitfld.long 0x4 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x4 24.--27. 1. "OCMSZ,OCMSZ" rbitfld.long 0x4 17.--19. "OCMW,OCMW" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored" sif (cpuis("S32K116*")||cpuis("S32K118*")) rbitfld.long 0x4 13.--15. "OCMT,OCMT" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 4.--5. "OCM1,OCMEM Control Field 1" "0,1,2,3" endif sif (cpuis("S32K142*")) rbitfld.long 0x4 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline endif sif (cpuis("S32K144*")) rbitfld.long 0x4 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" endif sif (cpuis("S32K146*")) rbitfld.long 0x4 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline endif sif (cpuis("S32K148*")) rbitfld.long 0x4 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" endif rbitfld.long 0x4 12. "OCMPU,OCMPU" "0,1" newline sif (cpuis("S32K142*")) hexmask.long.byte 0x4 8.--11. 1. "OCM2,OCMEM Control Field 2" hexmask.long.byte 0x4 4.--7. 1. "OCM1,OCMEM Control Field 1" newline hexmask.long.byte 0x4 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K144*")) hexmask.long.byte 0x4 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x4 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x4 0.--3. 1. "OCM0,OCMEM Control Field 0" newline endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 8.--11. 1. "OCM2,OCMEM Control Field 2" hexmask.long.byte 0x4 4.--7. 1. "OCM1,OCMEM Control Field 1" newline hexmask.long.byte 0x4 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x4 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x4 0.--3. 1. "OCM0,OCMEM Control Field 0" endif line.long 0x8 "OCMDR2,On-Chip Memory Descriptor Register" rbitfld.long 0x8 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present." rbitfld.long 0x8 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x8 24.--27. 1. "OCMSZ,OCMSZ" rbitfld.long 0x8 17.--19. "OCMW,OCMW" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored" sif (cpuis("S32K116*")||cpuis("S32K118*")) rbitfld.long 0x8 13.--15. "OCMT,OCMT" "0,1,2,3,4,5,6,7" newline endif sif (cpuis("S32K142*")) rbitfld.long 0x8 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" endif sif (cpuis("S32K144*")) rbitfld.long 0x8 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline endif sif (cpuis("S32K146*")) rbitfld.long 0x8 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" endif sif (cpuis("S32K148*")) rbitfld.long 0x8 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline endif rbitfld.long 0x8 12. "OCMPU,OCMPU" "0,1" sif (cpuis("S32K142*")) hexmask.long.byte 0x8 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x8 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x8 0.--3. 1. "OCM0,OCMEM Control Field 0" newline endif sif (cpuis("S32K144*")) hexmask.long.byte 0x8 8.--11. 1. "OCM2,OCMEM Control Field 2" hexmask.long.byte 0x8 4.--7. 1. "OCM1,OCMEM Control Field 1" newline hexmask.long.byte 0x8 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x8 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x8 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x8 0.--3. 1. "OCM0,OCMEM Control Field 0" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x8 8.--11. 1. "OCM2,OCMEM Control Field 2" hexmask.long.byte 0x8 4.--7. 1. "OCM1,OCMEM Control Field 1" newline hexmask.long.byte 0x8 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K142*")) group.long 0x40C++0x3 line.long 0x0 "OCMDR3,On-Chip Memory Descriptor Register" rbitfld.long 0x0 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present." rbitfld.long 0x0 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x0 24.--27. 1. "OCMSZ,OCMSZ" rbitfld.long 0x0 17.--19. "OCMW,OCMW" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored" rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline rbitfld.long 0x0 12. "OCMPU,OCMPU" "0,1" hexmask.long.byte 0x0 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x0 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x0 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K144*")) group.long 0x40C++0x3 line.long 0x0 "OCMDR3,On-Chip Memory Descriptor Register" rbitfld.long 0x0 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present." rbitfld.long 0x0 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x0 24.--27. 1. "OCMSZ,OCMSZ" rbitfld.long 0x0 17.--19. "OCMW,OCMW" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored" rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline rbitfld.long 0x0 12. "OCMPU,OCMPU" "0,1" hexmask.long.byte 0x0 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x0 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x0 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K146*")) group.long 0x40C++0x3 line.long 0x0 "OCMDR3,On-Chip Memory Descriptor Register" rbitfld.long 0x0 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present." rbitfld.long 0x0 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x0 24.--27. 1. "OCMSZ,OCMSZ" rbitfld.long 0x0 17.--19. "OCMW,OCMW" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored" rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline rbitfld.long 0x0 12. "OCMPU,OCMPU" "0,1" hexmask.long.byte 0x0 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x0 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x0 0.--3. 1. "OCM0,OCMEM Control Field 0" endif sif (cpuis("S32K148*")) group.long 0x40C++0x3 line.long 0x0 "OCMDR3,On-Chip Memory Descriptor Register" rbitfld.long 0x0 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present." rbitfld.long 0x0 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.." newline hexmask.long.byte 0x0 24.--27. 1. "OCMSZ,OCMSZ" rbitfld.long 0x0 17.--19. "OCMW,OCMW" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored" rbitfld.long 0x0 13.--15. "OCMT,OCMT" "0: OCMEMn is a System RAM.,1: OCMEMn is a Graphics RAM.,?,?,?,?,?,?" newline rbitfld.long 0x0 12. "OCMPU,OCMPU" "0,1" hexmask.long.byte 0x0 8.--11. 1. "OCM2,OCMEM Control Field 2" newline hexmask.long.byte 0x0 4.--7. 1. "OCM1,OCMEM Control Field 1" hexmask.long.byte 0x0 0.--3. 1. "OCM0,OCMEM Control Field 0" endif tree.end tree "PCC (Peripheral Clock Controller)" base ad:0x40065000 group.long 0x80++0x7 line.long 0x0 "PCC_FTFC,PCC FTFC Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_DMAMUX,PCC DMAMUX Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0x90++0x3 line.long 0x0 "PCC_FlexCAN0,PCC FlexCAN0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." sif (cpuis("S32K142*")) group.long 0x94++0xB line.long 0x0 "PCC_FlexCAN1,PCC FlexCAN1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_FTM3,PCC FTM3 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0x8 "PCC_ADC1,PCC ADC1 Register" rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xB4++0x3 line.long 0x0 "PCC_LPSPI1,PCC LPSPI1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xC4++0x3 line.long 0x0 "PCC_PDB1,PCC PDB1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0xE8++0x3 line.long 0x0 "PCC_FTM2,PCC FTM2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" group.long 0x184++0x3 line.long 0x0 "PCC_EWM,PCC EWM Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." endif sif (cpuis("S32K144*")) group.long 0x94++0xB line.long 0x0 "PCC_FlexCAN1,PCC FlexCAN1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_FTM3,PCC FTM3 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0x8 "PCC_ADC1,PCC ADC1 Register" rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xAC++0x3 line.long 0x0 "PCC_FlexCAN2,PCC FlexCAN2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0xB4++0x7 line.long 0x0 "PCC_LPSPI1,PCC LPSPI1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" line.long 0x4 "PCC_LPSPI2,PCC LPSPI2 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xC4++0x3 line.long 0x0 "PCC_PDB1,PCC PDB1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0xE8++0x3 line.long 0x0 "PCC_FTM2,PCC FTM2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" group.long 0x168++0x3 line.long 0x0 "PCC_FLEXIO,PCC FlexIO Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0x184++0x3 line.long 0x0 "PCC_EWM,PCC EWM Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0x1B0++0x3 line.long 0x0 "PCC_LPUART2,PCC LPUART2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" endif sif (cpuis("S32K146*")) group.long 0x94++0xB line.long 0x0 "PCC_FlexCAN1,PCC FlexCAN1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_FTM3,PCC FTM3 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0x8 "PCC_ADC1,PCC ADC1 Register" rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xAC++0x3 line.long 0x0 "PCC_FlexCAN2,PCC FlexCAN2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0xB4++0x7 line.long 0x0 "PCC_LPSPI1,PCC LPSPI1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" line.long 0x4 "PCC_LPSPI2,PCC LPSPI2 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xC4++0x3 line.long 0x0 "PCC_PDB1,PCC PDB1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0xE8++0x3 line.long 0x0 "PCC_FTM2,PCC FTM2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" group.long 0x168++0x3 line.long 0x0 "PCC_FlexIO,PCC FlexIO Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0x184++0x3 line.long 0x0 "PCC_EWM,PCC EWM Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0x1B0++0x3 line.long 0x0 "PCC_LPUART2,PCC LPUART2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0x1B8++0x7 line.long 0x0 "PCC_FTM4,PCC FTM4 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0x4 "PCC_FTM5,PCC FTM5 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" endif sif (cpuis("S32K148*")) group.long 0x94++0xB line.long 0x0 "PCC_FlexCAN1,PCC FlexCAN1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_FTM3,PCC FTM3 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0x8 "PCC_ADC1,PCC ADC1 Register" rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xAC++0x3 line.long 0x0 "PCC_FlexCAN2,PCC FlexCAN2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0xB4++0x7 line.long 0x0 "PCC_LPSPI1,PCC LPSPI1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" line.long 0x4 "PCC_LPSPI2,PCC LPSPI2 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xC4++0x3 line.long 0x0 "PCC_PDB1,PCC PDB1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0xE8++0x3 line.long 0x0 "PCC_FTM2,PCC FTM2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" group.long 0x150++0x7 line.long 0x0 "PCC_SAI0,PCC SAI0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_SAI1,PCC SAI1 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0x168++0x3 line.long 0x0 "PCC_FlexIO,PCC FlexIO Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0x184++0x3 line.long 0x0 "PCC_EWM,PCC EWM Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0x19C++0x3 line.long 0x0 "PCC_LPI2C1,PCC LPI2C1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0x1B0++0x3 line.long 0x0 "PCC_LPUART2,PCC LPUART2 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0x1B8++0xF line.long 0x0 "PCC_FTM4,PCC FTM4 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0x4 "PCC_FTM5,PCC FTM5 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0x8 "PCC_FTM6,PCC FTM6 Register" rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0xC "PCC_FTM7,PCC FTM7 Register" rbitfld.long 0xC 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0xC 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0xC 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" endif group.long 0xB0++0x3 line.long 0x0 "PCC_LPSPI0,PCC LPSPI0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" sif (cpuis("S32K118*")) group.long 0xB4++0x3 line.long 0x0 "PCC_LPSPI1,PCC LPSPI1 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" endif group.long 0xC8++0x3 line.long 0x0 "PCC_CRC,PCC CRC Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0xD8++0xF line.long 0x0 "PCC_PDB0,PCC PDB0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_LPIT,PCC LPIT Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" line.long 0x8 "PCC_FTM0,PCC FTM0 Register" rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" line.long 0xC "PCC_FTM1,PCC FTM1 Register" rbitfld.long 0xC 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0xC 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0xC 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,?,?,?,?,?,?" group.long 0xEC++0x3 line.long 0x0 "PCC_ADC0,PCC ADC0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0xF4++0x3 line.long 0x0 "PCC_RTC,PCC RTC Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." sif (cpuis("S32K116*")||cpuis("S32K118*")) group.long 0xF8++0x7 line.long 0x0 "PCC_CMU0,PCC CMU0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_CMU1,PCC CMU1 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." endif group.long 0x100++0x3 line.long 0x0 "PCC_LPTMR0,PCC LPTMR0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x0 4. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0.,1: Fractional value is 1." newline hexmask.long.byte 0x0 0.--3. 1. "PCD,Peripheral Clock Divider Select" endif sif (cpuis("S32K146*")) bitfld.long 0x0 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0.,1: Fractional value is 1." newline bitfld.long 0x0 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" endif sif (cpuis("S32K148*")) bitfld.long 0x0 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0.,1: Fractional value is 1." newline bitfld.long 0x0 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" endif sif (cpuis("S32K144*")) bitfld.long 0x0 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0.,1: Fractional value is 1." newline bitfld.long 0x0 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" endif group.long 0x124++0x13 line.long 0x0 "PCC_PORTA,PCC PORTA Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x4 "PCC_PORTB,PCC PORTB Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x8 "PCC_PORTC,PCC PORTC Register" rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0xC "PCC_PORTD,PCC PORTD Register" rbitfld.long 0xC 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0xC 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." line.long 0x10 "PCC_PORTE,PCC PORTE Register" rbitfld.long 0x10 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x10 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) group.long 0x168++0x3 line.long 0x0 "PCC_FlexIO,PCC FlexIO Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" endif group.long 0x198++0x3 line.long 0x0 "PCC_LPI2C0,PCC LPI2C0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0x1A8++0x7 line.long 0x0 "PCC_LPUART0,PCC LPUART0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" line.long 0x4 "PCC_LPUART1,PCC LPUART1 Register" rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" group.long 0x1CC++0x3 line.long 0x0 "PCC_CMP0,PCC CMP0 Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." sif (cpuis("S32K148*")) group.long 0x1D8++0x3 line.long 0x0 "PCC_QSPI,PCC QSPI Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." group.long 0x1E4++0x3 line.long 0x0 "PCC_ENET,PCC ENET Register" rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present." bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled,1: Clock enabled. The current clock selection and.." newline bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,?,?,?,?,?,?" bitfld.long 0x0 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0.,1: Fractional value is 1." newline bitfld.long 0x0 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1.,1: Divide by 2.,?,?,?,?,?,?" endif tree.end sif (cpuis("S32K116*")||cpuis("S32K118*")) base ad:0x40036000 elif (cpuis("S32K142*")||cpuis("S32K144*")||cpuis("S32K146*")||cpuis("S32K148*")) base ad:0x0 endif tree "PDB (Programmable Delay Block)" sif (cpuis("S32K116*")||cpuis("S32K118*")) group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB0_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB0_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" endif sif (cpuis("S32K142*")) tree "PDB1" base ad:0x40031000 group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB1_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB1_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" tree.end endif sif (cpuis("S32K144*")) tree "PDB1" base ad:0x40031000 group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB1_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB1_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" tree.end endif sif (cpuis("S32K146*")) tree "PDB1" base ad:0x40031000 group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB1_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB1_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" tree.end endif sif (cpuis("S32K148*")) tree "PDB1" base ad:0x40031000 group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB1_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB1_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" tree.end endif sif (cpuis("S32K142*")) tree "PDB0" base ad:0x40036000 group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB0_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB0_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" tree.end endif sif (cpuis("S32K144*")) tree "PDB0" base ad:0x40036000 group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB0_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB0_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" tree.end endif sif (cpuis("S32K146*")) tree "PDB0" base ad:0x40036000 group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB0_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB0_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" tree.end endif sif (cpuis("S32K148*")) tree "PDB0" base ad:0x40036000 group.long 0x0++0x7 line.long 0x0 "SC,Status and Control register" bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,?,?" bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled." newline bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1" bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled." newline bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,?,?,?,?,?,?" hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select" newline bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled." bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1" newline bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled." bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,?,?" newline bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode" bitfld.long 0x0 0. "LDOK,Load OK" "0,1" line.long 0x4 "MOD,Modulus register" hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus" rgroup.long 0x8++0x3 line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter" group.long 0xC++0x3 line.long 0x0 "IDLY,Interrupt Delay register" hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay" repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x10)++0x3 line.long 0x0 "CH$1C1,Channel n Control register 1" hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable" hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select" newline hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x14)++0x3 line.long 0x0 "CH$1S,Channel n Status register" hexmask.long.byte 0x0 16.--23. 1. "CF,PDB Channel Flags" hexmask.long.byte 0x0 0.--7. 1. "ERR,PDB Channel Sequence Error Flags" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x18)++0x3 line.long 0x0 "CH$1DLY0,Channel n Delay 0 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x1C)++0x3 line.long 0x0 "CH$1DLY1,Channel n Delay 1 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x20)++0x3 line.long 0x0 "CH$1DLY2,Channel n Delay 2 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x24)++0x3 line.long 0x0 "CH$1DLY3,Channel n Delay 3 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x28)++0x3 line.long 0x0 "CH$1DLY4,Channel n Delay 4 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x2C)++0x3 line.long 0x0 "CH$1DLY5,Channel n Delay 5 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x30)++0x3 line.long 0x0 "CH$1DLY6,Channel n Delay 6 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x28) group.long ($2+0x34)++0x3 line.long 0x0 "CH$1DLY7,Channel n Delay 7 register" hexmask.long.word 0x0 0.--15. 1. "DLY,PDB Channel Delay" repeat.end group.long 0x190++0x7 line.long 0x0 "POEN,Pulse-Out n Enable register" hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable" line.long 0x4 "PODLY,Pulse-Out n Delay register" hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1" hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2" group.word 0x194++0x3 line.word 0x0 "DLY2,PDB0_DLY2 register." hexmask.word 0x0 0.--15. 1. "DLY2,DLY2" line.word 0x2 "DLY1,PDB0_DLY1 register." hexmask.word 0x2 0.--15. 1. "DLY1,DLY1" tree.end endif tree.end tree "PMC (Power Management Controller)" base ad:0x4007D000 group.byte 0x0++0x2 line.byte 0x0 "LVDSC1,Low Voltage Detect Status and Control 1 Register" rbitfld.byte 0x0 7. "LVDF,Low Voltage Detect Flag" "0: Low-voltage event not detected,1: Low-voltage event detected" bitfld.byte 0x0 6. "LVDACK,Low Voltage Detect Acknowledge" "0,1" newline bitfld.byte 0x0 5. "LVDIE,Low Voltage Detect Interrupt Enable" "0: Hardware interrupt disabled (use polling),1: Request a hardware interrupt when LVDF = 1" bitfld.byte 0x0 4. "LVDRE,Low Voltage Detect Reset Enable" "0: No system resets on low voltage detect events.,?" line.byte 0x1 "LVDSC2,Low Voltage Detect Status and Control 2 Register" rbitfld.byte 0x1 7. "LVWF,Low-Voltage Warning Flag" "0: Low-voltage warning event not detected,1: Low-voltage warning event detected" bitfld.byte 0x1 6. "LVWACK,Low-Voltage Warning Acknowledge" "0,1" newline bitfld.byte 0x1 5. "LVWIE,Low-Voltage Warning Interrupt Enable" "0: Hardware interrupt disabled (use polling),1: Request a hardware interrupt when LVWF=1" line.byte 0x2 "REGSC,Regulator Status and Control Register" bitfld.byte 0x2 7. "LPODIS,LPO Disable Bit" "0: Low power oscillator enabled,1: Low power oscillator disabled" rbitfld.byte 0x2 6. "LPOSTAT,LPO Status Bit" "0: Low power oscillator in low phase,1: Low power oscillator in high phase" newline rbitfld.byte 0x2 2. "REGFPM,Regulator in Full Performance Mode Status Bit" "0: Regulator is in low power mode or transition..,1: Regulator is in full performance mode" bitfld.byte 0x2 1. "CLKBIASDIS,Clock Bias Disable Bit" "0: No effect,1: In VLPS mode the bias currents and reference.." newline bitfld.byte 0x2 0. "BIASEN,Bias Enable Bit" "0: Biasing disabled core logic can run in full..,1: Biasing enabled core logic is slower and there.." group.byte 0x4++0x0 line.byte 0x0 "LPOTRIM,Low Power Oscillator Trim Register" hexmask.byte 0x0 0.--4. 1. "LPOTRIM,LPO trimming bits" tree.end tree "PORT" base ad:0x0 sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) tree "PORTA" base ad:0x40049000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.." bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end endif sif (cpuis("S32K146*")) tree "PORTA" base ad:0x40049000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.." bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end tree "PORTB" base ad:0x4004A000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end endif sif (cpuis("S32K148*")) tree "PORTA" base ad:0x40049000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.." bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end tree "PORTB" base ad:0x4004A000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end endif sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) tree "PORTB" base ad:0x4004A000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end endif tree "PORTC" base ad:0x4004B000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end tree "PORTD" base ad:0x4004C000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.." bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) tree "PORTE" base ad:0x4004D000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")) bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." endif bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end endif sif (cpuis("S32K146*")) tree "PORTE" base ad:0x4004D000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end endif sif (cpuis("S32K148*")) tree "PORTE" base ad:0x4004D000 group.long 0x0++0x7F line.long 0x0 "PCR0,Pin Control Register n" bitfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4 "PCR1,Pin Control Register n" bitfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.." bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." newline bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x8 "PCR2,Pin Control Register n" bitfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0xC "PCR3,Pin Control Register n" bitfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x10 "PCR4,Pin Control Register n" bitfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x14 "PCR5,Pin Control Register n" bitfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x18 "PCR6,Pin Control Register n" bitfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x1C "PCR7,Pin Control Register n" bitfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x20 "PCR8,Pin Control Register n" bitfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x24 "PCR9,Pin Control Register n" bitfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x28 "PCR10,Pin Control Register n" bitfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x2C "PCR11,Pin Control Register n" bitfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x30 "PCR12,Pin Control Register n" bitfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x34 "PCR13,Pin Control Register n" bitfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x38 "PCR14,Pin Control Register n" bitfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x3C "PCR15,Pin Control Register n" bitfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x40 "PCR16,Pin Control Register n" bitfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x44 "PCR17,Pin Control Register n" bitfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x48 "PCR18,Pin Control Register n" bitfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x4C "PCR19,Pin Control Register n" bitfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x50 "PCR20,Pin Control Register n" bitfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x54 "PCR21,Pin Control Register n" bitfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x58 "PCR22,Pin Control Register n" bitfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x5C "PCR23,Pin Control Register n" bitfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x60 "PCR24,Pin Control Register n" bitfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x64 "PCR25,Pin Control Register n" bitfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x68 "PCR26,Pin Control Register n" bitfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x6C "PCR27,Pin Control Register n" bitfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x70 "PCR28,Pin Control Register n" bitfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x74 "PCR29,Pin Control Register n" bitfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x78 "PCR30,Pin Control Register n" bitfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." line.long 0x7C "PCR31,Pin Control Register n" bitfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.." hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration" newline bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register fields [15:0] are not locked.,1: Pin Control Register fields [15:0] are locked.." bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,?,?,?,?,?,?" newline bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pullup or pulldown resistor is not..,1: Internal pullup or pulldown resistor is enabled.." bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.." wgroup.long 0x80++0xF line.long 0x0 "GPCLR,Global Pin Control Low Register" hexmask.long.word 0x0 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x0 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x4 "GPCHR,Global Pin Control High Register" hexmask.long.word 0x4 16.--31. 1. "GPWE,Global Pin Write Enable" hexmask.long.word 0x4 0.--15. 1. "GPWD,Global Pin Write Data" line.long 0x8 "GICLR,Global Interrupt Control Low Register" hexmask.long.word 0x8 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0x8 0.--15. 1. "GIWE,Global Interrupt Write Enable" line.long 0xC "GICHR,Global Interrupt Control High Register" hexmask.long.word 0xC 16.--31. 1. "GIWD,Global Interrupt Write Data" hexmask.long.word 0xC 0.--15. 1. "GIWE,Global Interrupt Write Enable" group.long 0xA0++0x3 line.long 0x0 "ISFR,Interrupt Status Flag Register" hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag" group.long 0xC0++0xB line.long 0x0 "DFER,Digital Filter Enable Register" hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable" line.long 0x4 "DFCR,Digital Filter Clock Register" bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the LPO clock." line.long 0x8 "DFWR,Digital Filter Width Register" hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length" tree.end endif tree.end sif (cpuis("S32K148*")) tree "QUADSPI (Quad Serial Peripheral Interface)" base ad:0x40076000 group.long 0x0++0x3 line.long 0x0 "MCR,Module Configuration Register" hexmask.long.byte 0x0 24.--31. 1. "SCLKCFG,Serial Clock Configuration" bitfld.long 0x0 19. "ISD3FB,Idle Signal Drive IOFB[3] Flash B" "0: IOFB[3] is driven to logic L,1: IOFB[3] is driven to logic H" newline bitfld.long 0x0 18. "ISD2FB,Idle Signal Drive IOFB[2] Flash B" "0: IOFB[2] is driven to logic L,1: IOFB[2] is driven to logic H" bitfld.long 0x0 17. "ISD3FA,Idle Signal Drive IOFA[3] Flash A" "0: IOFA[3] is driven to logic L,1: IOFA[3] is driven to logic H" newline bitfld.long 0x0 16. "ISD2FA,Idle Signal Drive IOFA[2] Flash A" "0: IOFA[2] is driven to logic L,1: IOFA[2] is driven to logic H" bitfld.long 0x0 15. "DOZE,Doze Enable" "0: A doze request will be ignored by the QuadSPI..,1: A doze request will be processed by the QuadSPI.." newline bitfld.long 0x0 14. "MDIS,Module Disable" "0: Enable QuadSPI clocks.,1: Allow external logic to disable QuadSPI clocks." bitfld.long 0x0 11. "CLR_TXF,Clear TX FIFO/Buffer. Invalidates the TX Buffer content. This is a self-clearing field." "0: No action.,1: Read and write pointers of the TX Buffer are.." newline bitfld.long 0x0 10. "CLR_RXF,Clear RX FIFO. Invalidates the RX Buffer. This is a self-clearing field." "0: No action.,1: Read and write pointers of the RX Buffer are.." bitfld.long 0x0 8. "VAR_LAT_EN,This field is used to enable variable latency feature in the controller" "0: Fixed latency: Twice + 1 latency enable,1: Variable latency: 'once' or 'twice + 1' the.." newline bitfld.long 0x0 7. "DDR_EN,DDR mode enable" "0: 2x clock are disabled for SDR instructions only,1: 2x clock are enabled supports both SDR and DDR.." bitfld.long 0x0 6. "DQS_EN,DQS enable" "0: DQS disabled.,1: DQS enabled. When enabled the incoming data is.." newline bitfld.long 0x0 5. "DQS_LAT_EN,DQS Latency Enable" "0: DQS Latency disabled,1: DQS feature with latency included enabled" bitfld.long 0x0 4. "DQS_OUT_EN,This field is valid when Data Strobe is also used as an output from controller during Write data phase" "0: DQS as an output from controller is disabled,1: DQS as an output from controller is enabled" newline bitfld.long 0x0 2.--3. "END_CFG,Defines the endianness of the QuadSPI module. For more details refer to Byte Ordering Endianess" "0,1,2,3" bitfld.long 0x0 1. "SWRSTHD,Software reset for AHB domain" "0: No action,1: AHB domain flops are reset. Does not reset.." newline bitfld.long 0x0 0. "SWRSTSD,Software reset for serial flash domain" "0: No action,1: Serial Flash domain flops are reset. Does not.." group.long 0x8++0x1F line.long 0x0 "IPCR,IP Configuration Register" hexmask.long.byte 0x0 24.--27. 1. "SEQID,Points to a sequence in the Look-up table" hexmask.long.word 0x0 0.--15. 1. "IDATSZ,IP data transfer size. Defines the data transfer size in bytes of the IP command." line.long 0x4 "FLSHCR,Flash Configuration Register" bitfld.long 0x4 16.--17. "TDH,Serial flash data in hold time" "0: Data aligned with the posedge of Internal..,1: Data aligned with 2x serial flash half clock,?,?" hexmask.long.byte 0x4 8.--11. 1. "TCSH,Serial flash CS hold time in terms of serial flash clock cycles" newline hexmask.long.byte 0x4 0.--3. 1. "TCSS,Serial flash CS setup time in terms of serial flash clock cycles" line.long 0x8 "BUF0CR,Buffer0 Configuration Register" bitfld.long 0x8 31. "HP_EN,High Priority Enable" "0,1" hexmask.long.byte 0x8 8.--15. 1. "ADATSZ,AHB data transfer size" newline hexmask.long.byte 0x8 0.--3. 1. "MSTRID,Master ID" line.long 0xC "BUF1CR,Buffer1 Configuration Register" hexmask.long.byte 0xC 8.--15. 1. "ADATSZ,AHB data transfer size" hexmask.long.byte 0xC 0.--3. 1. "MSTRID,Master ID" line.long 0x10 "BUF2CR,Buffer2 Configuration Register" hexmask.long.byte 0x10 8.--15. 1. "ADATSZ,AHB data transfer size" hexmask.long.byte 0x10 0.--3. 1. "MSTRID,Master ID" line.long 0x14 "BUF3CR,Buffer3 Configuration Register" bitfld.long 0x14 31. "ALLMST,All master enable" "0,1" hexmask.long.byte 0x14 8.--15. 1. "ADATSZ,AHB data transfer size" newline hexmask.long.byte 0x14 0.--3. 1. "MSTRID,Master ID" line.long 0x18 "BFGENCR,Buffer Generic Configuration Register" hexmask.long.byte 0x18 12.--15. 1. "SEQID,Points to a sequence in the Look-up-table" line.long 0x1C "SOCCR,SOC Configuration Register" hexmask.long 0x1C 0.--31. 1. "SOCCFG,SOC Configuration For details refer to chip-specific QuadSPI information." group.long 0x30++0xB line.long 0x0 "BUF0IND,Buffer0 Top Index Register" hexmask.long 0x0 3.--31. 1. "TPINDX0,Top index of buffer 0." line.long 0x4 "BUF1IND,Buffer1 Top Index Register" hexmask.long 0x4 3.--31. 1. "TPINDX1,Top index of buffer 1." line.long 0x8 "BUF2IND,Buffer2 Top Index Register" hexmask.long 0x8 3.--31. 1. "TPINDX2,Top index of buffer 2." group.long 0x100++0xB line.long 0x0 "SFAR,Serial Flash Address Register" hexmask.long 0x0 0.--31. 1. "SFADR,Serial Flash Address. The register content is used as byte address for all following IP Commands." line.long 0x4 "SFACR,Serial Flash Address Configuration Register" bitfld.long 0x4 16. "WA,Word Addressable" "0: Byte addressable serial flash mode.,1: Word (2 byte) addressable serial flash mode." hexmask.long.byte 0x4 0.--3. 1. "CAS,Column Address Space" line.long 0x8 "SMPR,Sampling Register" bitfld.long 0x8 6. "FSDLY,Full Speed Delay selection for SDR instructions. Select the delay with respect to the reference edge for the sample point valid for full speed commands." "0: One clock cycle delay,1: Two clock cycles delay." bitfld.long 0x8 5. "FSPHS,Full Speed Phase selection for SDR instructions." "0: Select sampling at non-inverted clock,1: Select sampling at inverted clock." rgroup.long 0x10C++0x3 line.long 0x0 "RBSR,RX Buffer Status Register" hexmask.long.word 0x0 16.--31. 1. "RDCTR,Read Counter" hexmask.long.byte 0x0 8.--13. 1. "RDBFL,RX Buffer Fill Level" group.long 0x110++0x3 line.long 0x0 "RBCT,RX Buffer Control Register" bitfld.long 0x0 8. "RXBRD,RX Buffer Readout. This field specifies the access scheme for the RX Buffer readout." "0: RX Buffer content is read using the AHB Bus..,1: RX Buffer content is read using the IP Bus.." hexmask.long.byte 0x0 0.--4. 1. "WMRK,RX Buffer Watermark" rgroup.long 0x150++0x3 line.long 0x0 "TBSR,TX Buffer Status Register" hexmask.long.word 0x0 16.--31. 1. "TRCTR,Transmit Counter" hexmask.long.byte 0x0 8.--13. 1. "TRBFL,TX Buffer Fill Level" group.long 0x154++0x7 line.long 0x0 "TBDR,TX Buffer Data Register" hexmask.long 0x0 0.--31. 1. "TXDATA,TX Data On write access the data is written into the next available entry of the TX Buffer and the QPSI_TBSR[TRBFL] field is updated accordingly" line.long 0x4 "TBCT,Tx Buffer Control Register" hexmask.long.byte 0x4 0.--4. 1. "WMRK,Determines the watermark for the TX Buffer" rgroup.long 0x15C++0x3 line.long 0x0 "SR,Status Register" bitfld.long 0x0 27. "TXFULL,TX Buffer Full. Asserted when no more data can be stored." "0,1" bitfld.long 0x0 26. "TXDMA,TXDMA" "0,1" newline bitfld.long 0x0 25. "TXWA,TX Buffer watermark Available" "0,1" bitfld.long 0x0 24. "TXEDA,Tx Buffer Enough Data Available" "0,1" newline bitfld.long 0x0 23. "RXDMA,RX Buffer DMA. Asserted when RX Buffer read out via DMA is active i.e DMA is requested or running." "0,1" bitfld.long 0x0 19. "RXFULL,RX Buffer Full" "0,1" newline bitfld.long 0x0 16. "RXWE,RX Buffer Watermark Exceeded" "0,1" bitfld.long 0x0 14. "AHB3FUL,AHB 3 Buffer Full. Asserted when AHB 3 buffer is full." "0,1" newline bitfld.long 0x0 13. "AHB2FUL,AHB 2 Buffer Full. Asserted when AHB 2 buffer is full." "0,1" bitfld.long 0x0 12. "AHB1FUL,AHB 1 Buffer Full. Asserted when AHB 1 buffer is full." "0,1" newline bitfld.long 0x0 11. "AHB0FUL,AHB 0 Buffer Full. Asserted when AHB 0 buffer is full." "0,1" bitfld.long 0x0 10. "AHB3NE,AHB 3 Buffer Not Empty. Asserted when AHB 3 buffer contains data." "0,1" newline bitfld.long 0x0 9. "AHB2NE,AHB 2 Buffer Not Empty. Asserted when AHB 2 buffer contains data." "0,1" bitfld.long 0x0 8. "AHB1NE,AHB 1 Buffer Not Empty. Asserted when AHB 1 buffer contains data." "0,1" newline bitfld.long 0x0 7. "AHB0NE,AHB 0 Buffer Not Empty. Asserted when AHB 0 buffer contains data." "0,1" bitfld.long 0x0 6. "AHBTRN,AHB Access Transaction pending" "0,1" newline bitfld.long 0x0 5. "AHBGNT,AHB Command priority Granted: Asserted when another module has been granted priority of AHB Commands against IP Commands" "0,1" bitfld.long 0x0 2. "AHB_ACC,AHB Access. Asserted when the transaction currently executed was initiated by AHB bus." "0,1" newline bitfld.long 0x0 1. "IP_ACC,IP Access. Asserted when transaction currently executed was initiated by IP bus." "0,1" bitfld.long 0x0 0. "BUSY,Module Busy" "0,1" group.long 0x160++0x7 line.long 0x0 "FR,Flag Register" bitfld.long 0x0 27. "TBFF,TX Buffer Fill Flag" "0,1" bitfld.long 0x0 26. "TBUF,TX Buffer Underrun Flag" "0,1" newline bitfld.long 0x0 23. "ILLINE,Illegal Instruction Error Flag" "0,1" bitfld.long 0x0 17. "RBOF,RX Buffer Overflow Flag" "0,1" newline bitfld.long 0x0 16. "RBDF,RX Buffer Drain Flag" "0,1" bitfld.long 0x0 15. "ABSEF,AHB Sequence Error Flag" "0,1" newline bitfld.long 0x0 14. "AITEF,AHB Illegal transaction error flag" "0,1" bitfld.long 0x0 13. "AIBSEF,AHB Illegal Burst Size Error Flag" "0,1" newline bitfld.long 0x0 12. "ABOF,AHB Buffer Overflow Flag" "0,1" bitfld.long 0x0 7. "IPAEF,IP Command Trigger during AHB Access Error Flag" "0,1" newline bitfld.long 0x0 6. "IPIEF,IP Command Trigger could not be executed Error Flag" "0,1" bitfld.long 0x0 4. "IPGEF,IP Command Trigger during AHB Grant Error Flag" "0,1" newline bitfld.long 0x0 0. "TFF,IP Command Transaction Finished Flag" "0,1" line.long 0x4 "RSER,Interrupt and DMA Request Select and Enable Register" bitfld.long 0x4 27. "TBFIE,TX Buffer Fill Interrupt Enable" "0: No TBFF interrupt will be generated,1: TBFF interrupt will be generated" bitfld.long 0x4 26. "TBUIE,TX Buffer Underrun Interrupt Enable" "0: No TBUF interrupt will be generated,1: TBUF interrupt will be generated" newline bitfld.long 0x4 25. "TBFDE,TX Buffer Fill DMA Enable" "0: No DMA request will be generated,1: DMA request will be generated" bitfld.long 0x4 23. "ILLINIE,Illegal Instruction Error Interrupt Enable. Triggered by ILLINE flag in QSPI_FR" "0: No ILLINE interrupt will be generated,1: ILLINE interrupt will be generated" newline bitfld.long 0x4 21. "RBDDE,RX Buffer Drain DMA Enable: Enables generation of DMA requests for RX Buffer Drain" "0: No DMA request will be generated,1: DMA request will be generated" bitfld.long 0x4 17. "RBOIE,RX Buffer Overflow Interrupt Enable" "0: No RBOF interrupt will be generated,1: RBOF interrupt will be generated" newline bitfld.long 0x4 16. "RBDIE,RX Buffer Drain Interrupt Enable: Enables generation of IRQ requests for RX Buffer Drain" "0: No RBDF interrupt will be generated,1: RBDF Interrupt will be generated" bitfld.long 0x4 15. "ABSEIE,AHB Sequence Error Interrupt Enable: Triggered by ABSEF flags of QSPI_FR" "0: No ABSEF interrupt will be generated,1: ABSEF interrupt will be generated" newline bitfld.long 0x4 14. "AITIE,AHB Illegal transaction interrupt enable." "0: No AITEF interrupt will be generated,1: AITEF interrupt will be generated" bitfld.long 0x4 13. "AIBSIE,AHB Illegal Burst Size Interrupt Enable" "0: No AIBSEF interrupt will be generated,1: AIBSEF interrupt will be generated" newline bitfld.long 0x4 12. "ABOIE,AHB Buffer Overflow Interrupt Enable" "0: No ABOF interrupt will be generated,1: ABOF interrupt will be generated" bitfld.long 0x4 7. "IPAEIE,IP Command Trigger during AHB Access Error Interrupt Enable" "0: No IPAEF interrupt will be generated,1: IPAEF interrupt will be generated" newline bitfld.long 0x4 6. "IPIEIE,IP Command Trigger during IP Access Error Interrupt Enable" "0: No IPIEF interrupt will be generated,1: IPIEF interrupt will be generated" bitfld.long 0x4 4. "IPGEIE,IP Command Trigger during AHB Grant Error Interrupt Enable" "0: No IPGEF interrupt will be generated,1: IPGEF interrupt will be generated" newline bitfld.long 0x4 0. "TFIE,Transaction Finished Interrupt Enable" "0: No TFF interrupt will be generated,1: TFF interrupt will be generated" rgroup.long 0x168++0x3 line.long 0x0 "SPNDST,Sequence Suspend Status Register" hexmask.long.byte 0x0 9.--15. 1. "DATLFT,Data left: Provides information about the amount of data left to be read in the suspended sequence" bitfld.long 0x0 6.--7. "SPDBUF,Suspended Buffer: Provides the suspended buffer number. Valid only when SUSPND is set to 1'b1" "0,1,2,3" newline bitfld.long 0x0 0. "SUSPND,When set it signifies that a sequence is in suspended state" "0,1" wgroup.long 0x16C++0x3 line.long 0x0 "SPTRCLR,Sequence Pointer Clear Register" bitfld.long 0x0 8. "IPPTRC,IP Pointer Clear: 1: Clears the sequence pointer for IP accesses as defined in QuadSPI_IPCR This is a self-clearing field" "?,1: Clears the sequence pointer for IP accesses as.." bitfld.long 0x0 0. "BFPTRC,Buffer Pointer Clear: 1: Clears the sequence pointer for AHB accesses as defined in QuadSPI_BFGENCR" "?,1: Clears the sequence pointer for AHB accesses as.." group.long 0x180++0xF line.long 0x0 "SFA1AD,Serial Flash A1 Top Address" hexmask.long.tbyte 0x0 10.--31. 1. "TPADA1,Top address for Serial Flash A1. In effect TPADxx is the first location of the next memory." line.long 0x4 "SFA2AD,Serial Flash A2 Top Address" hexmask.long.tbyte 0x4 10.--31. 1. "TPADA2,Top address for Serial Flash A2. In effect TPxxAD is the first location of the next memory." line.long 0x8 "SFB1AD,Serial Flash B1 Top Address" hexmask.long.tbyte 0x8 10.--31. 1. "TPADB1,Top address for Serial Flash B1.In effect TPxxAD is the first location of the next memory." line.long 0xC "SFB2AD,Serial Flash B2 Top Address" hexmask.long.tbyte 0xC 10.--31. 1. "TPADB2,Top address for Serial Flash B2. In effect TPxxAD is the first location of the next memory." repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x200)++0x3 line.long 0x0 "RBDR$1,RX Buffer Data Register" hexmask.long 0x0 0.--31. 1. "RXDATA,RX Data" repeat.end group.long 0x300++0x7 line.long 0x0 "LUTKEY,LUT Key Register" hexmask.long 0x0 0.--31. 1. "KEY,The key to lock or unlock the LUT. The KEY is 0x5AF05AF0. The read value is always 0x5AF05AF0" line.long 0x4 "LCKCR,LUT Lock Configuration Register" bitfld.long 0x4 1. "UNLOCK,Unlocks the LUT when the following two conditions are met: 1" "0,1" bitfld.long 0x4 0. "LOCK,Locks the LUT when the following condition is met: This register is written just after the LUTKEYLUT Key Register The LUT key register was written with 0x5AF05AF0 key" "0,1" repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x310)++0x3 line.long 0x0 "LUT$1,Look-up Table register" hexmask.long.byte 0x0 26.--31. 1. "INSTR1,Instruction 1" bitfld.long 0x0 24.--25. "PAD1,Pad information for INSTR1." "0: 1 Pad,1: 2 Pads,?,?" newline hexmask.long.byte 0x0 16.--23. 1. "OPRND1,Operand for INSTR1." hexmask.long.byte 0x0 10.--15. 1. "INSTR0,Instruction 0" newline bitfld.long 0x0 8.--9. "PAD0,Pad information for INSTR0." "0: 1 Pad,1: 2 Pads,?,?" hexmask.long.byte 0x0 0.--7. 1. "OPRND0,Operand for INSTR0." repeat.end tree.end endif tree "RCM (Reset Control Module)" base ad:0x4007F000 rgroup.long 0x0++0xB line.long 0x0 "VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,Parameter Register" bitfld.long 0x4 16. "ECORE1,Existence of SRS[CORE1] status indication feature" "0: The feature is not available.,1: The feature is available." bitfld.long 0x4 15. "ETAMPER,Existence of SRS[TAMPER] status indication feature" "0: The feature is not available.,1: The feature is available." newline bitfld.long 0x4 13. "ESACKERR,Existence of SRS[SACKERR] status indication feature" "0: The feature is not available.,1: The feature is available." bitfld.long 0x4 11. "EMDM_AP,Existence of SRS[MDM_AP] status indication feature" "0: The feature is not available.,1: The feature is available." newline bitfld.long 0x4 10. "ESW,Existence of SRS[SW] status indication feature" "0: The feature is not available.,1: The feature is available." bitfld.long 0x4 9. "ELOCKUP,Existence of SRS[LOCKUP] status indication feature" "0: The feature is not available.,1: The feature is available." newline bitfld.long 0x4 8. "EJTAG,Existence of SRS[JTAG] status indication feature" "0: The feature is not available.,1: The feature is available." bitfld.long 0x4 7. "EPOR,Existence of SRS[POR] status indication feature" "0: The feature is not available.,1: The feature is available." newline bitfld.long 0x4 6. "EPIN,Existence of SRS[PIN] status indication feature" "0: The feature is not available.,1: The feature is available." bitfld.long 0x4 5. "EWDOG,Existence of SRS[WDOG] status indication feature" "0: The feature is not available.,1: The feature is available." newline sif (cpuis("S32K116*")||cpuis("S32K118*")) bitfld.long 0x4 4. "ECMU_LOC,Existence of SRS[CMU_LOC] status indication feature" "0: The feature is not available.,1: The feature is available." endif bitfld.long 0x4 3. "ELOL,Existence of SRS[LOL] status indication feature" "0: The feature is not available.,1: The feature is available." newline bitfld.long 0x4 2. "ELOC,Existence of SRS[LOC] status indication feature" "0: The feature is not available.,1: The feature is available." bitfld.long 0x4 1. "ELVD,Existence of SRS[LVD] status indication feature" "0: The feature is not available.,1: The feature is available." newline bitfld.long 0x4 0. "EWAKEUP,Existence of SRS[WAKEUP] status indication feature" "0: The feature is not available.,1: The feature is available." line.long 0x8 "SRS,System Reset Status Register" bitfld.long 0x8 13. "SACKERR,Stop Acknowledge Error" "0: Reset not caused by peripheral failure to..,1: Reset caused by peripheral failure to.." bitfld.long 0x8 11. "MDM_AP,MDM-AP System Reset Request" "0: Reset was not caused by host debugger system..,1: Reset was caused by host debugger system setting.." newline bitfld.long 0x8 10. "SW,Software" "0: Reset not caused by software setting of..,1: Reset caused by software setting of SYSRESETREQ.." bitfld.long 0x8 9. "LOCKUP,Core Lockup" "0: Reset not caused by core LOCKUP event,1: Reset caused by core LOCKUP event" newline bitfld.long 0x8 8. "JTAG,JTAG generated reset" "0: Reset not caused by JTAG,1: Reset caused by JTAG" bitfld.long 0x8 7. "POR,Power-On Reset" "0: Reset not caused by POR,1: Reset caused by POR" newline bitfld.long 0x8 6. "PIN,External Reset Pin" "0: Reset not caused by external reset pin,1: Reset caused by external reset pin" bitfld.long 0x8 5. "WDOG,Watchdog" "0: Reset not caused by watchdog timeout,1: Reset caused by watchdog timeout" newline sif (cpuis("S32K116*")||cpuis("S32K118*")) bitfld.long 0x8 4. "CMU_LOC,CMU Loss-of-Clock Reset" "0: Reset not caused by the CMU loss-of-clock circuit.,1: Reset caused by the CMU loss-of-clock circuit." endif bitfld.long 0x8 3. "LOL,Loss-of-Lock Reset" "0: Reset not caused by a loss of lock in the PLL/FLL,1: Reset caused by a loss of lock in the PLL/FLL" newline bitfld.long 0x8 2. "LOC,Loss-of-Clock Reset" "0: Reset not caused by a loss of external clock.,1: Reset caused by a loss of external clock." bitfld.long 0x8 1. "LVD,Low-Voltage Detect Reset or High-Voltage Detect Reset" "0: Reset not caused by LVD trip HVD trip or POR,1: Reset caused by LVD trip HVD trip or POR" group.long 0xC++0x3 line.long 0x0 "RPC,Reset Pin Control register" hexmask.long.byte 0x0 8.--12. 1. "RSTFLTSEL,Reset Pin Filter Bus Clock Select" bitfld.long 0x0 2. "RSTFLTSS,Reset Pin Filter Select in Stop Mode" "0: All filtering disabled,1: LPO clock filter enabled" newline bitfld.long 0x0 0.--1. "RSTFLTSRW,Reset Pin Filter Select in Run and Wait Modes" "0: All filtering disabled,1: Bus clock filter enabled for normal operation,?,?" group.long 0x18++0x7 line.long 0x0 "SSRS,Sticky System Reset Status Register" bitfld.long 0x0 13. "SSACKERR,Sticky Stop Acknowledge Error" "0: Reset not caused by peripheral failure to..,1: Reset caused by peripheral failure to.." bitfld.long 0x0 11. "SMDM_AP,Sticky MDM-AP System Reset Request" "0: Reset was not caused by host debugger system..,1: Reset was caused by host debugger system setting.." newline bitfld.long 0x0 10. "SSW,Sticky Software" "0: Reset not caused by software setting of..,1: Reset caused by software setting of SYSRESETREQ.." bitfld.long 0x0 9. "SLOCKUP,Sticky Core Lockup" "0: Reset not caused by core LOCKUP event,1: Reset caused by core LOCKUP event" newline bitfld.long 0x0 8. "SJTAG,Sticky JTAG generated reset" "0: Reset not caused by JTAG,1: Reset caused by JTAG" bitfld.long 0x0 7. "SPOR,Sticky Power-On Reset" "0: Reset not caused by POR,1: Reset caused by POR" newline bitfld.long 0x0 6. "SPIN,Sticky External Reset Pin" "0: Reset not caused by external reset pin,1: Reset caused by external reset pin" bitfld.long 0x0 5. "SWDOG,Sticky Watchdog" "0: Reset not caused by watchdog timeout,1: Reset caused by watchdog timeout" newline sif (cpuis("S32K116*")||cpuis("S32K118*")) bitfld.long 0x0 4. "SCMU_LOC,Sticky CMU Loss-of-Clock Reset" "0: Reset not caused by the CMU loss-of-clock circuit.,1: Reset caused by the CMU loss-of-clock circuit." endif bitfld.long 0x0 3. "SLOL,Sticky Loss-of-Lock Reset" "0: Reset not caused by a loss of lock in the PLL/FLL,1: Reset caused by a loss of lock in the PLL/FLL" newline bitfld.long 0x0 2. "SLOC,Sticky Loss-of-Clock Reset" "0: Reset not caused by a loss of external clock.,1: Reset caused by a loss of external clock." bitfld.long 0x0 1. "SLVD,Sticky Low-Voltage Detect Reset" "0: Reset not caused by LVD trip or POR,1: Reset caused by LVD trip or POR" line.long 0x4 "SRIE,System Reset Interrupt Enable Register" bitfld.long 0x4 13. "SACKERR,Stop Acknowledge Error Interrupt" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x4 11. "MDM_AP,MDM-AP System Reset Request" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x4 10. "SW,Software Interrupt" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x4 9. "LOCKUP,Core Lockup Interrupt" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x4 8. "JTAG,JTAG generated reset" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x4 7. "GIE,Global Interrupt Enable" "0: All interrupt sources disabled.,1: All interrupt sources enabled. Note that the.." newline bitfld.long 0x4 6. "PIN,External Reset Pin Interrupt" "0: Reset not caused by external reset pin,1: Reset caused by external reset pin" bitfld.long 0x4 5. "WDOG,Watchdog Interrupt" "0: Interrupt disabled.,1: Interrupt enabled." newline sif (cpuis("S32K116*")||cpuis("S32K118*")) bitfld.long 0x4 4. "CMU_LOC,CMU Loss-of-Clock Interrupt" "0: Interrupt disabled.,1: Interrupt enabled." endif bitfld.long 0x4 3. "LOL,Loss-of-Lock Interrupt" "0: Interrupt disabled.,1: Interrupt enabled." newline bitfld.long 0x4 2. "LOC,Loss-of-Clock Interrupt" "0: Interrupt disabled.,1: Interrupt enabled." bitfld.long 0x4 0.--1. "DELAY,Reset Delay Time" "0: 10 LPO cycles,1: 34 LPO cycles,?,?" tree.end tree "RTC (Real Time Clock)" base ad:0x4003D000 group.long 0x0++0x1F line.long 0x0 "TSR,RTC Time Seconds Register" hexmask.long 0x0 0.--31. 1. "TSR,Time Seconds Register" line.long 0x4 "TPR,RTC Time Prescaler Register" hexmask.long.word 0x4 0.--15. 1. "TPR,Time Prescaler Register" line.long 0x8 "TAR,RTC Time Alarm Register" hexmask.long 0x8 0.--31. 1. "TAR,Time Alarm Register" line.long 0xC "TCR,RTC Time Compensation Register" hexmask.long.byte 0xC 24.--31. 1. "CIC,Compensation Interval Counter" hexmask.long.byte 0xC 16.--23. 1. "TCV,Time Compensation Value" newline hexmask.long.byte 0xC 8.--15. 1. "CIR,Compensation Interval Register" hexmask.long.byte 0xC 0.--7. 1. "TCR,Time Compensation Register" line.long 0x10 "CR,RTC Control Register" bitfld.long 0x10 24. "CPE,Clock Pin Enable" "0: The RTC_CLKOUT function is disabled.,1: Enable RTC_CLKOUT function." sif (cpuis("S32K116*")||cpuis("S32K118*")) bitfld.long 0x10 9. "CLKO,Clock Output" "0: The 32 kHz clock is output to other peripherals.,1: The 32 kHz clock is not output to other.." endif newline bitfld.long 0x10 7. "LPOS,LPO Select" "0: RTC prescaler increments using 32.768 kHz clock.,1: RTC prescaler increments using 1 kHz LPO bits.." bitfld.long 0x10 5. "CPS,Clock Pin Select" "0: The prescaler output clock (as configured by..,1: The RTC 32.768 kHz clock is output on RTC_CLKOUT.." newline bitfld.long 0x10 3. "UM,Update Mode" "0: Registers cannot be written when locked.,1: Registers can be written when locked under.." bitfld.long 0x10 2. "SUP,Supervisor Access" "0: Non-supervisor mode write accesses are not..,1: Non-supervisor mode write accesses are supported." newline bitfld.long 0x10 0. "SWR,Software Reset" "0: No effect.,?" line.long 0x14 "SR,RTC Status Register" bitfld.long 0x14 4. "TCE,Time Counter Enable" "0: Time counter is disabled.,1: Time counter is enabled." rbitfld.long 0x14 2. "TAF,Time Alarm Flag" "0: Time alarm has not occurred.,1: Time alarm has occurred." newline rbitfld.long 0x14 1. "TOF,Time Overflow Flag" "0: Time overflow has not occurred.,1: Time overflow has occurred and time counter is.." rbitfld.long 0x14 0. "TIF,Time Invalid Flag" "0: Time is valid.,1: Time is invalid and time counter is read as zero." line.long 0x18 "LR,RTC Lock Register" bitfld.long 0x18 6. "LRL,Lock Register Lock" "0: Lock Register is locked and writes are ignored.,1: Lock Register is not locked and writes complete.." bitfld.long 0x18 5. "SRL,Status Register Lock" "0: Status Register is locked and writes are ignored.,1: Status Register is not locked and writes.." newline bitfld.long 0x18 4. "CRL,Control Register Lock" "0: Control Register is locked and writes are ignored.,1: Control Register is not locked and writes.." bitfld.long 0x18 3. "TCL,Time Compensation Lock" "0: Time Compensation Register is locked and writes..,1: Time Compensation Register is not locked and.." line.long 0x1C "IER,RTC Interrupt Enable Register" bitfld.long 0x1C 16.--18. "TSIC,Timer Seconds Interrupt Configuration" "0: 1 Hz.,1: 2 Hz.,?,?,?,?,?,?" bitfld.long 0x1C 4. "TSIE,Time Seconds Interrupt Enable" "0: Seconds interrupt is disabled.,1: Seconds interrupt is enabled." newline bitfld.long 0x1C 2. "TAIE,Time Alarm Interrupt Enable" "0: Time alarm flag does not generate an interrupt.,1: Time alarm flag does generate an interrupt." bitfld.long 0x1C 1. "TOIE,Time Overflow Interrupt Enable" "0: Time overflow flag does not generate an interrupt.,1: Time overflow flag does generate an interrupt." newline bitfld.long 0x1C 0. "TIIE,Time Invalid Interrupt Enable" "0: Time invalid flag does not generate an interrupt.,1: Time invalid flag does generate an interrupt." tree.end tree "S32_NVIC (Nested Vectored Interrupt Controller)" base ad:0xE000E100 sif (cpuis("S32K116*")||cpuis("S32K118*")) group.long 0x0++0x3 line.long 0x0 "S32_NVIC_ISER,Interrupt Set Enable Register" hexmask.long 0x0 0.--31. 1. "SETENA,Interrupt set enable bits" group.long 0x80++0x3 line.long 0x0 "S32_NVIC_ICER,Interrupt Clear Enable Register" hexmask.long 0x0 0.--31. 1. "CLRENA,Interrupt clear-enable bits" group.long 0x100++0x3 line.long 0x0 "S32_NVIC_ISPR,Interrupt Set Pending Register" hexmask.long 0x0 0.--31. 1. "SETPEND,Interrupt set-pending bits" group.long 0x180++0x3 line.long 0x0 "S32_NVIC_ICPR,Interrupt Clear Pending Register" hexmask.long 0x0 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" group.long 0x300++0x1F line.long 0x0 "S32_NVIC_IPR0,Interrupt Priority Register n" hexmask.long.byte 0x0 24.--31. 1. "PRI_3,Priority of interrupt 3" hexmask.long.byte 0x0 16.--23. 1. "PRI_2,Priority of interrupt 2" newline hexmask.long.byte 0x0 8.--15. 1. "PRI_1,Priority of interrupt 1" hexmask.long.byte 0x0 0.--7. 1. "PRI_0,Priority of interrupt 0" line.long 0x4 "S32_NVIC_IPR1,Interrupt Priority Register n" hexmask.long.byte 0x4 24.--31. 1. "PRI_3,Priority of interrupt 3" hexmask.long.byte 0x4 16.--23. 1. "PRI_2,Priority of interrupt 2" newline hexmask.long.byte 0x4 8.--15. 1. "PRI_1,Priority of interrupt 1" hexmask.long.byte 0x4 0.--7. 1. "PRI_0,Priority of interrupt 0" line.long 0x8 "S32_NVIC_IPR2,Interrupt Priority Register n" hexmask.long.byte 0x8 24.--31. 1. "PRI_3,Priority of interrupt 3" hexmask.long.byte 0x8 16.--23. 1. "PRI_2,Priority of interrupt 2" newline hexmask.long.byte 0x8 8.--15. 1. "PRI_1,Priority of interrupt 1" hexmask.long.byte 0x8 0.--7. 1. "PRI_0,Priority of interrupt 0" line.long 0xC "S32_NVIC_IPR3,Interrupt Priority Register n" hexmask.long.byte 0xC 24.--31. 1. "PRI_3,Priority of interrupt 3" hexmask.long.byte 0xC 16.--23. 1. "PRI_2,Priority of interrupt 2" newline hexmask.long.byte 0xC 8.--15. 1. "PRI_1,Priority of interrupt 1" hexmask.long.byte 0xC 0.--7. 1. "PRI_0,Priority of interrupt 0" line.long 0x10 "S32_NVIC_IPR4,Interrupt Priority Register n" hexmask.long.byte 0x10 24.--31. 1. "PRI_3,Priority of interrupt 3" hexmask.long.byte 0x10 16.--23. 1. "PRI_2,Priority of interrupt 2" newline hexmask.long.byte 0x10 8.--15. 1. "PRI_1,Priority of interrupt 1" hexmask.long.byte 0x10 0.--7. 1. "PRI_0,Priority of interrupt 0" line.long 0x14 "S32_NVIC_IPR5,Interrupt Priority Register n" hexmask.long.byte 0x14 24.--31. 1. "PRI_3,Priority of interrupt 3" hexmask.long.byte 0x14 16.--23. 1. "PRI_2,Priority of interrupt 2" newline hexmask.long.byte 0x14 8.--15. 1. "PRI_1,Priority of interrupt 1" hexmask.long.byte 0x14 0.--7. 1. "PRI_0,Priority of interrupt 0" line.long 0x18 "S32_NVIC_IPR6,Interrupt Priority Register n" hexmask.long.byte 0x18 24.--31. 1. "PRI_3,Priority of interrupt 3" hexmask.long.byte 0x18 16.--23. 1. "PRI_2,Priority of interrupt 2" newline hexmask.long.byte 0x18 8.--15. 1. "PRI_1,Priority of interrupt 1" hexmask.long.byte 0x18 0.--7. 1. "PRI_0,Priority of interrupt 0" line.long 0x1C "S32_NVIC_IPR7,Interrupt Priority Register n" hexmask.long.byte 0x1C 24.--31. 1. "PRI_3,Priority of interrupt 3" hexmask.long.byte 0x1C 16.--23. 1. "PRI_2,Priority of interrupt 2" newline hexmask.long.byte 0x1C 8.--15. 1. "PRI_1,Priority of interrupt 1" hexmask.long.byte 0x1C 0.--7. 1. "PRI_0,Priority of interrupt 0" endif sif (cpuis("S32K142*")) group.long 0x0++0xF line.long 0x0 "NVICISER0,Interrupt Set Enable Register n" hexmask.long 0x0 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0x4 "NVICISER1,Interrupt Set Enable Register n" hexmask.long 0x4 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0x8 "NVICISER2,Interrupt Set Enable Register n" hexmask.long 0x8 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0xC "NVICISER3,Interrupt Set Enable Register n" hexmask.long 0xC 0.--31. 1. "SETENA,Interrupt set enable bits" group.long 0x80++0xF line.long 0x0 "NVICICER0,Interrupt Clear Enable Register n" hexmask.long 0x0 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0x4 "NVICICER1,Interrupt Clear Enable Register n" hexmask.long 0x4 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0x8 "NVICICER2,Interrupt Clear Enable Register n" hexmask.long 0x8 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0xC "NVICICER3,Interrupt Clear Enable Register n" hexmask.long 0xC 0.--31. 1. "CLRENA,Interrupt clear-enable bits" group.long 0x100++0xF line.long 0x0 "NVICISPR0,Interrupt Set Pending Register n" hexmask.long 0x0 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0x4 "NVICISPR1,Interrupt Set Pending Register n" hexmask.long 0x4 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0x8 "NVICISPR2,Interrupt Set Pending Register n" hexmask.long 0x8 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0xC "NVICISPR3,Interrupt Set Pending Register n" hexmask.long 0xC 0.--31. 1. "SETPEND,Interrupt set-pending bits" group.long 0x180++0xF line.long 0x0 "NVICICPR0,Interrupt Clear Pending Register n" hexmask.long 0x0 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0x4 "NVICICPR1,Interrupt Clear Pending Register n" hexmask.long 0x4 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0x8 "NVICICPR2,Interrupt Clear Pending Register n" hexmask.long 0x8 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0xC "NVICICPR3,Interrupt Clear Pending Register n" hexmask.long 0xC 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" group.long 0x200++0xF line.long 0x0 "NVICIABR0,Interrupt Active bit Register n" hexmask.long 0x0 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0x4 "NVICIABR1,Interrupt Active bit Register n" hexmask.long 0x4 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0x8 "NVICIABR2,Interrupt Active bit Register n" hexmask.long 0x8 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0xC "NVICIABR3,Interrupt Active bit Register n" hexmask.long 0xC 0.--31. 1. "ACTIVE,Interrupt active flags" group.byte 0x300++0x7A line.byte 0x0 "NVICIP0,Interrupt Priority Register n" hexmask.byte 0x0 0.--7. 1. "PRI0,Priority of interrupt 0" line.byte 0x1 "NVICIP1,Interrupt Priority Register n" hexmask.byte 0x1 0.--7. 1. "PRI1,Priority of interrupt 1" line.byte 0x2 "NVICIP2,Interrupt Priority Register n" hexmask.byte 0x2 0.--7. 1. "PRI2,Priority of interrupt 2" line.byte 0x3 "NVICIP3,Interrupt Priority Register n" hexmask.byte 0x3 0.--7. 1. "PRI3,Priority of interrupt 3" line.byte 0x4 "NVICIP4,Interrupt Priority Register n" hexmask.byte 0x4 0.--7. 1. "PRI4,Priority of interrupt 4" line.byte 0x5 "NVICIP5,Interrupt Priority Register n" hexmask.byte 0x5 0.--7. 1. "PRI5,Priority of interrupt 5" line.byte 0x6 "NVICIP6,Interrupt Priority Register n" hexmask.byte 0x6 0.--7. 1. "PRI6,Priority of interrupt 6" line.byte 0x7 "NVICIP7,Interrupt Priority Register n" hexmask.byte 0x7 0.--7. 1. "PRI7,Priority of interrupt 7" line.byte 0x8 "NVICIP8,Interrupt Priority Register n" hexmask.byte 0x8 0.--7. 1. "PRI8,Priority of interrupt 8" line.byte 0x9 "NVICIP9,Interrupt Priority Register n" hexmask.byte 0x9 0.--7. 1. "PRI9,Priority of interrupt 9" line.byte 0xA "NVICIP10,Interrupt Priority Register n" hexmask.byte 0xA 0.--7. 1. "PRI10,Priority of interrupt 10" line.byte 0xB "NVICIP11,Interrupt Priority Register n" hexmask.byte 0xB 0.--7. 1. "PRI11,Priority of interrupt 11" line.byte 0xC "NVICIP12,Interrupt Priority Register n" hexmask.byte 0xC 0.--7. 1. "PRI12,Priority of interrupt 12" line.byte 0xD "NVICIP13,Interrupt Priority Register n" hexmask.byte 0xD 0.--7. 1. "PRI13,Priority of interrupt 13" line.byte 0xE "NVICIP14,Interrupt Priority Register n" hexmask.byte 0xE 0.--7. 1. "PRI14,Priority of interrupt 14" line.byte 0xF "NVICIP15,Interrupt Priority Register n" hexmask.byte 0xF 0.--7. 1. "PRI15,Priority of interrupt 15" line.byte 0x10 "NVICIP16,Interrupt Priority Register n" hexmask.byte 0x10 0.--7. 1. "PRI16,Priority of interrupt 16" line.byte 0x11 "NVICIP17,Interrupt Priority Register n" hexmask.byte 0x11 0.--7. 1. "PRI17,Priority of interrupt 17" line.byte 0x12 "NVICIP18,Interrupt Priority Register n" hexmask.byte 0x12 0.--7. 1. "PRI18,Priority of interrupt 18" line.byte 0x13 "NVICIP19,Interrupt Priority Register n" hexmask.byte 0x13 0.--7. 1. "PRI19,Priority of interrupt 19" line.byte 0x14 "NVICIP20,Interrupt Priority Register n" hexmask.byte 0x14 0.--7. 1. "PRI20,Priority of interrupt 20" line.byte 0x15 "NVICIP21,Interrupt Priority Register n" hexmask.byte 0x15 0.--7. 1. "PRI21,Priority of interrupt 21" line.byte 0x16 "NVICIP22,Interrupt Priority Register n" hexmask.byte 0x16 0.--7. 1. "PRI22,Priority of interrupt 22" line.byte 0x17 "NVICIP23,Interrupt Priority Register n" hexmask.byte 0x17 0.--7. 1. "PRI23,Priority of interrupt 23" line.byte 0x18 "NVICIP24,Interrupt Priority Register n" hexmask.byte 0x18 0.--7. 1. "PRI24,Priority of interrupt 24" line.byte 0x19 "NVICIP25,Interrupt Priority Register n" hexmask.byte 0x19 0.--7. 1. "PRI25,Priority of interrupt 25" line.byte 0x1A "NVICIP26,Interrupt Priority Register n" hexmask.byte 0x1A 0.--7. 1. "PRI26,Priority of interrupt 26" line.byte 0x1B "NVICIP27,Interrupt Priority Register n" hexmask.byte 0x1B 0.--7. 1. "PRI27,Priority of interrupt 27" line.byte 0x1C "NVICIP28,Interrupt Priority Register n" hexmask.byte 0x1C 0.--7. 1. "PRI28,Priority of interrupt 28" line.byte 0x1D "NVICIP29,Interrupt Priority Register n" hexmask.byte 0x1D 0.--7. 1. "PRI29,Priority of interrupt 29" line.byte 0x1E "NVICIP30,Interrupt Priority Register n" hexmask.byte 0x1E 0.--7. 1. "PRI30,Priority of interrupt 30" line.byte 0x1F "NVICIP31,Interrupt Priority Register n" hexmask.byte 0x1F 0.--7. 1. "PRI31,Priority of interrupt 31" line.byte 0x20 "NVICIP32,Interrupt Priority Register n" hexmask.byte 0x20 0.--7. 1. "PRI32,Priority of interrupt 32" line.byte 0x21 "NVICIP33,Interrupt Priority Register n" hexmask.byte 0x21 0.--7. 1. "PRI33,Priority of interrupt 33" line.byte 0x22 "NVICIP34,Interrupt Priority Register n" hexmask.byte 0x22 0.--7. 1. "PRI34,Priority of interrupt 34" line.byte 0x23 "NVICIP35,Interrupt Priority Register n" hexmask.byte 0x23 0.--7. 1. "PRI35,Priority of interrupt 35" line.byte 0x24 "NVICIP36,Interrupt Priority Register n" hexmask.byte 0x24 0.--7. 1. "PRI36,Priority of interrupt 36" line.byte 0x25 "NVICIP37,Interrupt Priority Register n" hexmask.byte 0x25 0.--7. 1. "PRI37,Priority of interrupt 37" line.byte 0x26 "NVICIP38,Interrupt Priority Register n" hexmask.byte 0x26 0.--7. 1. "PRI38,Priority of interrupt 38" line.byte 0x27 "NVICIP39,Interrupt Priority Register n" hexmask.byte 0x27 0.--7. 1. "PRI39,Priority of interrupt 39" line.byte 0x28 "NVICIP40,Interrupt Priority Register n" hexmask.byte 0x28 0.--7. 1. "PRI40,Priority of interrupt 40" line.byte 0x29 "NVICIP41,Interrupt Priority Register n" hexmask.byte 0x29 0.--7. 1. "PRI41,Priority of interrupt 41" line.byte 0x2A "NVICIP42,Interrupt Priority Register n" hexmask.byte 0x2A 0.--7. 1. "PRI42,Priority of interrupt 42" line.byte 0x2B "NVICIP43,Interrupt Priority Register n" hexmask.byte 0x2B 0.--7. 1. "PRI43,Priority of interrupt 43" line.byte 0x2C "NVICIP44,Interrupt Priority Register n" hexmask.byte 0x2C 0.--7. 1. "PRI44,Priority of interrupt 44" line.byte 0x2D "NVICIP45,Interrupt Priority Register n" hexmask.byte 0x2D 0.--7. 1. "PRI45,Priority of interrupt 45" line.byte 0x2E "NVICIP46,Interrupt Priority Register n" hexmask.byte 0x2E 0.--7. 1. "PRI46,Priority of interrupt 46" line.byte 0x2F "NVICIP47,Interrupt Priority Register n" hexmask.byte 0x2F 0.--7. 1. "PRI47,Priority of interrupt 47" line.byte 0x30 "NVICIP48,Interrupt Priority Register n" hexmask.byte 0x30 0.--7. 1. "PRI48,Priority of interrupt 48" line.byte 0x31 "NVICIP49,Interrupt Priority Register n" hexmask.byte 0x31 0.--7. 1. "PRI49,Priority of interrupt 49" line.byte 0x32 "NVICIP50,Interrupt Priority Register n" hexmask.byte 0x32 0.--7. 1. "PRI50,Priority of interrupt 50" line.byte 0x33 "NVICIP51,Interrupt Priority Register n" hexmask.byte 0x33 0.--7. 1. "PRI51,Priority of interrupt 51" line.byte 0x34 "NVICIP52,Interrupt Priority Register n" hexmask.byte 0x34 0.--7. 1. "PRI52,Priority of interrupt 52" line.byte 0x35 "NVICIP53,Interrupt Priority Register n" hexmask.byte 0x35 0.--7. 1. "PRI53,Priority of interrupt 53" line.byte 0x36 "NVICIP54,Interrupt Priority Register n" hexmask.byte 0x36 0.--7. 1. "PRI54,Priority of interrupt 54" line.byte 0x37 "NVICIP55,Interrupt Priority Register n" hexmask.byte 0x37 0.--7. 1. "PRI55,Priority of interrupt 55" line.byte 0x38 "NVICIP56,Interrupt Priority Register n" hexmask.byte 0x38 0.--7. 1. "PRI56,Priority of interrupt 56" line.byte 0x39 "NVICIP57,Interrupt Priority Register n" hexmask.byte 0x39 0.--7. 1. "PRI57,Priority of interrupt 57" line.byte 0x3A "NVICIP58,Interrupt Priority Register n" hexmask.byte 0x3A 0.--7. 1. "PRI58,Priority of interrupt 58" line.byte 0x3B "NVICIP59,Interrupt Priority Register n" hexmask.byte 0x3B 0.--7. 1. "PRI59,Priority of interrupt 59" line.byte 0x3C "NVICIP60,Interrupt Priority Register n" hexmask.byte 0x3C 0.--7. 1. "PRI60,Priority of interrupt 60" line.byte 0x3D "NVICIP61,Interrupt Priority Register n" hexmask.byte 0x3D 0.--7. 1. "PRI61,Priority of interrupt 61" line.byte 0x3E "NVICIP62,Interrupt Priority Register n" hexmask.byte 0x3E 0.--7. 1. "PRI62,Priority of interrupt 62" line.byte 0x3F "NVICIP63,Interrupt Priority Register n" hexmask.byte 0x3F 0.--7. 1. "PRI63,Priority of interrupt 63" line.byte 0x40 "NVICIP64,Interrupt Priority Register n" hexmask.byte 0x40 0.--7. 1. "PRI64,Priority of interrupt 64" line.byte 0x41 "NVICIP65,Interrupt Priority Register n" hexmask.byte 0x41 0.--7. 1. "PRI65,Priority of interrupt 65" line.byte 0x42 "NVICIP66,Interrupt Priority Register n" hexmask.byte 0x42 0.--7. 1. "PRI66,Priority of interrupt 66" line.byte 0x43 "NVICIP67,Interrupt Priority Register n" hexmask.byte 0x43 0.--7. 1. "PRI67,Priority of interrupt 67" line.byte 0x44 "NVICIP68,Interrupt Priority Register n" hexmask.byte 0x44 0.--7. 1. "PRI68,Priority of interrupt 68" line.byte 0x45 "NVICIP69,Interrupt Priority Register n" hexmask.byte 0x45 0.--7. 1. "PRI69,Priority of interrupt 69" line.byte 0x46 "NVICIP70,Interrupt Priority Register n" hexmask.byte 0x46 0.--7. 1. "PRI70,Priority of interrupt 70" line.byte 0x47 "NVICIP71,Interrupt Priority Register n" hexmask.byte 0x47 0.--7. 1. "PRI71,Priority of interrupt 71" line.byte 0x48 "NVICIP72,Interrupt Priority Register n" hexmask.byte 0x48 0.--7. 1. "PRI72,Priority of interrupt 72" line.byte 0x49 "NVICIP73,Interrupt Priority Register n" hexmask.byte 0x49 0.--7. 1. "PRI73,Priority of interrupt 73" line.byte 0x4A "NVICIP74,Interrupt Priority Register n" hexmask.byte 0x4A 0.--7. 1. "PRI74,Priority of interrupt 74" line.byte 0x4B "NVICIP75,Interrupt Priority Register n" hexmask.byte 0x4B 0.--7. 1. "PRI75,Priority of interrupt 75" line.byte 0x4C "NVICIP76,Interrupt Priority Register n" hexmask.byte 0x4C 0.--7. 1. "PRI76,Priority of interrupt 76" line.byte 0x4D "NVICIP77,Interrupt Priority Register n" hexmask.byte 0x4D 0.--7. 1. "PRI77,Priority of interrupt 77" line.byte 0x4E "NVICIP78,Interrupt Priority Register n" hexmask.byte 0x4E 0.--7. 1. "PRI78,Priority of interrupt 78" line.byte 0x4F "NVICIP79,Interrupt Priority Register n" hexmask.byte 0x4F 0.--7. 1. "PRI79,Priority of interrupt 79" line.byte 0x50 "NVICIP80,Interrupt Priority Register n" hexmask.byte 0x50 0.--7. 1. "PRI80,Priority of interrupt 80" line.byte 0x51 "NVICIP81,Interrupt Priority Register n" hexmask.byte 0x51 0.--7. 1. "PRI81,Priority of interrupt 81" line.byte 0x52 "NVICIP82,Interrupt Priority Register n" hexmask.byte 0x52 0.--7. 1. "PRI82,Priority of interrupt 82" line.byte 0x53 "NVICIP83,Interrupt Priority Register n" hexmask.byte 0x53 0.--7. 1. "PRI83,Priority of interrupt 83" line.byte 0x54 "NVICIP84,Interrupt Priority Register n" hexmask.byte 0x54 0.--7. 1. "PRI84,Priority of interrupt 84" line.byte 0x55 "NVICIP85,Interrupt Priority Register n" hexmask.byte 0x55 0.--7. 1. "PRI85,Priority of interrupt 85" line.byte 0x56 "NVICIP86,Interrupt Priority Register n" hexmask.byte 0x56 0.--7. 1. "PRI86,Priority of interrupt 86" line.byte 0x57 "NVICIP87,Interrupt Priority Register n" hexmask.byte 0x57 0.--7. 1. "PRI87,Priority of interrupt 87" line.byte 0x58 "NVICIP88,Interrupt Priority Register n" hexmask.byte 0x58 0.--7. 1. "PRI88,Priority of interrupt 88" line.byte 0x59 "NVICIP89,Interrupt Priority Register n" hexmask.byte 0x59 0.--7. 1. "PRI89,Priority of interrupt 89" line.byte 0x5A "NVICIP90,Interrupt Priority Register n" hexmask.byte 0x5A 0.--7. 1. "PRI90,Priority of interrupt 90" line.byte 0x5B "NVICIP91,Interrupt Priority Register n" hexmask.byte 0x5B 0.--7. 1. "PRI91,Priority of interrupt 91" line.byte 0x5C "NVICIP92,Interrupt Priority Register n" hexmask.byte 0x5C 0.--7. 1. "PRI92,Priority of interrupt 92" line.byte 0x5D "NVICIP93,Interrupt Priority Register n" hexmask.byte 0x5D 0.--7. 1. "PRI93,Priority of interrupt 93" line.byte 0x5E "NVICIP94,Interrupt Priority Register n" hexmask.byte 0x5E 0.--7. 1. "PRI94,Priority of interrupt 94" line.byte 0x5F "NVICIP95,Interrupt Priority Register n" hexmask.byte 0x5F 0.--7. 1. "PRI95,Priority of interrupt 95" line.byte 0x60 "NVICIP96,Interrupt Priority Register n" hexmask.byte 0x60 0.--7. 1. "PRI96,Priority of interrupt 96" line.byte 0x61 "NVICIP97,Interrupt Priority Register n" hexmask.byte 0x61 0.--7. 1. "PRI97,Priority of interrupt 97" line.byte 0x62 "NVICIP98,Interrupt Priority Register n" hexmask.byte 0x62 0.--7. 1. "PRI98,Priority of interrupt 98" line.byte 0x63 "NVICIP99,Interrupt Priority Register n" hexmask.byte 0x63 0.--7. 1. "PRI99,Priority of interrupt 99" line.byte 0x64 "NVICIP100,Interrupt Priority Register n" hexmask.byte 0x64 0.--7. 1. "PRI100,Priority of interrupt 100" line.byte 0x65 "NVICIP101,Interrupt Priority Register n" hexmask.byte 0x65 0.--7. 1. "PRI101,Priority of interrupt 101" line.byte 0x66 "NVICIP102,Interrupt Priority Register n" hexmask.byte 0x66 0.--7. 1. "PRI102,Priority of interrupt 102" line.byte 0x67 "NVICIP103,Interrupt Priority Register n" hexmask.byte 0x67 0.--7. 1. "PRI103,Priority of interrupt 103" line.byte 0x68 "NVICIP104,Interrupt Priority Register n" hexmask.byte 0x68 0.--7. 1. "PRI104,Priority of interrupt 104" line.byte 0x69 "NVICIP105,Interrupt Priority Register n" hexmask.byte 0x69 0.--7. 1. "PRI105,Priority of interrupt 105" line.byte 0x6A "NVICIP106,Interrupt Priority Register n" hexmask.byte 0x6A 0.--7. 1. "PRI106,Priority of interrupt 106" line.byte 0x6B "NVICIP107,Interrupt Priority Register n" hexmask.byte 0x6B 0.--7. 1. "PRI107,Priority of interrupt 107" line.byte 0x6C "NVICIP108,Interrupt Priority Register n" hexmask.byte 0x6C 0.--7. 1. "PRI108,Priority of interrupt 108" line.byte 0x6D "NVICIP109,Interrupt Priority Register n" hexmask.byte 0x6D 0.--7. 1. "PRI109,Priority of interrupt 109" line.byte 0x6E "NVICIP110,Interrupt Priority Register n" hexmask.byte 0x6E 0.--7. 1. "PRI110,Priority of interrupt 110" line.byte 0x6F "NVICIP111,Interrupt Priority Register n" hexmask.byte 0x6F 0.--7. 1. "PRI111,Priority of interrupt 111" line.byte 0x70 "NVICIP112,Interrupt Priority Register n" hexmask.byte 0x70 0.--7. 1. "PRI112,Priority of interrupt 112" line.byte 0x71 "NVICIP113,Interrupt Priority Register n" hexmask.byte 0x71 0.--7. 1. "PRI113,Priority of interrupt 113" line.byte 0x72 "NVICIP114,Interrupt Priority Register n" hexmask.byte 0x72 0.--7. 1. "PRI114,Priority of interrupt 114" line.byte 0x73 "NVICIP115,Interrupt Priority Register n" hexmask.byte 0x73 0.--7. 1. "PRI115,Priority of interrupt 115" line.byte 0x74 "NVICIP116,Interrupt Priority Register n" hexmask.byte 0x74 0.--7. 1. "PRI116,Priority of interrupt 116" line.byte 0x75 "NVICIP117,Interrupt Priority Register n" hexmask.byte 0x75 0.--7. 1. "PRI117,Priority of interrupt 117" line.byte 0x76 "NVICIP118,Interrupt Priority Register n" hexmask.byte 0x76 0.--7. 1. "PRI118,Priority of interrupt 118" line.byte 0x77 "NVICIP119,Interrupt Priority Register n" hexmask.byte 0x77 0.--7. 1. "PRI119,Priority of interrupt 119" line.byte 0x78 "NVICIP120,Interrupt Priority Register n" hexmask.byte 0x78 0.--7. 1. "PRI120,Priority of interrupt 120" line.byte 0x79 "NVICIP121,Interrupt Priority Register n" hexmask.byte 0x79 0.--7. 1. "PRI121,Priority of interrupt 121" line.byte 0x7A "NVICIP122,Interrupt Priority Register n" hexmask.byte 0x7A 0.--7. 1. "PRI122,Priority of interrupt 122" wgroup.long 0xE00++0x3 line.long 0x0 "NVICSTIR,Software Trigger Interrupt Register" hexmask.long.word 0x0 0.--8. 1. "INTID,Interrupt ID of the interrupt to trigger in the range 0-239. For example a value of 0x03 specifies interrupt IRQ3." endif sif (cpuis("S32K144*")) group.long 0x0++0xF line.long 0x0 "NVICISER0,Interrupt Set Enable Register n" hexmask.long 0x0 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0x4 "NVICISER1,Interrupt Set Enable Register n" hexmask.long 0x4 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0x8 "NVICISER2,Interrupt Set Enable Register n" hexmask.long 0x8 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0xC "NVICISER3,Interrupt Set Enable Register n" hexmask.long 0xC 0.--31. 1. "SETENA,Interrupt set enable bits" group.long 0x80++0xF line.long 0x0 "NVICICER0,Interrupt Clear Enable Register n" hexmask.long 0x0 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0x4 "NVICICER1,Interrupt Clear Enable Register n" hexmask.long 0x4 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0x8 "NVICICER2,Interrupt Clear Enable Register n" hexmask.long 0x8 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0xC "NVICICER3,Interrupt Clear Enable Register n" hexmask.long 0xC 0.--31. 1. "CLRENA,Interrupt clear-enable bits" group.long 0x100++0xF line.long 0x0 "NVICISPR0,Interrupt Set Pending Register n" hexmask.long 0x0 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0x4 "NVICISPR1,Interrupt Set Pending Register n" hexmask.long 0x4 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0x8 "NVICISPR2,Interrupt Set Pending Register n" hexmask.long 0x8 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0xC "NVICISPR3,Interrupt Set Pending Register n" hexmask.long 0xC 0.--31. 1. "SETPEND,Interrupt set-pending bits" group.long 0x180++0xF line.long 0x0 "NVICICPR0,Interrupt Clear Pending Register n" hexmask.long 0x0 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0x4 "NVICICPR1,Interrupt Clear Pending Register n" hexmask.long 0x4 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0x8 "NVICICPR2,Interrupt Clear Pending Register n" hexmask.long 0x8 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0xC "NVICICPR3,Interrupt Clear Pending Register n" hexmask.long 0xC 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" group.long 0x200++0xF line.long 0x0 "NVICIABR0,Interrupt Active bit Register n" hexmask.long 0x0 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0x4 "NVICIABR1,Interrupt Active bit Register n" hexmask.long 0x4 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0x8 "NVICIABR2,Interrupt Active bit Register n" hexmask.long 0x8 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0xC "NVICIABR3,Interrupt Active bit Register n" hexmask.long 0xC 0.--31. 1. "ACTIVE,Interrupt active flags" group.byte 0x300++0x7A line.byte 0x0 "NVICIP0,Interrupt Priority Register n" hexmask.byte 0x0 0.--7. 1. "PRI0,Priority of interrupt 0" line.byte 0x1 "NVICIP1,Interrupt Priority Register n" hexmask.byte 0x1 0.--7. 1. "PRI1,Priority of interrupt 1" line.byte 0x2 "NVICIP2,Interrupt Priority Register n" hexmask.byte 0x2 0.--7. 1. "PRI2,Priority of interrupt 2" line.byte 0x3 "NVICIP3,Interrupt Priority Register n" hexmask.byte 0x3 0.--7. 1. "PRI3,Priority of interrupt 3" line.byte 0x4 "NVICIP4,Interrupt Priority Register n" hexmask.byte 0x4 0.--7. 1. "PRI4,Priority of interrupt 4" line.byte 0x5 "NVICIP5,Interrupt Priority Register n" hexmask.byte 0x5 0.--7. 1. "PRI5,Priority of interrupt 5" line.byte 0x6 "NVICIP6,Interrupt Priority Register n" hexmask.byte 0x6 0.--7. 1. "PRI6,Priority of interrupt 6" line.byte 0x7 "NVICIP7,Interrupt Priority Register n" hexmask.byte 0x7 0.--7. 1. "PRI7,Priority of interrupt 7" line.byte 0x8 "NVICIP8,Interrupt Priority Register n" hexmask.byte 0x8 0.--7. 1. "PRI8,Priority of interrupt 8" line.byte 0x9 "NVICIP9,Interrupt Priority Register n" hexmask.byte 0x9 0.--7. 1. "PRI9,Priority of interrupt 9" line.byte 0xA "NVICIP10,Interrupt Priority Register n" hexmask.byte 0xA 0.--7. 1. "PRI10,Priority of interrupt 10" line.byte 0xB "NVICIP11,Interrupt Priority Register n" hexmask.byte 0xB 0.--7. 1. "PRI11,Priority of interrupt 11" line.byte 0xC "NVICIP12,Interrupt Priority Register n" hexmask.byte 0xC 0.--7. 1. "PRI12,Priority of interrupt 12" line.byte 0xD "NVICIP13,Interrupt Priority Register n" hexmask.byte 0xD 0.--7. 1. "PRI13,Priority of interrupt 13" line.byte 0xE "NVICIP14,Interrupt Priority Register n" hexmask.byte 0xE 0.--7. 1. "PRI14,Priority of interrupt 14" line.byte 0xF "NVICIP15,Interrupt Priority Register n" hexmask.byte 0xF 0.--7. 1. "PRI15,Priority of interrupt 15" line.byte 0x10 "NVICIP16,Interrupt Priority Register n" hexmask.byte 0x10 0.--7. 1. "PRI16,Priority of interrupt 16" line.byte 0x11 "NVICIP17,Interrupt Priority Register n" hexmask.byte 0x11 0.--7. 1. "PRI17,Priority of interrupt 17" line.byte 0x12 "NVICIP18,Interrupt Priority Register n" hexmask.byte 0x12 0.--7. 1. "PRI18,Priority of interrupt 18" line.byte 0x13 "NVICIP19,Interrupt Priority Register n" hexmask.byte 0x13 0.--7. 1. "PRI19,Priority of interrupt 19" line.byte 0x14 "NVICIP20,Interrupt Priority Register n" hexmask.byte 0x14 0.--7. 1. "PRI20,Priority of interrupt 20" line.byte 0x15 "NVICIP21,Interrupt Priority Register n" hexmask.byte 0x15 0.--7. 1. "PRI21,Priority of interrupt 21" line.byte 0x16 "NVICIP22,Interrupt Priority Register n" hexmask.byte 0x16 0.--7. 1. "PRI22,Priority of interrupt 22" line.byte 0x17 "NVICIP23,Interrupt Priority Register n" hexmask.byte 0x17 0.--7. 1. "PRI23,Priority of interrupt 23" line.byte 0x18 "NVICIP24,Interrupt Priority Register n" hexmask.byte 0x18 0.--7. 1. "PRI24,Priority of interrupt 24" line.byte 0x19 "NVICIP25,Interrupt Priority Register n" hexmask.byte 0x19 0.--7. 1. "PRI25,Priority of interrupt 25" line.byte 0x1A "NVICIP26,Interrupt Priority Register n" hexmask.byte 0x1A 0.--7. 1. "PRI26,Priority of interrupt 26" line.byte 0x1B "NVICIP27,Interrupt Priority Register n" hexmask.byte 0x1B 0.--7. 1. "PRI27,Priority of interrupt 27" line.byte 0x1C "NVICIP28,Interrupt Priority Register n" hexmask.byte 0x1C 0.--7. 1. "PRI28,Priority of interrupt 28" line.byte 0x1D "NVICIP29,Interrupt Priority Register n" hexmask.byte 0x1D 0.--7. 1. "PRI29,Priority of interrupt 29" line.byte 0x1E "NVICIP30,Interrupt Priority Register n" hexmask.byte 0x1E 0.--7. 1. "PRI30,Priority of interrupt 30" line.byte 0x1F "NVICIP31,Interrupt Priority Register n" hexmask.byte 0x1F 0.--7. 1. "PRI31,Priority of interrupt 31" line.byte 0x20 "NVICIP32,Interrupt Priority Register n" hexmask.byte 0x20 0.--7. 1. "PRI32,Priority of interrupt 32" line.byte 0x21 "NVICIP33,Interrupt Priority Register n" hexmask.byte 0x21 0.--7. 1. "PRI33,Priority of interrupt 33" line.byte 0x22 "NVICIP34,Interrupt Priority Register n" hexmask.byte 0x22 0.--7. 1. "PRI34,Priority of interrupt 34" line.byte 0x23 "NVICIP35,Interrupt Priority Register n" hexmask.byte 0x23 0.--7. 1. "PRI35,Priority of interrupt 35" line.byte 0x24 "NVICIP36,Interrupt Priority Register n" hexmask.byte 0x24 0.--7. 1. "PRI36,Priority of interrupt 36" line.byte 0x25 "NVICIP37,Interrupt Priority Register n" hexmask.byte 0x25 0.--7. 1. "PRI37,Priority of interrupt 37" line.byte 0x26 "NVICIP38,Interrupt Priority Register n" hexmask.byte 0x26 0.--7. 1. "PRI38,Priority of interrupt 38" line.byte 0x27 "NVICIP39,Interrupt Priority Register n" hexmask.byte 0x27 0.--7. 1. "PRI39,Priority of interrupt 39" line.byte 0x28 "NVICIP40,Interrupt Priority Register n" hexmask.byte 0x28 0.--7. 1. "PRI40,Priority of interrupt 40" line.byte 0x29 "NVICIP41,Interrupt Priority Register n" hexmask.byte 0x29 0.--7. 1. "PRI41,Priority of interrupt 41" line.byte 0x2A "NVICIP42,Interrupt Priority Register n" hexmask.byte 0x2A 0.--7. 1. "PRI42,Priority of interrupt 42" line.byte 0x2B "NVICIP43,Interrupt Priority Register n" hexmask.byte 0x2B 0.--7. 1. "PRI43,Priority of interrupt 43" line.byte 0x2C "NVICIP44,Interrupt Priority Register n" hexmask.byte 0x2C 0.--7. 1. "PRI44,Priority of interrupt 44" line.byte 0x2D "NVICIP45,Interrupt Priority Register n" hexmask.byte 0x2D 0.--7. 1. "PRI45,Priority of interrupt 45" line.byte 0x2E "NVICIP46,Interrupt Priority Register n" hexmask.byte 0x2E 0.--7. 1. "PRI46,Priority of interrupt 46" line.byte 0x2F "NVICIP47,Interrupt Priority Register n" hexmask.byte 0x2F 0.--7. 1. "PRI47,Priority of interrupt 47" line.byte 0x30 "NVICIP48,Interrupt Priority Register n" hexmask.byte 0x30 0.--7. 1. "PRI48,Priority of interrupt 48" line.byte 0x31 "NVICIP49,Interrupt Priority Register n" hexmask.byte 0x31 0.--7. 1. "PRI49,Priority of interrupt 49" line.byte 0x32 "NVICIP50,Interrupt Priority Register n" hexmask.byte 0x32 0.--7. 1. "PRI50,Priority of interrupt 50" line.byte 0x33 "NVICIP51,Interrupt Priority Register n" hexmask.byte 0x33 0.--7. 1. "PRI51,Priority of interrupt 51" line.byte 0x34 "NVICIP52,Interrupt Priority Register n" hexmask.byte 0x34 0.--7. 1. "PRI52,Priority of interrupt 52" line.byte 0x35 "NVICIP53,Interrupt Priority Register n" hexmask.byte 0x35 0.--7. 1. "PRI53,Priority of interrupt 53" line.byte 0x36 "NVICIP54,Interrupt Priority Register n" hexmask.byte 0x36 0.--7. 1. "PRI54,Priority of interrupt 54" line.byte 0x37 "NVICIP55,Interrupt Priority Register n" hexmask.byte 0x37 0.--7. 1. "PRI55,Priority of interrupt 55" line.byte 0x38 "NVICIP56,Interrupt Priority Register n" hexmask.byte 0x38 0.--7. 1. "PRI56,Priority of interrupt 56" line.byte 0x39 "NVICIP57,Interrupt Priority Register n" hexmask.byte 0x39 0.--7. 1. "PRI57,Priority of interrupt 57" line.byte 0x3A "NVICIP58,Interrupt Priority Register n" hexmask.byte 0x3A 0.--7. 1. "PRI58,Priority of interrupt 58" line.byte 0x3B "NVICIP59,Interrupt Priority Register n" hexmask.byte 0x3B 0.--7. 1. "PRI59,Priority of interrupt 59" line.byte 0x3C "NVICIP60,Interrupt Priority Register n" hexmask.byte 0x3C 0.--7. 1. "PRI60,Priority of interrupt 60" line.byte 0x3D "NVICIP61,Interrupt Priority Register n" hexmask.byte 0x3D 0.--7. 1. "PRI61,Priority of interrupt 61" line.byte 0x3E "NVICIP62,Interrupt Priority Register n" hexmask.byte 0x3E 0.--7. 1. "PRI62,Priority of interrupt 62" line.byte 0x3F "NVICIP63,Interrupt Priority Register n" hexmask.byte 0x3F 0.--7. 1. "PRI63,Priority of interrupt 63" line.byte 0x40 "NVICIP64,Interrupt Priority Register n" hexmask.byte 0x40 0.--7. 1. "PRI64,Priority of interrupt 64" line.byte 0x41 "NVICIP65,Interrupt Priority Register n" hexmask.byte 0x41 0.--7. 1. "PRI65,Priority of interrupt 65" line.byte 0x42 "NVICIP66,Interrupt Priority Register n" hexmask.byte 0x42 0.--7. 1. "PRI66,Priority of interrupt 66" line.byte 0x43 "NVICIP67,Interrupt Priority Register n" hexmask.byte 0x43 0.--7. 1. "PRI67,Priority of interrupt 67" line.byte 0x44 "NVICIP68,Interrupt Priority Register n" hexmask.byte 0x44 0.--7. 1. "PRI68,Priority of interrupt 68" line.byte 0x45 "NVICIP69,Interrupt Priority Register n" hexmask.byte 0x45 0.--7. 1. "PRI69,Priority of interrupt 69" line.byte 0x46 "NVICIP70,Interrupt Priority Register n" hexmask.byte 0x46 0.--7. 1. "PRI70,Priority of interrupt 70" line.byte 0x47 "NVICIP71,Interrupt Priority Register n" hexmask.byte 0x47 0.--7. 1. "PRI71,Priority of interrupt 71" line.byte 0x48 "NVICIP72,Interrupt Priority Register n" hexmask.byte 0x48 0.--7. 1. "PRI72,Priority of interrupt 72" line.byte 0x49 "NVICIP73,Interrupt Priority Register n" hexmask.byte 0x49 0.--7. 1. "PRI73,Priority of interrupt 73" line.byte 0x4A "NVICIP74,Interrupt Priority Register n" hexmask.byte 0x4A 0.--7. 1. "PRI74,Priority of interrupt 74" line.byte 0x4B "NVICIP75,Interrupt Priority Register n" hexmask.byte 0x4B 0.--7. 1. "PRI75,Priority of interrupt 75" line.byte 0x4C "NVICIP76,Interrupt Priority Register n" hexmask.byte 0x4C 0.--7. 1. "PRI76,Priority of interrupt 76" line.byte 0x4D "NVICIP77,Interrupt Priority Register n" hexmask.byte 0x4D 0.--7. 1. "PRI77,Priority of interrupt 77" line.byte 0x4E "NVICIP78,Interrupt Priority Register n" hexmask.byte 0x4E 0.--7. 1. "PRI78,Priority of interrupt 78" line.byte 0x4F "NVICIP79,Interrupt Priority Register n" hexmask.byte 0x4F 0.--7. 1. "PRI79,Priority of interrupt 79" line.byte 0x50 "NVICIP80,Interrupt Priority Register n" hexmask.byte 0x50 0.--7. 1. "PRI80,Priority of interrupt 80" line.byte 0x51 "NVICIP81,Interrupt Priority Register n" hexmask.byte 0x51 0.--7. 1. "PRI81,Priority of interrupt 81" line.byte 0x52 "NVICIP82,Interrupt Priority Register n" hexmask.byte 0x52 0.--7. 1. "PRI82,Priority of interrupt 82" line.byte 0x53 "NVICIP83,Interrupt Priority Register n" hexmask.byte 0x53 0.--7. 1. "PRI83,Priority of interrupt 83" line.byte 0x54 "NVICIP84,Interrupt Priority Register n" hexmask.byte 0x54 0.--7. 1. "PRI84,Priority of interrupt 84" line.byte 0x55 "NVICIP85,Interrupt Priority Register n" hexmask.byte 0x55 0.--7. 1. "PRI85,Priority of interrupt 85" line.byte 0x56 "NVICIP86,Interrupt Priority Register n" hexmask.byte 0x56 0.--7. 1. "PRI86,Priority of interrupt 86" line.byte 0x57 "NVICIP87,Interrupt Priority Register n" hexmask.byte 0x57 0.--7. 1. "PRI87,Priority of interrupt 87" line.byte 0x58 "NVICIP88,Interrupt Priority Register n" hexmask.byte 0x58 0.--7. 1. "PRI88,Priority of interrupt 88" line.byte 0x59 "NVICIP89,Interrupt Priority Register n" hexmask.byte 0x59 0.--7. 1. "PRI89,Priority of interrupt 89" line.byte 0x5A "NVICIP90,Interrupt Priority Register n" hexmask.byte 0x5A 0.--7. 1. "PRI90,Priority of interrupt 90" line.byte 0x5B "NVICIP91,Interrupt Priority Register n" hexmask.byte 0x5B 0.--7. 1. "PRI91,Priority of interrupt 91" line.byte 0x5C "NVICIP92,Interrupt Priority Register n" hexmask.byte 0x5C 0.--7. 1. "PRI92,Priority of interrupt 92" line.byte 0x5D "NVICIP93,Interrupt Priority Register n" hexmask.byte 0x5D 0.--7. 1. "PRI93,Priority of interrupt 93" line.byte 0x5E "NVICIP94,Interrupt Priority Register n" hexmask.byte 0x5E 0.--7. 1. "PRI94,Priority of interrupt 94" line.byte 0x5F "NVICIP95,Interrupt Priority Register n" hexmask.byte 0x5F 0.--7. 1. "PRI95,Priority of interrupt 95" line.byte 0x60 "NVICIP96,Interrupt Priority Register n" hexmask.byte 0x60 0.--7. 1. "PRI96,Priority of interrupt 96" line.byte 0x61 "NVICIP97,Interrupt Priority Register n" hexmask.byte 0x61 0.--7. 1. "PRI97,Priority of interrupt 97" line.byte 0x62 "NVICIP98,Interrupt Priority Register n" hexmask.byte 0x62 0.--7. 1. "PRI98,Priority of interrupt 98" line.byte 0x63 "NVICIP99,Interrupt Priority Register n" hexmask.byte 0x63 0.--7. 1. "PRI99,Priority of interrupt 99" line.byte 0x64 "NVICIP100,Interrupt Priority Register n" hexmask.byte 0x64 0.--7. 1. "PRI100,Priority of interrupt 100" line.byte 0x65 "NVICIP101,Interrupt Priority Register n" hexmask.byte 0x65 0.--7. 1. "PRI101,Priority of interrupt 101" line.byte 0x66 "NVICIP102,Interrupt Priority Register n" hexmask.byte 0x66 0.--7. 1. "PRI102,Priority of interrupt 102" line.byte 0x67 "NVICIP103,Interrupt Priority Register n" hexmask.byte 0x67 0.--7. 1. "PRI103,Priority of interrupt 103" line.byte 0x68 "NVICIP104,Interrupt Priority Register n" hexmask.byte 0x68 0.--7. 1. "PRI104,Priority of interrupt 104" line.byte 0x69 "NVICIP105,Interrupt Priority Register n" hexmask.byte 0x69 0.--7. 1. "PRI105,Priority of interrupt 105" line.byte 0x6A "NVICIP106,Interrupt Priority Register n" hexmask.byte 0x6A 0.--7. 1. "PRI106,Priority of interrupt 106" line.byte 0x6B "NVICIP107,Interrupt Priority Register n" hexmask.byte 0x6B 0.--7. 1. "PRI107,Priority of interrupt 107" line.byte 0x6C "NVICIP108,Interrupt Priority Register n" hexmask.byte 0x6C 0.--7. 1. "PRI108,Priority of interrupt 108" line.byte 0x6D "NVICIP109,Interrupt Priority Register n" hexmask.byte 0x6D 0.--7. 1. "PRI109,Priority of interrupt 109" line.byte 0x6E "NVICIP110,Interrupt Priority Register n" hexmask.byte 0x6E 0.--7. 1. "PRI110,Priority of interrupt 110" line.byte 0x6F "NVICIP111,Interrupt Priority Register n" hexmask.byte 0x6F 0.--7. 1. "PRI111,Priority of interrupt 111" line.byte 0x70 "NVICIP112,Interrupt Priority Register n" hexmask.byte 0x70 0.--7. 1. "PRI112,Priority of interrupt 112" line.byte 0x71 "NVICIP113,Interrupt Priority Register n" hexmask.byte 0x71 0.--7. 1. "PRI113,Priority of interrupt 113" line.byte 0x72 "NVICIP114,Interrupt Priority Register n" hexmask.byte 0x72 0.--7. 1. "PRI114,Priority of interrupt 114" line.byte 0x73 "NVICIP115,Interrupt Priority Register n" hexmask.byte 0x73 0.--7. 1. "PRI115,Priority of interrupt 115" line.byte 0x74 "NVICIP116,Interrupt Priority Register n" hexmask.byte 0x74 0.--7. 1. "PRI116,Priority of interrupt 116" line.byte 0x75 "NVICIP117,Interrupt Priority Register n" hexmask.byte 0x75 0.--7. 1. "PRI117,Priority of interrupt 117" line.byte 0x76 "NVICIP118,Interrupt Priority Register n" hexmask.byte 0x76 0.--7. 1. "PRI118,Priority of interrupt 118" line.byte 0x77 "NVICIP119,Interrupt Priority Register n" hexmask.byte 0x77 0.--7. 1. "PRI119,Priority of interrupt 119" line.byte 0x78 "NVICIP120,Interrupt Priority Register n" hexmask.byte 0x78 0.--7. 1. "PRI120,Priority of interrupt 120" line.byte 0x79 "NVICIP121,Interrupt Priority Register n" hexmask.byte 0x79 0.--7. 1. "PRI121,Priority of interrupt 121" line.byte 0x7A "NVICIP122,Interrupt Priority Register n" hexmask.byte 0x7A 0.--7. 1. "PRI122,Priority of interrupt 122" wgroup.long 0xE00++0x3 line.long 0x0 "NVICSTIR,Software Trigger Interrupt Register" hexmask.long.word 0x0 0.--8. 1. "INTID,Interrupt ID of the interrupt to trigger in the range 0-239. For example a value of 0x03 specifies interrupt IRQ3." endif sif (cpuis("S32K146*")) group.long 0x0++0xF line.long 0x0 "NVICISER0,Interrupt Set Enable Register n" hexmask.long 0x0 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0x4 "NVICISER1,Interrupt Set Enable Register n" hexmask.long 0x4 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0x8 "NVICISER2,Interrupt Set Enable Register n" hexmask.long 0x8 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0xC "NVICISER3,Interrupt Set Enable Register n" hexmask.long 0xC 0.--31. 1. "SETENA,Interrupt set enable bits" group.long 0x80++0xF line.long 0x0 "NVICICER0,Interrupt Clear Enable Register n" hexmask.long 0x0 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0x4 "NVICICER1,Interrupt Clear Enable Register n" hexmask.long 0x4 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0x8 "NVICICER2,Interrupt Clear Enable Register n" hexmask.long 0x8 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0xC "NVICICER3,Interrupt Clear Enable Register n" hexmask.long 0xC 0.--31. 1. "CLRENA,Interrupt clear-enable bits" group.long 0x100++0xF line.long 0x0 "NVICISPR0,Interrupt Set Pending Register n" hexmask.long 0x0 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0x4 "NVICISPR1,Interrupt Set Pending Register n" hexmask.long 0x4 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0x8 "NVICISPR2,Interrupt Set Pending Register n" hexmask.long 0x8 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0xC "NVICISPR3,Interrupt Set Pending Register n" hexmask.long 0xC 0.--31. 1. "SETPEND,Interrupt set-pending bits" group.long 0x180++0xF line.long 0x0 "NVICICPR0,Interrupt Clear Pending Register n" hexmask.long 0x0 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0x4 "NVICICPR1,Interrupt Clear Pending Register n" hexmask.long 0x4 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0x8 "NVICICPR2,Interrupt Clear Pending Register n" hexmask.long 0x8 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0xC "NVICICPR3,Interrupt Clear Pending Register n" hexmask.long 0xC 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" group.long 0x200++0xF line.long 0x0 "NVICIABR0,Interrupt Active bit Register n" hexmask.long 0x0 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0x4 "NVICIABR1,Interrupt Active bit Register n" hexmask.long 0x4 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0x8 "NVICIABR2,Interrupt Active bit Register n" hexmask.long 0x8 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0xC "NVICIABR3,Interrupt Active bit Register n" hexmask.long 0xC 0.--31. 1. "ACTIVE,Interrupt active flags" group.byte 0x300++0x7A line.byte 0x0 "NVICIP0,Interrupt Priority Register n" hexmask.byte 0x0 0.--7. 1. "PRI0,Priority of interrupt 0" line.byte 0x1 "NVICIP1,Interrupt Priority Register n" hexmask.byte 0x1 0.--7. 1. "PRI1,Priority of interrupt 1" line.byte 0x2 "NVICIP2,Interrupt Priority Register n" hexmask.byte 0x2 0.--7. 1. "PRI2,Priority of interrupt 2" line.byte 0x3 "NVICIP3,Interrupt Priority Register n" hexmask.byte 0x3 0.--7. 1. "PRI3,Priority of interrupt 3" line.byte 0x4 "NVICIP4,Interrupt Priority Register n" hexmask.byte 0x4 0.--7. 1. "PRI4,Priority of interrupt 4" line.byte 0x5 "NVICIP5,Interrupt Priority Register n" hexmask.byte 0x5 0.--7. 1. "PRI5,Priority of interrupt 5" line.byte 0x6 "NVICIP6,Interrupt Priority Register n" hexmask.byte 0x6 0.--7. 1. "PRI6,Priority of interrupt 6" line.byte 0x7 "NVICIP7,Interrupt Priority Register n" hexmask.byte 0x7 0.--7. 1. "PRI7,Priority of interrupt 7" line.byte 0x8 "NVICIP8,Interrupt Priority Register n" hexmask.byte 0x8 0.--7. 1. "PRI8,Priority of interrupt 8" line.byte 0x9 "NVICIP9,Interrupt Priority Register n" hexmask.byte 0x9 0.--7. 1. "PRI9,Priority of interrupt 9" line.byte 0xA "NVICIP10,Interrupt Priority Register n" hexmask.byte 0xA 0.--7. 1. "PRI10,Priority of interrupt 10" line.byte 0xB "NVICIP11,Interrupt Priority Register n" hexmask.byte 0xB 0.--7. 1. "PRI11,Priority of interrupt 11" line.byte 0xC "NVICIP12,Interrupt Priority Register n" hexmask.byte 0xC 0.--7. 1. "PRI12,Priority of interrupt 12" line.byte 0xD "NVICIP13,Interrupt Priority Register n" hexmask.byte 0xD 0.--7. 1. "PRI13,Priority of interrupt 13" line.byte 0xE "NVICIP14,Interrupt Priority Register n" hexmask.byte 0xE 0.--7. 1. "PRI14,Priority of interrupt 14" line.byte 0xF "NVICIP15,Interrupt Priority Register n" hexmask.byte 0xF 0.--7. 1. "PRI15,Priority of interrupt 15" line.byte 0x10 "NVICIP16,Interrupt Priority Register n" hexmask.byte 0x10 0.--7. 1. "PRI16,Priority of interrupt 16" line.byte 0x11 "NVICIP17,Interrupt Priority Register n" hexmask.byte 0x11 0.--7. 1. "PRI17,Priority of interrupt 17" line.byte 0x12 "NVICIP18,Interrupt Priority Register n" hexmask.byte 0x12 0.--7. 1. "PRI18,Priority of interrupt 18" line.byte 0x13 "NVICIP19,Interrupt Priority Register n" hexmask.byte 0x13 0.--7. 1. "PRI19,Priority of interrupt 19" line.byte 0x14 "NVICIP20,Interrupt Priority Register n" hexmask.byte 0x14 0.--7. 1. "PRI20,Priority of interrupt 20" line.byte 0x15 "NVICIP21,Interrupt Priority Register n" hexmask.byte 0x15 0.--7. 1. "PRI21,Priority of interrupt 21" line.byte 0x16 "NVICIP22,Interrupt Priority Register n" hexmask.byte 0x16 0.--7. 1. "PRI22,Priority of interrupt 22" line.byte 0x17 "NVICIP23,Interrupt Priority Register n" hexmask.byte 0x17 0.--7. 1. "PRI23,Priority of interrupt 23" line.byte 0x18 "NVICIP24,Interrupt Priority Register n" hexmask.byte 0x18 0.--7. 1. "PRI24,Priority of interrupt 24" line.byte 0x19 "NVICIP25,Interrupt Priority Register n" hexmask.byte 0x19 0.--7. 1. "PRI25,Priority of interrupt 25" line.byte 0x1A "NVICIP26,Interrupt Priority Register n" hexmask.byte 0x1A 0.--7. 1. "PRI26,Priority of interrupt 26" line.byte 0x1B "NVICIP27,Interrupt Priority Register n" hexmask.byte 0x1B 0.--7. 1. "PRI27,Priority of interrupt 27" line.byte 0x1C "NVICIP28,Interrupt Priority Register n" hexmask.byte 0x1C 0.--7. 1. "PRI28,Priority of interrupt 28" line.byte 0x1D "NVICIP29,Interrupt Priority Register n" hexmask.byte 0x1D 0.--7. 1. "PRI29,Priority of interrupt 29" line.byte 0x1E "NVICIP30,Interrupt Priority Register n" hexmask.byte 0x1E 0.--7. 1. "PRI30,Priority of interrupt 30" line.byte 0x1F "NVICIP31,Interrupt Priority Register n" hexmask.byte 0x1F 0.--7. 1. "PRI31,Priority of interrupt 31" line.byte 0x20 "NVICIP32,Interrupt Priority Register n" hexmask.byte 0x20 0.--7. 1. "PRI32,Priority of interrupt 32" line.byte 0x21 "NVICIP33,Interrupt Priority Register n" hexmask.byte 0x21 0.--7. 1. "PRI33,Priority of interrupt 33" line.byte 0x22 "NVICIP34,Interrupt Priority Register n" hexmask.byte 0x22 0.--7. 1. "PRI34,Priority of interrupt 34" line.byte 0x23 "NVICIP35,Interrupt Priority Register n" hexmask.byte 0x23 0.--7. 1. "PRI35,Priority of interrupt 35" line.byte 0x24 "NVICIP36,Interrupt Priority Register n" hexmask.byte 0x24 0.--7. 1. "PRI36,Priority of interrupt 36" line.byte 0x25 "NVICIP37,Interrupt Priority Register n" hexmask.byte 0x25 0.--7. 1. "PRI37,Priority of interrupt 37" line.byte 0x26 "NVICIP38,Interrupt Priority Register n" hexmask.byte 0x26 0.--7. 1. "PRI38,Priority of interrupt 38" line.byte 0x27 "NVICIP39,Interrupt Priority Register n" hexmask.byte 0x27 0.--7. 1. "PRI39,Priority of interrupt 39" line.byte 0x28 "NVICIP40,Interrupt Priority Register n" hexmask.byte 0x28 0.--7. 1. "PRI40,Priority of interrupt 40" line.byte 0x29 "NVICIP41,Interrupt Priority Register n" hexmask.byte 0x29 0.--7. 1. "PRI41,Priority of interrupt 41" line.byte 0x2A "NVICIP42,Interrupt Priority Register n" hexmask.byte 0x2A 0.--7. 1. "PRI42,Priority of interrupt 42" line.byte 0x2B "NVICIP43,Interrupt Priority Register n" hexmask.byte 0x2B 0.--7. 1. "PRI43,Priority of interrupt 43" line.byte 0x2C "NVICIP44,Interrupt Priority Register n" hexmask.byte 0x2C 0.--7. 1. "PRI44,Priority of interrupt 44" line.byte 0x2D "NVICIP45,Interrupt Priority Register n" hexmask.byte 0x2D 0.--7. 1. "PRI45,Priority of interrupt 45" line.byte 0x2E "NVICIP46,Interrupt Priority Register n" hexmask.byte 0x2E 0.--7. 1. "PRI46,Priority of interrupt 46" line.byte 0x2F "NVICIP47,Interrupt Priority Register n" hexmask.byte 0x2F 0.--7. 1. "PRI47,Priority of interrupt 47" line.byte 0x30 "NVICIP48,Interrupt Priority Register n" hexmask.byte 0x30 0.--7. 1. "PRI48,Priority of interrupt 48" line.byte 0x31 "NVICIP49,Interrupt Priority Register n" hexmask.byte 0x31 0.--7. 1. "PRI49,Priority of interrupt 49" line.byte 0x32 "NVICIP50,Interrupt Priority Register n" hexmask.byte 0x32 0.--7. 1. "PRI50,Priority of interrupt 50" line.byte 0x33 "NVICIP51,Interrupt Priority Register n" hexmask.byte 0x33 0.--7. 1. "PRI51,Priority of interrupt 51" line.byte 0x34 "NVICIP52,Interrupt Priority Register n" hexmask.byte 0x34 0.--7. 1. "PRI52,Priority of interrupt 52" line.byte 0x35 "NVICIP53,Interrupt Priority Register n" hexmask.byte 0x35 0.--7. 1. "PRI53,Priority of interrupt 53" line.byte 0x36 "NVICIP54,Interrupt Priority Register n" hexmask.byte 0x36 0.--7. 1. "PRI54,Priority of interrupt 54" line.byte 0x37 "NVICIP55,Interrupt Priority Register n" hexmask.byte 0x37 0.--7. 1. "PRI55,Priority of interrupt 55" line.byte 0x38 "NVICIP56,Interrupt Priority Register n" hexmask.byte 0x38 0.--7. 1. "PRI56,Priority of interrupt 56" line.byte 0x39 "NVICIP57,Interrupt Priority Register n" hexmask.byte 0x39 0.--7. 1. "PRI57,Priority of interrupt 57" line.byte 0x3A "NVICIP58,Interrupt Priority Register n" hexmask.byte 0x3A 0.--7. 1. "PRI58,Priority of interrupt 58" line.byte 0x3B "NVICIP59,Interrupt Priority Register n" hexmask.byte 0x3B 0.--7. 1. "PRI59,Priority of interrupt 59" line.byte 0x3C "NVICIP60,Interrupt Priority Register n" hexmask.byte 0x3C 0.--7. 1. "PRI60,Priority of interrupt 60" line.byte 0x3D "NVICIP61,Interrupt Priority Register n" hexmask.byte 0x3D 0.--7. 1. "PRI61,Priority of interrupt 61" line.byte 0x3E "NVICIP62,Interrupt Priority Register n" hexmask.byte 0x3E 0.--7. 1. "PRI62,Priority of interrupt 62" line.byte 0x3F "NVICIP63,Interrupt Priority Register n" hexmask.byte 0x3F 0.--7. 1. "PRI63,Priority of interrupt 63" line.byte 0x40 "NVICIP64,Interrupt Priority Register n" hexmask.byte 0x40 0.--7. 1. "PRI64,Priority of interrupt 64" line.byte 0x41 "NVICIP65,Interrupt Priority Register n" hexmask.byte 0x41 0.--7. 1. "PRI65,Priority of interrupt 65" line.byte 0x42 "NVICIP66,Interrupt Priority Register n" hexmask.byte 0x42 0.--7. 1. "PRI66,Priority of interrupt 66" line.byte 0x43 "NVICIP67,Interrupt Priority Register n" hexmask.byte 0x43 0.--7. 1. "PRI67,Priority of interrupt 67" line.byte 0x44 "NVICIP68,Interrupt Priority Register n" hexmask.byte 0x44 0.--7. 1. "PRI68,Priority of interrupt 68" line.byte 0x45 "NVICIP69,Interrupt Priority Register n" hexmask.byte 0x45 0.--7. 1. "PRI69,Priority of interrupt 69" line.byte 0x46 "NVICIP70,Interrupt Priority Register n" hexmask.byte 0x46 0.--7. 1. "PRI70,Priority of interrupt 70" line.byte 0x47 "NVICIP71,Interrupt Priority Register n" hexmask.byte 0x47 0.--7. 1. "PRI71,Priority of interrupt 71" line.byte 0x48 "NVICIP72,Interrupt Priority Register n" hexmask.byte 0x48 0.--7. 1. "PRI72,Priority of interrupt 72" line.byte 0x49 "NVICIP73,Interrupt Priority Register n" hexmask.byte 0x49 0.--7. 1. "PRI73,Priority of interrupt 73" line.byte 0x4A "NVICIP74,Interrupt Priority Register n" hexmask.byte 0x4A 0.--7. 1. "PRI74,Priority of interrupt 74" line.byte 0x4B "NVICIP75,Interrupt Priority Register n" hexmask.byte 0x4B 0.--7. 1. "PRI75,Priority of interrupt 75" line.byte 0x4C "NVICIP76,Interrupt Priority Register n" hexmask.byte 0x4C 0.--7. 1. "PRI76,Priority of interrupt 76" line.byte 0x4D "NVICIP77,Interrupt Priority Register n" hexmask.byte 0x4D 0.--7. 1. "PRI77,Priority of interrupt 77" line.byte 0x4E "NVICIP78,Interrupt Priority Register n" hexmask.byte 0x4E 0.--7. 1. "PRI78,Priority of interrupt 78" line.byte 0x4F "NVICIP79,Interrupt Priority Register n" hexmask.byte 0x4F 0.--7. 1. "PRI79,Priority of interrupt 79" line.byte 0x50 "NVICIP80,Interrupt Priority Register n" hexmask.byte 0x50 0.--7. 1. "PRI80,Priority of interrupt 80" line.byte 0x51 "NVICIP81,Interrupt Priority Register n" hexmask.byte 0x51 0.--7. 1. "PRI81,Priority of interrupt 81" line.byte 0x52 "NVICIP82,Interrupt Priority Register n" hexmask.byte 0x52 0.--7. 1. "PRI82,Priority of interrupt 82" line.byte 0x53 "NVICIP83,Interrupt Priority Register n" hexmask.byte 0x53 0.--7. 1. "PRI83,Priority of interrupt 83" line.byte 0x54 "NVICIP84,Interrupt Priority Register n" hexmask.byte 0x54 0.--7. 1. "PRI84,Priority of interrupt 84" line.byte 0x55 "NVICIP85,Interrupt Priority Register n" hexmask.byte 0x55 0.--7. 1. "PRI85,Priority of interrupt 85" line.byte 0x56 "NVICIP86,Interrupt Priority Register n" hexmask.byte 0x56 0.--7. 1. "PRI86,Priority of interrupt 86" line.byte 0x57 "NVICIP87,Interrupt Priority Register n" hexmask.byte 0x57 0.--7. 1. "PRI87,Priority of interrupt 87" line.byte 0x58 "NVICIP88,Interrupt Priority Register n" hexmask.byte 0x58 0.--7. 1. "PRI88,Priority of interrupt 88" line.byte 0x59 "NVICIP89,Interrupt Priority Register n" hexmask.byte 0x59 0.--7. 1. "PRI89,Priority of interrupt 89" line.byte 0x5A "NVICIP90,Interrupt Priority Register n" hexmask.byte 0x5A 0.--7. 1. "PRI90,Priority of interrupt 90" line.byte 0x5B "NVICIP91,Interrupt Priority Register n" hexmask.byte 0x5B 0.--7. 1. "PRI91,Priority of interrupt 91" line.byte 0x5C "NVICIP92,Interrupt Priority Register n" hexmask.byte 0x5C 0.--7. 1. "PRI92,Priority of interrupt 92" line.byte 0x5D "NVICIP93,Interrupt Priority Register n" hexmask.byte 0x5D 0.--7. 1. "PRI93,Priority of interrupt 93" line.byte 0x5E "NVICIP94,Interrupt Priority Register n" hexmask.byte 0x5E 0.--7. 1. "PRI94,Priority of interrupt 94" line.byte 0x5F "NVICIP95,Interrupt Priority Register n" hexmask.byte 0x5F 0.--7. 1. "PRI95,Priority of interrupt 95" line.byte 0x60 "NVICIP96,Interrupt Priority Register n" hexmask.byte 0x60 0.--7. 1. "PRI96,Priority of interrupt 96" line.byte 0x61 "NVICIP97,Interrupt Priority Register n" hexmask.byte 0x61 0.--7. 1. "PRI97,Priority of interrupt 97" line.byte 0x62 "NVICIP98,Interrupt Priority Register n" hexmask.byte 0x62 0.--7. 1. "PRI98,Priority of interrupt 98" line.byte 0x63 "NVICIP99,Interrupt Priority Register n" hexmask.byte 0x63 0.--7. 1. "PRI99,Priority of interrupt 99" line.byte 0x64 "NVICIP100,Interrupt Priority Register n" hexmask.byte 0x64 0.--7. 1. "PRI100,Priority of interrupt 100" line.byte 0x65 "NVICIP101,Interrupt Priority Register n" hexmask.byte 0x65 0.--7. 1. "PRI101,Priority of interrupt 101" line.byte 0x66 "NVICIP102,Interrupt Priority Register n" hexmask.byte 0x66 0.--7. 1. "PRI102,Priority of interrupt 102" line.byte 0x67 "NVICIP103,Interrupt Priority Register n" hexmask.byte 0x67 0.--7. 1. "PRI103,Priority of interrupt 103" line.byte 0x68 "NVICIP104,Interrupt Priority Register n" hexmask.byte 0x68 0.--7. 1. "PRI104,Priority of interrupt 104" line.byte 0x69 "NVICIP105,Interrupt Priority Register n" hexmask.byte 0x69 0.--7. 1. "PRI105,Priority of interrupt 105" line.byte 0x6A "NVICIP106,Interrupt Priority Register n" hexmask.byte 0x6A 0.--7. 1. "PRI106,Priority of interrupt 106" line.byte 0x6B "NVICIP107,Interrupt Priority Register n" hexmask.byte 0x6B 0.--7. 1. "PRI107,Priority of interrupt 107" line.byte 0x6C "NVICIP108,Interrupt Priority Register n" hexmask.byte 0x6C 0.--7. 1. "PRI108,Priority of interrupt 108" line.byte 0x6D "NVICIP109,Interrupt Priority Register n" hexmask.byte 0x6D 0.--7. 1. "PRI109,Priority of interrupt 109" line.byte 0x6E "NVICIP110,Interrupt Priority Register n" hexmask.byte 0x6E 0.--7. 1. "PRI110,Priority of interrupt 110" line.byte 0x6F "NVICIP111,Interrupt Priority Register n" hexmask.byte 0x6F 0.--7. 1. "PRI111,Priority of interrupt 111" line.byte 0x70 "NVICIP112,Interrupt Priority Register n" hexmask.byte 0x70 0.--7. 1. "PRI112,Priority of interrupt 112" line.byte 0x71 "NVICIP113,Interrupt Priority Register n" hexmask.byte 0x71 0.--7. 1. "PRI113,Priority of interrupt 113" line.byte 0x72 "NVICIP114,Interrupt Priority Register n" hexmask.byte 0x72 0.--7. 1. "PRI114,Priority of interrupt 114" line.byte 0x73 "NVICIP115,Interrupt Priority Register n" hexmask.byte 0x73 0.--7. 1. "PRI115,Priority of interrupt 115" line.byte 0x74 "NVICIP116,Interrupt Priority Register n" hexmask.byte 0x74 0.--7. 1. "PRI116,Priority of interrupt 116" line.byte 0x75 "NVICIP117,Interrupt Priority Register n" hexmask.byte 0x75 0.--7. 1. "PRI117,Priority of interrupt 117" line.byte 0x76 "NVICIP118,Interrupt Priority Register n" hexmask.byte 0x76 0.--7. 1. "PRI118,Priority of interrupt 118" line.byte 0x77 "NVICIP119,Interrupt Priority Register n" hexmask.byte 0x77 0.--7. 1. "PRI119,Priority of interrupt 119" line.byte 0x78 "NVICIP120,Interrupt Priority Register n" hexmask.byte 0x78 0.--7. 1. "PRI120,Priority of interrupt 120" line.byte 0x79 "NVICIP121,Interrupt Priority Register n" hexmask.byte 0x79 0.--7. 1. "PRI121,Priority of interrupt 121" line.byte 0x7A "NVICIP122,Interrupt Priority Register n" hexmask.byte 0x7A 0.--7. 1. "PRI122,Priority of interrupt 122" wgroup.long 0xE00++0x3 line.long 0x0 "NVICSTIR,Software Trigger Interrupt Register" hexmask.long.word 0x0 0.--8. 1. "INTID,Interrupt ID of the interrupt to trigger in the range 0-239. For example a value of 0x03 specifies interrupt IRQ3." endif sif (cpuis("S32K148*")) group.long 0x0++0xF line.long 0x0 "NVICISER0,Interrupt Set Enable Register n" hexmask.long 0x0 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0x4 "NVICISER1,Interrupt Set Enable Register n" hexmask.long 0x4 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0x8 "NVICISER2,Interrupt Set Enable Register n" hexmask.long 0x8 0.--31. 1. "SETENA,Interrupt set enable bits" line.long 0xC "NVICISER3,Interrupt Set Enable Register n" hexmask.long 0xC 0.--31. 1. "SETENA,Interrupt set enable bits" group.long 0x80++0xF line.long 0x0 "NVICICER0,Interrupt Clear Enable Register n" hexmask.long 0x0 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0x4 "NVICICER1,Interrupt Clear Enable Register n" hexmask.long 0x4 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0x8 "NVICICER2,Interrupt Clear Enable Register n" hexmask.long 0x8 0.--31. 1. "CLRENA,Interrupt clear-enable bits" line.long 0xC "NVICICER3,Interrupt Clear Enable Register n" hexmask.long 0xC 0.--31. 1. "CLRENA,Interrupt clear-enable bits" group.long 0x100++0xF line.long 0x0 "NVICISPR0,Interrupt Set Pending Register n" hexmask.long 0x0 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0x4 "NVICISPR1,Interrupt Set Pending Register n" hexmask.long 0x4 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0x8 "NVICISPR2,Interrupt Set Pending Register n" hexmask.long 0x8 0.--31. 1. "SETPEND,Interrupt set-pending bits" line.long 0xC "NVICISPR3,Interrupt Set Pending Register n" hexmask.long 0xC 0.--31. 1. "SETPEND,Interrupt set-pending bits" group.long 0x180++0xF line.long 0x0 "NVICICPR0,Interrupt Clear Pending Register n" hexmask.long 0x0 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0x4 "NVICICPR1,Interrupt Clear Pending Register n" hexmask.long 0x4 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0x8 "NVICICPR2,Interrupt Clear Pending Register n" hexmask.long 0x8 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" line.long 0xC "NVICICPR3,Interrupt Clear Pending Register n" hexmask.long 0xC 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" group.long 0x200++0xF line.long 0x0 "NVICIABR0,Interrupt Active bit Register n" hexmask.long 0x0 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0x4 "NVICIABR1,Interrupt Active bit Register n" hexmask.long 0x4 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0x8 "NVICIABR2,Interrupt Active bit Register n" hexmask.long 0x8 0.--31. 1. "ACTIVE,Interrupt active flags" line.long 0xC "NVICIABR3,Interrupt Active bit Register n" hexmask.long 0xC 0.--31. 1. "ACTIVE,Interrupt active flags" group.byte 0x300++0x7A line.byte 0x0 "NVICIP0,Interrupt Priority Register n" hexmask.byte 0x0 0.--7. 1. "PRI0,Priority of interrupt 0" line.byte 0x1 "NVICIP1,Interrupt Priority Register n" hexmask.byte 0x1 0.--7. 1. "PRI1,Priority of interrupt 1" line.byte 0x2 "NVICIP2,Interrupt Priority Register n" hexmask.byte 0x2 0.--7. 1. "PRI2,Priority of interrupt 2" line.byte 0x3 "NVICIP3,Interrupt Priority Register n" hexmask.byte 0x3 0.--7. 1. "PRI3,Priority of interrupt 3" line.byte 0x4 "NVICIP4,Interrupt Priority Register n" hexmask.byte 0x4 0.--7. 1. "PRI4,Priority of interrupt 4" line.byte 0x5 "NVICIP5,Interrupt Priority Register n" hexmask.byte 0x5 0.--7. 1. "PRI5,Priority of interrupt 5" line.byte 0x6 "NVICIP6,Interrupt Priority Register n" hexmask.byte 0x6 0.--7. 1. "PRI6,Priority of interrupt 6" line.byte 0x7 "NVICIP7,Interrupt Priority Register n" hexmask.byte 0x7 0.--7. 1. "PRI7,Priority of interrupt 7" line.byte 0x8 "NVICIP8,Interrupt Priority Register n" hexmask.byte 0x8 0.--7. 1. "PRI8,Priority of interrupt 8" line.byte 0x9 "NVICIP9,Interrupt Priority Register n" hexmask.byte 0x9 0.--7. 1. "PRI9,Priority of interrupt 9" line.byte 0xA "NVICIP10,Interrupt Priority Register n" hexmask.byte 0xA 0.--7. 1. "PRI10,Priority of interrupt 10" line.byte 0xB "NVICIP11,Interrupt Priority Register n" hexmask.byte 0xB 0.--7. 1. "PRI11,Priority of interrupt 11" line.byte 0xC "NVICIP12,Interrupt Priority Register n" hexmask.byte 0xC 0.--7. 1. "PRI12,Priority of interrupt 12" line.byte 0xD "NVICIP13,Interrupt Priority Register n" hexmask.byte 0xD 0.--7. 1. "PRI13,Priority of interrupt 13" line.byte 0xE "NVICIP14,Interrupt Priority Register n" hexmask.byte 0xE 0.--7. 1. "PRI14,Priority of interrupt 14" line.byte 0xF "NVICIP15,Interrupt Priority Register n" hexmask.byte 0xF 0.--7. 1. "PRI15,Priority of interrupt 15" line.byte 0x10 "NVICIP16,Interrupt Priority Register n" hexmask.byte 0x10 0.--7. 1. "PRI16,Priority of interrupt 16" line.byte 0x11 "NVICIP17,Interrupt Priority Register n" hexmask.byte 0x11 0.--7. 1. "PRI17,Priority of interrupt 17" line.byte 0x12 "NVICIP18,Interrupt Priority Register n" hexmask.byte 0x12 0.--7. 1. "PRI18,Priority of interrupt 18" line.byte 0x13 "NVICIP19,Interrupt Priority Register n" hexmask.byte 0x13 0.--7. 1. "PRI19,Priority of interrupt 19" line.byte 0x14 "NVICIP20,Interrupt Priority Register n" hexmask.byte 0x14 0.--7. 1. "PRI20,Priority of interrupt 20" line.byte 0x15 "NVICIP21,Interrupt Priority Register n" hexmask.byte 0x15 0.--7. 1. "PRI21,Priority of interrupt 21" line.byte 0x16 "NVICIP22,Interrupt Priority Register n" hexmask.byte 0x16 0.--7. 1. "PRI22,Priority of interrupt 22" line.byte 0x17 "NVICIP23,Interrupt Priority Register n" hexmask.byte 0x17 0.--7. 1. "PRI23,Priority of interrupt 23" line.byte 0x18 "NVICIP24,Interrupt Priority Register n" hexmask.byte 0x18 0.--7. 1. "PRI24,Priority of interrupt 24" line.byte 0x19 "NVICIP25,Interrupt Priority Register n" hexmask.byte 0x19 0.--7. 1. "PRI25,Priority of interrupt 25" line.byte 0x1A "NVICIP26,Interrupt Priority Register n" hexmask.byte 0x1A 0.--7. 1. "PRI26,Priority of interrupt 26" line.byte 0x1B "NVICIP27,Interrupt Priority Register n" hexmask.byte 0x1B 0.--7. 1. "PRI27,Priority of interrupt 27" line.byte 0x1C "NVICIP28,Interrupt Priority Register n" hexmask.byte 0x1C 0.--7. 1. "PRI28,Priority of interrupt 28" line.byte 0x1D "NVICIP29,Interrupt Priority Register n" hexmask.byte 0x1D 0.--7. 1. "PRI29,Priority of interrupt 29" line.byte 0x1E "NVICIP30,Interrupt Priority Register n" hexmask.byte 0x1E 0.--7. 1. "PRI30,Priority of interrupt 30" line.byte 0x1F "NVICIP31,Interrupt Priority Register n" hexmask.byte 0x1F 0.--7. 1. "PRI31,Priority of interrupt 31" line.byte 0x20 "NVICIP32,Interrupt Priority Register n" hexmask.byte 0x20 0.--7. 1. "PRI32,Priority of interrupt 32" line.byte 0x21 "NVICIP33,Interrupt Priority Register n" hexmask.byte 0x21 0.--7. 1. "PRI33,Priority of interrupt 33" line.byte 0x22 "NVICIP34,Interrupt Priority Register n" hexmask.byte 0x22 0.--7. 1. "PRI34,Priority of interrupt 34" line.byte 0x23 "NVICIP35,Interrupt Priority Register n" hexmask.byte 0x23 0.--7. 1. "PRI35,Priority of interrupt 35" line.byte 0x24 "NVICIP36,Interrupt Priority Register n" hexmask.byte 0x24 0.--7. 1. "PRI36,Priority of interrupt 36" line.byte 0x25 "NVICIP37,Interrupt Priority Register n" hexmask.byte 0x25 0.--7. 1. "PRI37,Priority of interrupt 37" line.byte 0x26 "NVICIP38,Interrupt Priority Register n" hexmask.byte 0x26 0.--7. 1. "PRI38,Priority of interrupt 38" line.byte 0x27 "NVICIP39,Interrupt Priority Register n" hexmask.byte 0x27 0.--7. 1. "PRI39,Priority of interrupt 39" line.byte 0x28 "NVICIP40,Interrupt Priority Register n" hexmask.byte 0x28 0.--7. 1. "PRI40,Priority of interrupt 40" line.byte 0x29 "NVICIP41,Interrupt Priority Register n" hexmask.byte 0x29 0.--7. 1. "PRI41,Priority of interrupt 41" line.byte 0x2A "NVICIP42,Interrupt Priority Register n" hexmask.byte 0x2A 0.--7. 1. "PRI42,Priority of interrupt 42" line.byte 0x2B "NVICIP43,Interrupt Priority Register n" hexmask.byte 0x2B 0.--7. 1. "PRI43,Priority of interrupt 43" line.byte 0x2C "NVICIP44,Interrupt Priority Register n" hexmask.byte 0x2C 0.--7. 1. "PRI44,Priority of interrupt 44" line.byte 0x2D "NVICIP45,Interrupt Priority Register n" hexmask.byte 0x2D 0.--7. 1. "PRI45,Priority of interrupt 45" line.byte 0x2E "NVICIP46,Interrupt Priority Register n" hexmask.byte 0x2E 0.--7. 1. "PRI46,Priority of interrupt 46" line.byte 0x2F "NVICIP47,Interrupt Priority Register n" hexmask.byte 0x2F 0.--7. 1. "PRI47,Priority of interrupt 47" line.byte 0x30 "NVICIP48,Interrupt Priority Register n" hexmask.byte 0x30 0.--7. 1. "PRI48,Priority of interrupt 48" line.byte 0x31 "NVICIP49,Interrupt Priority Register n" hexmask.byte 0x31 0.--7. 1. "PRI49,Priority of interrupt 49" line.byte 0x32 "NVICIP50,Interrupt Priority Register n" hexmask.byte 0x32 0.--7. 1. "PRI50,Priority of interrupt 50" line.byte 0x33 "NVICIP51,Interrupt Priority Register n" hexmask.byte 0x33 0.--7. 1. "PRI51,Priority of interrupt 51" line.byte 0x34 "NVICIP52,Interrupt Priority Register n" hexmask.byte 0x34 0.--7. 1. "PRI52,Priority of interrupt 52" line.byte 0x35 "NVICIP53,Interrupt Priority Register n" hexmask.byte 0x35 0.--7. 1. "PRI53,Priority of interrupt 53" line.byte 0x36 "NVICIP54,Interrupt Priority Register n" hexmask.byte 0x36 0.--7. 1. "PRI54,Priority of interrupt 54" line.byte 0x37 "NVICIP55,Interrupt Priority Register n" hexmask.byte 0x37 0.--7. 1. "PRI55,Priority of interrupt 55" line.byte 0x38 "NVICIP56,Interrupt Priority Register n" hexmask.byte 0x38 0.--7. 1. "PRI56,Priority of interrupt 56" line.byte 0x39 "NVICIP57,Interrupt Priority Register n" hexmask.byte 0x39 0.--7. 1. "PRI57,Priority of interrupt 57" line.byte 0x3A "NVICIP58,Interrupt Priority Register n" hexmask.byte 0x3A 0.--7. 1. "PRI58,Priority of interrupt 58" line.byte 0x3B "NVICIP59,Interrupt Priority Register n" hexmask.byte 0x3B 0.--7. 1. "PRI59,Priority of interrupt 59" line.byte 0x3C "NVICIP60,Interrupt Priority Register n" hexmask.byte 0x3C 0.--7. 1. "PRI60,Priority of interrupt 60" line.byte 0x3D "NVICIP61,Interrupt Priority Register n" hexmask.byte 0x3D 0.--7. 1. "PRI61,Priority of interrupt 61" line.byte 0x3E "NVICIP62,Interrupt Priority Register n" hexmask.byte 0x3E 0.--7. 1. "PRI62,Priority of interrupt 62" line.byte 0x3F "NVICIP63,Interrupt Priority Register n" hexmask.byte 0x3F 0.--7. 1. "PRI63,Priority of interrupt 63" line.byte 0x40 "NVICIP64,Interrupt Priority Register n" hexmask.byte 0x40 0.--7. 1. "PRI64,Priority of interrupt 64" line.byte 0x41 "NVICIP65,Interrupt Priority Register n" hexmask.byte 0x41 0.--7. 1. "PRI65,Priority of interrupt 65" line.byte 0x42 "NVICIP66,Interrupt Priority Register n" hexmask.byte 0x42 0.--7. 1. "PRI66,Priority of interrupt 66" line.byte 0x43 "NVICIP67,Interrupt Priority Register n" hexmask.byte 0x43 0.--7. 1. "PRI67,Priority of interrupt 67" line.byte 0x44 "NVICIP68,Interrupt Priority Register n" hexmask.byte 0x44 0.--7. 1. "PRI68,Priority of interrupt 68" line.byte 0x45 "NVICIP69,Interrupt Priority Register n" hexmask.byte 0x45 0.--7. 1. "PRI69,Priority of interrupt 69" line.byte 0x46 "NVICIP70,Interrupt Priority Register n" hexmask.byte 0x46 0.--7. 1. "PRI70,Priority of interrupt 70" line.byte 0x47 "NVICIP71,Interrupt Priority Register n" hexmask.byte 0x47 0.--7. 1. "PRI71,Priority of interrupt 71" line.byte 0x48 "NVICIP72,Interrupt Priority Register n" hexmask.byte 0x48 0.--7. 1. "PRI72,Priority of interrupt 72" line.byte 0x49 "NVICIP73,Interrupt Priority Register n" hexmask.byte 0x49 0.--7. 1. "PRI73,Priority of interrupt 73" line.byte 0x4A "NVICIP74,Interrupt Priority Register n" hexmask.byte 0x4A 0.--7. 1. "PRI74,Priority of interrupt 74" line.byte 0x4B "NVICIP75,Interrupt Priority Register n" hexmask.byte 0x4B 0.--7. 1. "PRI75,Priority of interrupt 75" line.byte 0x4C "NVICIP76,Interrupt Priority Register n" hexmask.byte 0x4C 0.--7. 1. "PRI76,Priority of interrupt 76" line.byte 0x4D "NVICIP77,Interrupt Priority Register n" hexmask.byte 0x4D 0.--7. 1. "PRI77,Priority of interrupt 77" line.byte 0x4E "NVICIP78,Interrupt Priority Register n" hexmask.byte 0x4E 0.--7. 1. "PRI78,Priority of interrupt 78" line.byte 0x4F "NVICIP79,Interrupt Priority Register n" hexmask.byte 0x4F 0.--7. 1. "PRI79,Priority of interrupt 79" line.byte 0x50 "NVICIP80,Interrupt Priority Register n" hexmask.byte 0x50 0.--7. 1. "PRI80,Priority of interrupt 80" line.byte 0x51 "NVICIP81,Interrupt Priority Register n" hexmask.byte 0x51 0.--7. 1. "PRI81,Priority of interrupt 81" line.byte 0x52 "NVICIP82,Interrupt Priority Register n" hexmask.byte 0x52 0.--7. 1. "PRI82,Priority of interrupt 82" line.byte 0x53 "NVICIP83,Interrupt Priority Register n" hexmask.byte 0x53 0.--7. 1. "PRI83,Priority of interrupt 83" line.byte 0x54 "NVICIP84,Interrupt Priority Register n" hexmask.byte 0x54 0.--7. 1. "PRI84,Priority of interrupt 84" line.byte 0x55 "NVICIP85,Interrupt Priority Register n" hexmask.byte 0x55 0.--7. 1. "PRI85,Priority of interrupt 85" line.byte 0x56 "NVICIP86,Interrupt Priority Register n" hexmask.byte 0x56 0.--7. 1. "PRI86,Priority of interrupt 86" line.byte 0x57 "NVICIP87,Interrupt Priority Register n" hexmask.byte 0x57 0.--7. 1. "PRI87,Priority of interrupt 87" line.byte 0x58 "NVICIP88,Interrupt Priority Register n" hexmask.byte 0x58 0.--7. 1. "PRI88,Priority of interrupt 88" line.byte 0x59 "NVICIP89,Interrupt Priority Register n" hexmask.byte 0x59 0.--7. 1. "PRI89,Priority of interrupt 89" line.byte 0x5A "NVICIP90,Interrupt Priority Register n" hexmask.byte 0x5A 0.--7. 1. "PRI90,Priority of interrupt 90" line.byte 0x5B "NVICIP91,Interrupt Priority Register n" hexmask.byte 0x5B 0.--7. 1. "PRI91,Priority of interrupt 91" line.byte 0x5C "NVICIP92,Interrupt Priority Register n" hexmask.byte 0x5C 0.--7. 1. "PRI92,Priority of interrupt 92" line.byte 0x5D "NVICIP93,Interrupt Priority Register n" hexmask.byte 0x5D 0.--7. 1. "PRI93,Priority of interrupt 93" line.byte 0x5E "NVICIP94,Interrupt Priority Register n" hexmask.byte 0x5E 0.--7. 1. "PRI94,Priority of interrupt 94" line.byte 0x5F "NVICIP95,Interrupt Priority Register n" hexmask.byte 0x5F 0.--7. 1. "PRI95,Priority of interrupt 95" line.byte 0x60 "NVICIP96,Interrupt Priority Register n" hexmask.byte 0x60 0.--7. 1. "PRI96,Priority of interrupt 96" line.byte 0x61 "NVICIP97,Interrupt Priority Register n" hexmask.byte 0x61 0.--7. 1. "PRI97,Priority of interrupt 97" line.byte 0x62 "NVICIP98,Interrupt Priority Register n" hexmask.byte 0x62 0.--7. 1. "PRI98,Priority of interrupt 98" line.byte 0x63 "NVICIP99,Interrupt Priority Register n" hexmask.byte 0x63 0.--7. 1. "PRI99,Priority of interrupt 99" line.byte 0x64 "NVICIP100,Interrupt Priority Register n" hexmask.byte 0x64 0.--7. 1. "PRI100,Priority of interrupt 100" line.byte 0x65 "NVICIP101,Interrupt Priority Register n" hexmask.byte 0x65 0.--7. 1. "PRI101,Priority of interrupt 101" line.byte 0x66 "NVICIP102,Interrupt Priority Register n" hexmask.byte 0x66 0.--7. 1. "PRI102,Priority of interrupt 102" line.byte 0x67 "NVICIP103,Interrupt Priority Register n" hexmask.byte 0x67 0.--7. 1. "PRI103,Priority of interrupt 103" line.byte 0x68 "NVICIP104,Interrupt Priority Register n" hexmask.byte 0x68 0.--7. 1. "PRI104,Priority of interrupt 104" line.byte 0x69 "NVICIP105,Interrupt Priority Register n" hexmask.byte 0x69 0.--7. 1. "PRI105,Priority of interrupt 105" line.byte 0x6A "NVICIP106,Interrupt Priority Register n" hexmask.byte 0x6A 0.--7. 1. "PRI106,Priority of interrupt 106" line.byte 0x6B "NVICIP107,Interrupt Priority Register n" hexmask.byte 0x6B 0.--7. 1. "PRI107,Priority of interrupt 107" line.byte 0x6C "NVICIP108,Interrupt Priority Register n" hexmask.byte 0x6C 0.--7. 1. "PRI108,Priority of interrupt 108" line.byte 0x6D "NVICIP109,Interrupt Priority Register n" hexmask.byte 0x6D 0.--7. 1. "PRI109,Priority of interrupt 109" line.byte 0x6E "NVICIP110,Interrupt Priority Register n" hexmask.byte 0x6E 0.--7. 1. "PRI110,Priority of interrupt 110" line.byte 0x6F "NVICIP111,Interrupt Priority Register n" hexmask.byte 0x6F 0.--7. 1. "PRI111,Priority of interrupt 111" line.byte 0x70 "NVICIP112,Interrupt Priority Register n" hexmask.byte 0x70 0.--7. 1. "PRI112,Priority of interrupt 112" line.byte 0x71 "NVICIP113,Interrupt Priority Register n" hexmask.byte 0x71 0.--7. 1. "PRI113,Priority of interrupt 113" line.byte 0x72 "NVICIP114,Interrupt Priority Register n" hexmask.byte 0x72 0.--7. 1. "PRI114,Priority of interrupt 114" line.byte 0x73 "NVICIP115,Interrupt Priority Register n" hexmask.byte 0x73 0.--7. 1. "PRI115,Priority of interrupt 115" line.byte 0x74 "NVICIP116,Interrupt Priority Register n" hexmask.byte 0x74 0.--7. 1. "PRI116,Priority of interrupt 116" line.byte 0x75 "NVICIP117,Interrupt Priority Register n" hexmask.byte 0x75 0.--7. 1. "PRI117,Priority of interrupt 117" line.byte 0x76 "NVICIP118,Interrupt Priority Register n" hexmask.byte 0x76 0.--7. 1. "PRI118,Priority of interrupt 118" line.byte 0x77 "NVICIP119,Interrupt Priority Register n" hexmask.byte 0x77 0.--7. 1. "PRI119,Priority of interrupt 119" line.byte 0x78 "NVICIP120,Interrupt Priority Register n" hexmask.byte 0x78 0.--7. 1. "PRI120,Priority of interrupt 120" line.byte 0x79 "NVICIP121,Interrupt Priority Register n" hexmask.byte 0x79 0.--7. 1. "PRI121,Priority of interrupt 121" line.byte 0x7A "NVICIP122,Interrupt Priority Register n" hexmask.byte 0x7A 0.--7. 1. "PRI122,Priority of interrupt 122" wgroup.long 0xE00++0x3 line.long 0x0 "NVICSTIR,Software Trigger Interrupt Register" hexmask.long.word 0x0 0.--8. 1. "INTID,Interrupt ID of the interrupt to trigger in the range 0-239. For example a value of 0x03 specifies interrupt IRQ3." endif tree.end tree "S32_SCB (System Control Registers)" base ad:0xE000E000 rgroup.long 0x8++0x3 line.long 0x0 "ACTLR,Auxiliary Control Register." sif (cpuis("S32K142*")) bitfld.long 0x0 9. "DISOOFP,Disables floating point instructions completing out of order with respect to integer instructions." "0,1" bitfld.long 0x0 8. "DISFPCA,SBZP / Disables automatic update of CONTROL.FPCA." "0,1" newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 9. "DISOOFP,Disables floating point instructions completing out of order with respect to integer instructions." "0,1" bitfld.long 0x0 8. "DISFPCA,SBZP / Disables automatic update of CONTROL.FPCA." "0,1" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 9. "DISOOFP,Disables floating point instructions completing out of order with respect to integer instructions." "0,1" bitfld.long 0x0 8. "DISFPCA,SBZP / Disables automatic update of CONTROL.FPCA." "0,1" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 9. "DISOOFP,Disables floating point instructions completing out of order with respect to integer instructions." "0,1" bitfld.long 0x0 8. "DISFPCA,SBZP / Disables automatic update of CONTROL.FPCA." "0,1" newline endif sif (cpuis("S32K142*")) bitfld.long 0x0 2. "DISFOLD,Disables folding of IT instructions." "0,1" bitfld.long 0x0 1. "DISDEFWBUF,Disables write buffer use during default memory map accesses." "0,1" newline bitfld.long 0x0 0. "DISMCYCINT,Disables interruption of multi-cycle instructions." "0,1" endif sif (cpuis("S32K144*")) bitfld.long 0x0 2. "DISFOLD,Disables folding of IT instructions." "0,1" newline bitfld.long 0x0 1. "DISDEFWBUF,Disables write buffer use during default memory map accesses." "0,1" bitfld.long 0x0 0. "DISMCYCINT,Disables interruption of multi-cycle instructions." "0,1" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 2. "DISFOLD,Disables folding of IT instructions." "0,1" bitfld.long 0x0 1. "DISDEFWBUF,Disables write buffer use during default memory map accesses." "0,1" newline bitfld.long 0x0 0. "DISMCYCINT,Disables interruption of multi-cycle instructions." "0,1" endif sif (cpuis("S32K148*")) bitfld.long 0x0 2. "DISFOLD,Disables folding of IT instructions." "0,1" newline bitfld.long 0x0 1. "DISDEFWBUF,Disables write buffer use during default memory map accesses." "0,1" bitfld.long 0x0 0. "DISMCYCINT,Disables interruption of multi-cycle instructions." "0,1" endif rgroup.long 0xD00++0x3 line.long 0x0 "CPUID,CPUID Base Register" hexmask.long.byte 0x0 24.--31. 1. "IMPLEMENTER,Implementer code" hexmask.long.byte 0x0 20.--23. 1. "VARIANT,Indicates processor revision: 0x2 = Revision 2" newline hexmask.long.word 0x0 4.--15. 1. "PARTNO,Indicates part number" hexmask.long.byte 0x0 0.--3. 1. "REVISION,Indicates patch release: 0x0 = Patch 0" group.long 0xD04++0xF line.long 0x0 "ICSR,Interrupt Control and State Register" bitfld.long 0x0 31. "NMIPENDSET,NMI set-pending bit" "0: write: no effect; read: NMI exception is not..,1: write: changes NMI exception state to pending;.." bitfld.long 0x0 28. "PENDSVSET,PendSV set-pending bit" "0: write: no effect; read: PendSV exception is not..,1: write: changes PendSV exception state to.." newline bitfld.long 0x0 27. "PENDSVCLR,PendSV clear-pending bit" "0: no effect,1: removes the pending state from the PendSV.." bitfld.long 0x0 26. "PENDSTSET,SysTick exception set-pending bit" "0: write: no effect; read: SysTick exception is not..,1: write: changes SysTick exception state to.." newline bitfld.long 0x0 25. "PENDSTCLR,SysTick exception clear-pending bit" "0: no effect,1: removes the pending state from the SysTick.." sif (cpuis("S32K142*")) rbitfld.long 0x0 23. "ISRPREEMPT,no description available" "0: Will not service,1: Will service a pending exception" newline endif sif (cpuis("S32K144*")) rbitfld.long 0x0 23. "ISRPREEMPT,no description available" "0: Will not service,1: Will service a pending exception" newline endif sif (cpuis("S32K146*")) rbitfld.long 0x0 23. "ISRPREEMPT,no description available" "0: Will not service,1: Will service a pending exception" newline endif sif (cpuis("S32K148*")) rbitfld.long 0x0 23. "ISRPREEMPT,no description available" "0: Will not service,1: Will service a pending exception" newline endif rbitfld.long 0x0 22. "ISRPENDING,Interrupt pending flag excluding NMI and Faults" "0: interrupt not pending,1: interrupt pending" newline hexmask.long.byte 0x0 12.--17. 1. "VECTPENDING,Exception number of the highest priority pending enabled exception" sif (cpuis("S32K142*")) rbitfld.long 0x0 11. "RETTOBASE,Indicates whether there are preempted active exceptions" "0: there are preempted active exceptions to execute,1: there are no active exceptions or the.." newline endif sif (cpuis("S32K144*")) rbitfld.long 0x0 11. "RETTOBASE,Indicates whether there are preempted active exceptions" "0: there are preempted active exceptions to execute,1: there are no active exceptions or the.." newline endif sif (cpuis("S32K146*")) rbitfld.long 0x0 11. "RETTOBASE,Indicates whether there are preempted active exceptions" "0: there are preempted active exceptions to execute,1: there are no active exceptions or the.." newline endif sif (cpuis("S32K148*")) rbitfld.long 0x0 11. "RETTOBASE,Indicates whether there are preempted active exceptions" "0: there are preempted active exceptions to execute,1: there are no active exceptions or the.." newline endif sif (cpuis("S32K116*")||cpuis("S32K118*")) hexmask.long.byte 0x0 0.--5. 1. "VECTACTIVE,Active exception number" endif sif (cpuis("S32K144*")) hexmask.long.word 0x0 0.--8. 1. "VECTACTIVE,Active exception number" endif sif (cpuis("S32K146*")) hexmask.long.word 0x0 0.--8. 1. "VECTACTIVE,Active exception number" endif sif (cpuis("S32K148*")) hexmask.long.word 0x0 0.--8. 1. "VECTACTIVE,Active exception number" endif sif (cpuis("S32K142*")) hexmask.long.word 0x0 0.--8. 1. "VECTACTIVE,Active exception number" endif line.long 0x4 "VTOR,Vector Table Offset Register" hexmask.long 0x4 7.--31. 1. "TBLOFF,Vector table base offset" line.long 0x8 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x8 16.--31. 1. "VECTKEY,Register key" rbitfld.long 0x8 15. "ENDIANNESS,Data endianness implemented" "0: Little-endian,1: Big-endian" newline sif (cpuis("S32K142*")) bitfld.long 0x8 8.--10. "PRIGROUP,Interrupt priority grouping field. This field determines the split of group priority from subpriority." "0,1,2,3,4,5,6,7" newline endif sif (cpuis("S32K144*")) bitfld.long 0x8 8.--10. "PRIGROUP,Interrupt priority grouping field. This field determines the split of group priority from subpriority." "0,1,2,3,4,5,6,7" newline endif sif (cpuis("S32K146*")) bitfld.long 0x8 8.--10. "PRIGROUP,Interrupt priority grouping field. This field determines the split of group priority from subpriority." "0,1,2,3,4,5,6,7" newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 8.--10. "PRIGROUP,Interrupt priority grouping field. This field determines the split of group priority from subpriority." "0,1,2,3,4,5,6,7" newline endif bitfld.long 0x8 2. "SYSRESETREQ,System reset request:" "0: no system reset request,1: asserts a signal to the outer system that.." bitfld.long 0x8 1. "VECTCLRACTIVE,Reserved for debug use. This bit reads as 0. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" newline sif (cpuis("S32K142*")) bitfld.long 0x8 0. "VECTRESET,Reserved for Debug use. This bit reads as 0. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" endif sif (cpuis("S32K144*")) bitfld.long 0x8 0. "VECTRESET,Reserved for Debug use. This bit reads as 0. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" newline endif sif (cpuis("S32K146*")) bitfld.long 0x8 0. "VECTRESET,Reserved for Debug use. This bit reads as 0. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" endif sif (cpuis("S32K148*")) bitfld.long 0x8 0. "VECTRESET,Reserved for Debug use. This bit reads as 0. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" endif line.long 0xC "SCR,System Control Register" bitfld.long 0xC 4. "SEVONPEND,Send Event on Pending bit" "0: only enabled interrupts or events can wakeup the..,1: enabled events and all interrupts including.." bitfld.long 0xC 2. "SLEEPDEEP,Controls whether the processor uses sleep or deep sleep as its low power mode" "0: sleep,1: deep sleep" newline bitfld.long 0xC 1. "SLEEPONEXIT,Indicates sleep-on-exit when returning from Handler mode to Thread mode" "0: o not sleep when returning to Thread mode,1: enter sleep or deep sleep on return from an ISR" rgroup.long 0xD14++0x3 line.long 0x0 "CCR,Configuration and Control Register" sif (cpuis("S32K116*")||cpuis("S32K118*")) rbitfld.long 0x0 9. "STKALIGN,Indicates stack alignment on exception entry" "0,1" rbitfld.long 0x0 3. "UNALIGN_TRP,Always reads as one indicates that all unaligned accesses generate a HardFault" "0,1" newline endif sif (cpuis("S32K142*")) bitfld.long 0x0 9. "STKALIGN,Indicates stack alignment on exception entry" "0: 4-byte aligned,1: 8-byte aligned" bitfld.long 0x0 8. "BFHFNMIGN,Enables handlers with priority -1 or -2 to ignore data BusFaults caused by load and store instructions." "0: data bus faults caused by load and store..,1: handlers running at priority -1 and -2 ignore.." newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 9. "STKALIGN,Indicates stack alignment on exception entry" "0: 4-byte aligned,1: 8-byte aligned" bitfld.long 0x0 8. "BFHFNMIGN,Enables handlers with priority -1 or -2 to ignore data BusFaults caused by load and store instructions." "0: data bus faults caused by load and store..,1: handlers running at priority -1 and -2 ignore.." newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 9. "STKALIGN,Indicates stack alignment on exception entry" "0: 4-byte aligned,1: 8-byte aligned" bitfld.long 0x0 8. "BFHFNMIGN,Enables handlers with priority -1 or -2 to ignore data BusFaults caused by load and store instructions." "0: data bus faults caused by load and store..,1: handlers running at priority -1 and -2 ignore.." newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 9. "STKALIGN,Indicates stack alignment on exception entry" "0: 4-byte aligned,1: 8-byte aligned" bitfld.long 0x0 8. "BFHFNMIGN,Enables handlers with priority -1 or -2 to ignore data BusFaults caused by load and store instructions." "0: data bus faults caused by load and store..,1: handlers running at priority -1 and -2 ignore.." newline endif sif (cpuis("S32K142*")) bitfld.long 0x0 4. "DIV_0_TRP,Enables faulting or halting when the processor executes an SDIV or UDIV instruction with a divisor of 0" "0: do not trap divide by 0,1: trap divide by 0" bitfld.long 0x0 3. "UNALIGN_TRP,Enables unaligned access traps" "0: do not trap unaligned halfword and word accesses,1: trap unaligned halfword and word accesses" newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 4. "DIV_0_TRP,Enables faulting or halting when the processor executes an SDIV or UDIV instruction with a divisor of 0" "0: do not trap divide by 0,1: trap divide by 0" bitfld.long 0x0 3. "UNALIGN_TRP,Enables unaligned access traps" "0: do not trap unaligned halfword and word accesses,1: trap unaligned halfword and word accesses" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 4. "DIV_0_TRP,Enables faulting or halting when the processor executes an SDIV or UDIV instruction with a divisor of 0" "0: do not trap divide by 0,1: trap divide by 0" bitfld.long 0x0 3. "UNALIGN_TRP,Enables unaligned access traps" "0: do not trap unaligned halfword and word accesses,1: trap unaligned halfword and word accesses" newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 4. "DIV_0_TRP,Enables faulting or halting when the processor executes an SDIV or UDIV instruction with a divisor of 0" "0: do not trap divide by 0,1: trap divide by 0" bitfld.long 0x0 3. "UNALIGN_TRP,Enables unaligned access traps" "0: do not trap unaligned halfword and word accesses,1: trap unaligned halfword and word accesses" newline endif sif (cpuis("S32K142*")) bitfld.long 0x0 1. "USERSETMPEND,Enables unprivileged software access to the STIR" "0: disable,1: enable" bitfld.long 0x0 0. "NONBASETHRDENA,no description available" "0: processor can enter Thread mode only when no..,1: processor can enter Thread mode from any level.." newline endif sif (cpuis("S32K144*")) bitfld.long 0x0 1. "USERSETMPEND,Enables unprivileged software access to the STIR" "0: disable,1: enable" bitfld.long 0x0 0. "NONBASETHRDENA,no description available" "0: processor can enter Thread mode only when no..,1: processor can enter Thread mode from any level.." newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 1. "USERSETMPEND,Enables unprivileged software access to the STIR" "0: disable,1: enable" bitfld.long 0x0 0. "NONBASETHRDENA,no description available" "0: processor can enter Thread mode only when no..,1: processor can enter Thread mode from any level.." newline endif sif (cpuis("S32K148*")) bitfld.long 0x0 1. "USERSETMPEND,Enables unprivileged software access to the STIR" "0: disable,1: enable" bitfld.long 0x0 0. "NONBASETHRDENA,no description available" "0: processor can enter Thread mode only when no..,1: processor can enter Thread mode from any level.." endif group.long 0xD1C++0xB line.long 0x0 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x0 24.--31. 1. "PRI_11,Priority of system handler 11 SVCall" line.long 0x4 "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x4 24.--31. 1. "PRI_15,Priority of system handler 15 SysTick exception" hexmask.long.byte 0x4 16.--23. 1. "PRI_14,Priority of system handler 14 PendSV" newline sif (cpuis("S32K142*")) hexmask.long.byte 0x4 0.--7. 1. "PRI_12,Priority of system handler 12 DebugMonitor" endif sif (cpuis("S32K144*")) hexmask.long.byte 0x4 0.--7. 1. "PRI_12,Priority of system handler 12 DebugMonitor" newline endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 0.--7. 1. "PRI_12,Priority of system handler 12 DebugMonitor" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 0.--7. 1. "PRI_12,Priority of system handler 12 DebugMonitor" endif line.long 0x8 "SHCSR,System Handler Control and State Register" sif (cpuis("S32K142*")) bitfld.long 0x8 18. "USGFAULTENA,UsageFault enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" bitfld.long 0x8 17. "BUSFAULTENA,BusFault enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" newline bitfld.long 0x8 16. "MEMFAULTENA,MemManage enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" endif sif (cpuis("S32K144*")) bitfld.long 0x8 18. "USGFAULTENA,UsageFault enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" bitfld.long 0x8 17. "BUSFAULTENA,BusFault enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" newline bitfld.long 0x8 16. "MEMFAULTENA,MemManage enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" endif sif (cpuis("S32K146*")) bitfld.long 0x8 18. "USGFAULTENA,UsageFault enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" bitfld.long 0x8 17. "BUSFAULTENA,BusFault enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" newline bitfld.long 0x8 16. "MEMFAULTENA,MemManage enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" endif sif (cpuis("S32K148*")) bitfld.long 0x8 18. "USGFAULTENA,UsageFault enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" bitfld.long 0x8 17. "BUSFAULTENA,BusFault enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" newline bitfld.long 0x8 16. "MEMFAULTENA,MemManage enable bit set to 1 to enable" "0: disable the exception,1: enable the exception" endif bitfld.long 0x8 15. "SVCALLPENDED,SVCall pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" newline sif (cpuis("S32K142*")) bitfld.long 0x8 14. "BUSFAULTPENDED,BusFault exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" bitfld.long 0x8 13. "MEMFAULTPENDED,MemManage exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" newline bitfld.long 0x8 12. "USGFAULTPENDED,UsageFault exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" bitfld.long 0x8 11. "SYSTICKACT,SysTick exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 10. "PENDSVACT,PendSV exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K144*")) bitfld.long 0x8 14. "BUSFAULTPENDED,BusFault exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" bitfld.long 0x8 13. "MEMFAULTPENDED,MemManage exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" newline bitfld.long 0x8 12. "USGFAULTPENDED,UsageFault exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" bitfld.long 0x8 11. "SYSTICKACT,SysTick exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 10. "PENDSVACT,PendSV exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K146*")) bitfld.long 0x8 14. "BUSFAULTPENDED,BusFault exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" bitfld.long 0x8 13. "MEMFAULTPENDED,MemManage exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" newline bitfld.long 0x8 12. "USGFAULTPENDED,UsageFault exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" bitfld.long 0x8 11. "SYSTICKACT,SysTick exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 10. "PENDSVACT,PendSV exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K148*")) bitfld.long 0x8 14. "BUSFAULTPENDED,BusFault exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" bitfld.long 0x8 13. "MEMFAULTPENDED,MemManage exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" newline bitfld.long 0x8 12. "USGFAULTPENDED,UsageFault exception pending bit reads as 1 if exception is pending" "0: exception is not pending,1: exception is pending" bitfld.long 0x8 11. "SYSTICKACT,SysTick exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 10. "PENDSVACT,PendSV exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K142*")) bitfld.long 0x8 8. "MONITORACT,Debug monitor active bit reads as 1 if Debug monitor is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 7. "SVCALLACT,SVCall active bit reads as 1 if SVC call is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K144*")) bitfld.long 0x8 8. "MONITORACT,Debug monitor active bit reads as 1 if Debug monitor is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 7. "SVCALLACT,SVCall active bit reads as 1 if SVC call is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K146*")) bitfld.long 0x8 8. "MONITORACT,Debug monitor active bit reads as 1 if Debug monitor is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 7. "SVCALLACT,SVCall active bit reads as 1 if SVC call is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K148*")) bitfld.long 0x8 8. "MONITORACT,Debug monitor active bit reads as 1 if Debug monitor is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 7. "SVCALLACT,SVCall active bit reads as 1 if SVC call is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K142*")) bitfld.long 0x8 3. "USGFAULTACT,UsageFault exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline endif sif (cpuis("S32K144*")) bitfld.long 0x8 3. "USGFAULTACT,UsageFault exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline endif sif (cpuis("S32K146*")) bitfld.long 0x8 3. "USGFAULTACT,UsageFault exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 3. "USGFAULTACT,UsageFault exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline endif sif (cpuis("S32K142*")) bitfld.long 0x8 1. "BUSFAULTACT,BusFault exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 0. "MEMFAULTACT,MemManage exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K144*")) bitfld.long 0x8 1. "BUSFAULTACT,BusFault exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 0. "MEMFAULTACT,MemManage exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K146*")) bitfld.long 0x8 1. "BUSFAULTACT,BusFault exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 0. "MEMFAULTACT,MemManage exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" endif sif (cpuis("S32K148*")) bitfld.long 0x8 1. "BUSFAULTACT,BusFault exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" newline bitfld.long 0x8 0. "MEMFAULTACT,MemManage exception active bit reads as 1 if exception is active" "0: exception is not active,1: exception is active" endif group.long 0xD30++0x3 line.long 0x0 "DFSR,Debug Fault Status Register" bitfld.long 0x0 4. "EXTERNAL,no description available" "0: No EDBGRQ debug event,1: EDBGRQ debug event" bitfld.long 0x0 3. "VCATCH,no description available" "0: No Vector catch triggered,1: Vector catch triggered" newline bitfld.long 0x0 2. "DWTTRAP,no description available" "0: No current debug events generated by the DWT,1: At least one current debug event generated by.." bitfld.long 0x0 1. "BKPT,no description available" "0: No current breakpoint debug event,1: At least one current breakpoint debug event" newline bitfld.long 0x0 0. "HALTED,no description available" "0: No active halt request debug event,1: Halt request debug event active" sif (cpuis("S32K142*")) group.long 0x8++0x3 line.long 0x0 "ACTLR,Auxiliary Control Register." endif sif (cpuis("S32K142*")) group.long 0xD14++0x7 line.long 0x0 "CCR,Configuration and Control Register" line.long 0x4 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x4 16.--23. 1. "PRI_6,Priority of system handler 6 UsageFault" hexmask.long.byte 0x4 8.--15. 1. "PRI_5,Priority of system handler 5 BusFault" newline hexmask.long.byte 0x4 0.--7. 1. "PRI_4,Priority of system handler 4 MemManage" group.long 0xD28++0x7 line.long 0x0 "CFSR,Configurable Fault Status Registers" bitfld.long 0x0 25. "DIVBYZERO,Divide by zero UsageFault" "0: no divide by zero fault or divide by zero..,1: the processor has executed an SDIV or UDIV.." bitfld.long 0x0 24. "UNALIGNED,Unaligned access UsageFault" "0: no unaligned access fault or unaligned access..,1: the processor has made an unaligned memory access" newline bitfld.long 0x0 19. "NOCP,No coprocessor UsageFault. The processor does not support coprocessor instructions" "0: no UsageFault caused by attempting to access a..,1: the processor has attempted to access a.." bitfld.long 0x0 18. "INVPC,Invalid PC load UsageFault caused by an invalid PC load by EXC_RETURN" "0: no invalid PC load UsageFault,1: the processor has attempted an illegal load of.." newline bitfld.long 0x0 17. "INVSTATE,Invalid state UsageFault" "0: no invalid state UsageFault,1: the processor has attempted to execute an.." bitfld.long 0x0 16. "UNDEFINSTR,Undefined instruction UsageFault" "0: no undefined instruction UsageFault,1: the processor has attempted to execute an.." newline bitfld.long 0x0 15. "BFARVALID,BusFault Address Register (BFAR) valid flag" "0: value in BFAR is not a valid fault address,1: BFAR holds a valid fault address" bitfld.long 0x0 13. "LSPERR,no description available" "0: No bus fault occurred during floating-point lazy..,1: A bus fault occurred during floating-point lazy.." newline bitfld.long 0x0 12. "STKERR,BusFault on stacking for exception entry" "0: no stacking fault,1: stacking for an exception entry has caused one.." bitfld.long 0x0 11. "UNSTKERR,BusFault on unstacking for a return from exception" "0: no unstacking fault,1: unstack for an exception return has caused one.." newline bitfld.long 0x0 10. "IMPRECISERR,Imprecise data bus error" "0: no imprecise data bus error,1: a data bus error has occurred but the return.." bitfld.long 0x0 9. "PRECISERR,Precise data bus error" "0: no precise data bus error,1: a data bus error has occurred and the PC value.." newline bitfld.long 0x0 8. "IBUSERR,Instruction bus error" "0: no instruction bus error,1: instruction bus error" bitfld.long 0x0 7. "MMARVALID,MemManage Fault Address Register (MMFAR) valid flag" "0: value in MMAR is not a valid fault address,1: MMAR holds a valid fault address" newline bitfld.long 0x0 5. "MLSPERR,no description available" "0: No MemManage fault occurred during..,1: A MemManage fault occurred during floating-point.." bitfld.long 0x0 4. "MSTKERR,MemManage fault on stacking for exception entry" "0: no stacking fault,1: stacking for an exception entry has caused one.." newline bitfld.long 0x0 3. "MUNSTKERR,MemManage fault on unstacking for a return from exception" "0: no unstacking fault,1: unstack for an exception return has caused one.." bitfld.long 0x0 1. "DACCVIOL,Data access violation flag" "0: no data access violation fault,1: the processor attempted a load or store at a.." newline bitfld.long 0x0 0. "IACCVIOL,Instruction access violation flag" "0: no instruction access violation fault,1: the processor attempted an instruction fetch.." line.long 0x4 "HFSR,HardFault Status register" bitfld.long 0x4 31. "DEBUGEVT,Reserved for Debug use. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" bitfld.long 0x4 30. "FORCED,Indicates a forced hard fault generated by escalation of a fault with configurable priority that cannot be handles either because of priority or because it is disabled" "0: no forced HardFault,1: forced HardFault" newline bitfld.long 0x4 1. "VECTTBL,Indicates a BusFault on a vector table read during exception processing" "0: no BusFault on vector table read,1: BusFault on vector table read" group.long 0xD34++0xB line.long 0x0 "MMFAR,MemManage Address Register" hexmask.long 0x0 0.--31. 1. "ADDRESS,Address of MemManage fault location" line.long 0x4 "BFAR,BusFault Address Register" hexmask.long 0x4 0.--31. 1. "ADDRESS,Address of the BusFault location" line.long 0x8 "AFSR,Auxiliary Fault Status Register" hexmask.long 0x8 0.--31. 1. "AUXFAULT,Latched version of the AUXFAULT inputs" group.long 0xD88++0x3 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 22.--23. "CP11,Access privileges for coprocessor 11." "0: Access denied. Any attempted access generates a..,1: Privileged access only. An unprivileged access..,?,?" bitfld.long 0x0 20.--21. "CP10,Access privileges for coprocessor 10." "0: Access denied. Any attempted access generates a..,1: Privileged access only. An unprivileged access..,?,?" group.long 0xF34++0xB line.long 0x0 "FPCCR,Floating-point Context Control Register" bitfld.long 0x0 31. "ASPEN,Enables CONTROL2 setting on execution of a floating-point instruction. This results in automatic hardware state preservation and restoration for floating-point context on exception entry and exit." "0: Disable CONTROL2 setting on execution of a..,1: Enable CONTROL2 setting on execution of a.." bitfld.long 0x0 30. "LSPEN,Lazy state preservation for floating-point context." "0: Disable automatic lazy state preservation for..,1: Enable automatic lazy state preservation for.." newline bitfld.long 0x0 8. "MONRDY,Permission to set the MON_PEND when the floating-point stack frame was allocated." "0: DebugMonitor is disabled or priority did not..,1: DebugMonitor is enabled and priority permits.." bitfld.long 0x0 6. "BFRDY,Permission to set the BusFault handler to the pending state when the floating-point stack frame was allocated." "0: BusFault is disabled or priority did not permit..,1: BusFault is disabled or priority did not permit.." newline bitfld.long 0x0 5. "MMRDY,Permission to set the MemManage handler to the pending state when the floating-point stack frame was allocated." "0: MemManage is disabled or priority did not permit..,1: MemManage is enabled and priority permitted.." bitfld.long 0x0 4. "HFRDY,Permission to set the HardFault handler to the pending state when the floating-point stack frame was allocated." "0: Priority did not permit setting the HardFault..,1: Priority permitted setting the HardFault handler.." newline bitfld.long 0x0 3. "THREAD,Mode when the floating-point stack frame was allocated." "0: Mode was not Thread Mode when the floating-point..,1: Mode was Thread Mode when the floating-point.." bitfld.long 0x0 1. "USER,Privilege level when the floating-point stack frame was allocated." "0: Privilege level was not user when the..,1: Privilege level was user when the floating-point.." newline bitfld.long 0x0 0. "LSPACT,Lazy state preservation." "0: Lazy state preservation is not active.,1: Lazy state preservation is active." line.long 0x4 "FPCAR,Floating-point Context Address Register" hexmask.long 0x4 3.--31. 1. "ADDRESS,The location of the unpopulated floating-point register space allocated on an exception stack frame." line.long 0x8 "FPDSCR,Floating-point Default Status Control Register" bitfld.long 0x8 26. "AHP,Default value for FPSCR.AHP (Alternative half-precision control bit)." "0: IEEE half-precision format selected.,1: Alternative half-precision format selected." bitfld.long 0x8 25. "DN,Default value for FPSCR.DN (Default NaN mode control bit)." "0: NaN operands propagate through to the output of..,1: Any operation involving one or more NaNs returns.." newline bitfld.long 0x8 24. "FZ,Default value for FPSCR.FZ (Flush-to-zero mode control bit)." "0: Flush-to-zero mode disabled. Behavior of the..,1: Flush-to-zero mode enabled." bitfld.long 0x8 22.--23. "RMode,Default value for FPSCR.RMode (Rounding Mode control field)." "0: Round to Nearest (RN) mode,1: Round towards Plus Infinity (RP) mode.,?,?" endif sif (cpuis("S32K144*")) group.long 0x8++0x3 line.long 0x0 "ACTLR,Auxiliary Control Register." endif sif (cpuis("S32K144*")) group.long 0xD14++0x7 line.long 0x0 "CCR,Configuration and Control Register" line.long 0x4 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x4 16.--23. 1. "PRI_6,Priority of system handler 6 UsageFault" hexmask.long.byte 0x4 8.--15. 1. "PRI_5,Priority of system handler 5 BusFault" newline hexmask.long.byte 0x4 0.--7. 1. "PRI_4,Priority of system handler 4 MemManage" group.long 0xD28++0x7 line.long 0x0 "CFSR,Configurable Fault Status Registers" bitfld.long 0x0 25. "DIVBYZERO,Divide by zero UsageFault" "0: no divide by zero fault or divide by zero..,1: the processor has executed an SDIV or UDIV.." bitfld.long 0x0 24. "UNALIGNED,Unaligned access UsageFault" "0: no unaligned access fault or unaligned access..,1: the processor has made an unaligned memory access" newline bitfld.long 0x0 19. "NOCP,No coprocessor UsageFault. The processor does not support coprocessor instructions" "0: no UsageFault caused by attempting to access a..,1: the processor has attempted to access a.." bitfld.long 0x0 18. "INVPC,Invalid PC load UsageFault caused by an invalid PC load by EXC_RETURN" "0: no invalid PC load UsageFault,1: the processor has attempted an illegal load of.." newline bitfld.long 0x0 17. "INVSTATE,Invalid state UsageFault" "0: no invalid state UsageFault,1: the processor has attempted to execute an.." bitfld.long 0x0 16. "UNDEFINSTR,Undefined instruction UsageFault" "0: no undefined instruction UsageFault,1: the processor has attempted to execute an.." newline bitfld.long 0x0 15. "BFARVALID,BusFault Address Register (BFAR) valid flag" "0: value in BFAR is not a valid fault address,1: BFAR holds a valid fault address" bitfld.long 0x0 13. "LSPERR,no description available" "0: No bus fault occurred during floating-point lazy..,1: A bus fault occurred during floating-point lazy.." newline bitfld.long 0x0 12. "STKERR,BusFault on stacking for exception entry" "0: no stacking fault,1: stacking for an exception entry has caused one.." bitfld.long 0x0 11. "UNSTKERR,BusFault on unstacking for a return from exception" "0: no unstacking fault,1: unstack for an exception return has caused one.." newline bitfld.long 0x0 10. "IMPRECISERR,Imprecise data bus error" "0: no imprecise data bus error,1: a data bus error has occurred but the return.." bitfld.long 0x0 9. "PRECISERR,Precise data bus error" "0: no precise data bus error,1: a data bus error has occurred and the PC value.." newline bitfld.long 0x0 8. "IBUSERR,Instruction bus error" "0: no instruction bus error,1: instruction bus error" bitfld.long 0x0 7. "MMARVALID,MemManage Fault Address Register (MMFAR) valid flag" "0: value in MMAR is not a valid fault address,1: MMAR holds a valid fault address" newline bitfld.long 0x0 5. "MLSPERR,no description available" "0: No MemManage fault occurred during..,1: A MemManage fault occurred during floating-point.." bitfld.long 0x0 4. "MSTKERR,MemManage fault on stacking for exception entry" "0: no stacking fault,1: stacking for an exception entry has caused one.." newline bitfld.long 0x0 3. "MUNSTKERR,MemManage fault on unstacking for a return from exception" "0: no unstacking fault,1: unstack for an exception return has caused one.." bitfld.long 0x0 1. "DACCVIOL,Data access violation flag" "0: no data access violation fault,1: the processor attempted a load or store at a.." newline bitfld.long 0x0 0. "IACCVIOL,Instruction access violation flag" "0: no instruction access violation fault,1: the processor attempted an instruction fetch.." line.long 0x4 "HFSR,HardFault Status register" bitfld.long 0x4 31. "DEBUGEVT,Reserved for Debug use. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" bitfld.long 0x4 30. "FORCED,Indicates a forced hard fault generated by escalation of a fault with configurable priority that cannot be handles either because of priority or because it is disabled" "0: no forced HardFault,1: forced HardFault" newline bitfld.long 0x4 1. "VECTTBL,Indicates a BusFault on a vector table read during exception processing" "0: no BusFault on vector table read,1: BusFault on vector table read" group.long 0xD34++0xB line.long 0x0 "MMFAR,MemManage Address Register" hexmask.long 0x0 0.--31. 1. "ADDRESS,Address of MemManage fault location" line.long 0x4 "BFAR,BusFault Address Register" hexmask.long 0x4 0.--31. 1. "ADDRESS,Address of the BusFault location" line.long 0x8 "AFSR,Auxiliary Fault Status Register" hexmask.long 0x8 0.--31. 1. "AUXFAULT,Latched version of the AUXFAULT inputs" group.long 0xD88++0x3 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 22.--23. "CP11,Access privileges for coprocessor 11." "0: Access denied. Any attempted access generates a..,1: Privileged access only. An unprivileged access..,?,?" bitfld.long 0x0 20.--21. "CP10,Access privileges for coprocessor 10." "0: Access denied. Any attempted access generates a..,1: Privileged access only. An unprivileged access..,?,?" group.long 0xF34++0xB line.long 0x0 "FPCCR,Floating-point Context Control Register" bitfld.long 0x0 31. "ASPEN,Enables CONTROL2 setting on execution of a floating-point instruction. This results in automatic hardware state preservation and restoration for floating-point context on exception entry and exit." "0: Disable CONTROL2 setting on execution of a..,1: Enable CONTROL2 setting on execution of a.." bitfld.long 0x0 30. "LSPEN,Lazy state preservation for floating-point context." "0: Disable automatic lazy state preservation for..,1: Enable automatic lazy state preservation for.." newline bitfld.long 0x0 8. "MONRDY,Permission to set the MON_PEND when the floating-point stack frame was allocated." "0: DebugMonitor is disabled or priority did not..,1: DebugMonitor is enabled and priority permits.." bitfld.long 0x0 6. "BFRDY,Permission to set the BusFault handler to the pending state when the floating-point stack frame was allocated." "0: BusFault is disabled or priority did not permit..,1: BusFault is disabled or priority did not permit.." newline bitfld.long 0x0 5. "MMRDY,Permission to set the MemManage handler to the pending state when the floating-point stack frame was allocated." "0: MemManage is disabled or priority did not permit..,1: MemManage is enabled and priority permitted.." bitfld.long 0x0 4. "HFRDY,Permission to set the HardFault handler to the pending state when the floating-point stack frame was allocated." "0: Priority did not permit setting the HardFault..,1: Priority permitted setting the HardFault handler.." newline bitfld.long 0x0 3. "THREAD,Mode when the floating-point stack frame was allocated." "0: Mode was not Thread Mode when the floating-point..,1: Mode was Thread Mode when the floating-point.." bitfld.long 0x0 1. "USER,Privilege level when the floating-point stack frame was allocated." "0: Privilege level was not user when the..,1: Privilege level was user when the floating-point.." newline bitfld.long 0x0 0. "LSPACT,Lazy state preservation." "0: Lazy state preservation is not active.,1: Lazy state preservation is active." line.long 0x4 "FPCAR,Floating-point Context Address Register" hexmask.long 0x4 3.--31. 1. "ADDRESS,The location of the unpopulated floating-point register space allocated on an exception stack frame." line.long 0x8 "FPDSCR,Floating-point Default Status Control Register" bitfld.long 0x8 26. "AHP,Default value for FPSCR.AHP (Alternative half-precision control bit)." "0: IEEE half-precision format selected.,1: Alternative half-precision format selected." bitfld.long 0x8 25. "DN,Default value for FPSCR.DN (Default NaN mode control bit)." "0: NaN operands propagate through to the output of..,1: Any operation involving one or more NaNs returns.." newline bitfld.long 0x8 24. "FZ,Default value for FPSCR.FZ (Flush-to-zero mode control bit)." "0: Flush-to-zero mode disabled. Behavior of the..,1: Flush-to-zero mode enabled." bitfld.long 0x8 22.--23. "RMode,Default value for FPSCR.RMode (Rounding Mode control field)." "0: Round to Nearest (RN) mode,1: Round towards Plus Infinity (RP) mode.,?,?" endif sif (cpuis("S32K146*")) group.long 0x8++0x3 line.long 0x0 "ACTLR,Auxiliary Control Register." endif sif (cpuis("S32K146*")) group.long 0xD14++0x7 line.long 0x0 "CCR,Configuration and Control Register" line.long 0x4 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x4 16.--23. 1. "PRI_6,Priority of system handler 6 UsageFault" hexmask.long.byte 0x4 8.--15. 1. "PRI_5,Priority of system handler 5 BusFault" newline hexmask.long.byte 0x4 0.--7. 1. "PRI_4,Priority of system handler 4 MemManage" group.long 0xD28++0x7 line.long 0x0 "CFSR,Configurable Fault Status Registers" bitfld.long 0x0 25. "DIVBYZERO,Divide by zero UsageFault" "0: no divide by zero fault or divide by zero..,1: the processor has executed an SDIV or UDIV.." bitfld.long 0x0 24. "UNALIGNED,Unaligned access UsageFault" "0: no unaligned access fault or unaligned access..,1: the processor has made an unaligned memory access" newline bitfld.long 0x0 19. "NOCP,No coprocessor UsageFault. The processor does not support coprocessor instructions" "0: no UsageFault caused by attempting to access a..,1: the processor has attempted to access a.." bitfld.long 0x0 18. "INVPC,Invalid PC load UsageFault caused by an invalid PC load by EXC_RETURN" "0: no invalid PC load UsageFault,1: the processor has attempted an illegal load of.." newline bitfld.long 0x0 17. "INVSTATE,Invalid state UsageFault" "0: no invalid state UsageFault,1: the processor has attempted to execute an.." bitfld.long 0x0 16. "UNDEFINSTR,Undefined instruction UsageFault" "0: no undefined instruction UsageFault,1: the processor has attempted to execute an.." newline bitfld.long 0x0 15. "BFARVALID,BusFault Address Register (BFAR) valid flag" "0: value in BFAR is not a valid fault address,1: BFAR holds a valid fault address" bitfld.long 0x0 13. "LSPERR,no description available" "0: No bus fault occurred during floating-point lazy..,1: A bus fault occurred during floating-point lazy.." newline bitfld.long 0x0 12. "STKERR,BusFault on stacking for exception entry" "0: no stacking fault,1: stacking for an exception entry has caused one.." bitfld.long 0x0 11. "UNSTKERR,BusFault on unstacking for a return from exception" "0: no unstacking fault,1: unstack for an exception return has caused one.." newline bitfld.long 0x0 10. "IMPRECISERR,Imprecise data bus error" "0: no imprecise data bus error,1: a data bus error has occurred but the return.." bitfld.long 0x0 9. "PRECISERR,Precise data bus error" "0: no precise data bus error,1: a data bus error has occurred and the PC value.." newline bitfld.long 0x0 8. "IBUSERR,Instruction bus error" "0: no instruction bus error,1: instruction bus error" bitfld.long 0x0 7. "MMARVALID,MemManage Fault Address Register (MMFAR) valid flag" "0: value in MMAR is not a valid fault address,1: MMAR holds a valid fault address" newline bitfld.long 0x0 5. "MLSPERR,no description available" "0: No MemManage fault occurred during..,1: A MemManage fault occurred during floating-point.." bitfld.long 0x0 4. "MSTKERR,MemManage fault on stacking for exception entry" "0: no stacking fault,1: stacking for an exception entry has caused one.." newline bitfld.long 0x0 3. "MUNSTKERR,MemManage fault on unstacking for a return from exception" "0: no unstacking fault,1: unstack for an exception return has caused one.." bitfld.long 0x0 1. "DACCVIOL,Data access violation flag" "0: no data access violation fault,1: the processor attempted a load or store at a.." newline bitfld.long 0x0 0. "IACCVIOL,Instruction access violation flag" "0: no instruction access violation fault,1: the processor attempted an instruction fetch.." line.long 0x4 "HFSR,HardFault Status register" bitfld.long 0x4 31. "DEBUGEVT,Reserved for Debug use. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" bitfld.long 0x4 30. "FORCED,Indicates a forced hard fault generated by escalation of a fault with configurable priority that cannot be handles either because of priority or because it is disabled" "0: no forced HardFault,1: forced HardFault" newline bitfld.long 0x4 1. "VECTTBL,Indicates a BusFault on a vector table read during exception processing" "0: no BusFault on vector table read,1: BusFault on vector table read" group.long 0xD34++0xB line.long 0x0 "MMFAR,MemManage Address Register" hexmask.long 0x0 0.--31. 1. "ADDRESS,Address of MemManage fault location" line.long 0x4 "BFAR,BusFault Address Register" hexmask.long 0x4 0.--31. 1. "ADDRESS,Address of the BusFault location" line.long 0x8 "AFSR,Auxiliary Fault Status Register" hexmask.long 0x8 0.--31. 1. "AUXFAULT,Latched version of the AUXFAULT inputs" group.long 0xD88++0x3 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 22.--23. "CP11,Access privileges for coprocessor 11." "0: Access denied. Any attempted access generates a..,1: Privileged access only. An unprivileged access..,?,?" bitfld.long 0x0 20.--21. "CP10,Access privileges for coprocessor 10." "0: Access denied. Any attempted access generates a..,1: Privileged access only. An unprivileged access..,?,?" group.long 0xF34++0xB line.long 0x0 "FPCCR,Floating-point Context Control Register" bitfld.long 0x0 31. "ASPEN,Enables CONTROL2 setting on execution of a floating-point instruction. This results in automatic hardware state preservation and restoration for floating-point context on exception entry and exit." "0: Disable CONTROL2 setting on execution of a..,1: Enable CONTROL2 setting on execution of a.." bitfld.long 0x0 30. "LSPEN,Lazy state preservation for floating-point context." "0: Disable automatic lazy state preservation for..,1: Enable automatic lazy state preservation for.." newline bitfld.long 0x0 8. "MONRDY,Permission to set the MON_PEND when the floating-point stack frame was allocated." "0: DebugMonitor is disabled or priority did not..,1: DebugMonitor is enabled and priority permits.." bitfld.long 0x0 6. "BFRDY,Permission to set the BusFault handler to the pending state when the floating-point stack frame was allocated." "0: BusFault is disabled or priority did not permit..,1: BusFault is disabled or priority did not permit.." newline bitfld.long 0x0 5. "MMRDY,Permission to set the MemManage handler to the pending state when the floating-point stack frame was allocated." "0: MemManage is disabled or priority did not permit..,1: MemManage is enabled and priority permitted.." bitfld.long 0x0 4. "HFRDY,Permission to set the HardFault handler to the pending state when the floating-point stack frame was allocated." "0: Priority did not permit setting the HardFault..,1: Priority permitted setting the HardFault handler.." newline bitfld.long 0x0 3. "THREAD,Mode when the floating-point stack frame was allocated." "0: Mode was not Thread Mode when the floating-point..,1: Mode was Thread Mode when the floating-point.." bitfld.long 0x0 1. "USER,Privilege level when the floating-point stack frame was allocated." "0: Privilege level was not user when the..,1: Privilege level was user when the floating-point.." newline bitfld.long 0x0 0. "LSPACT,Lazy state preservation." "0: Lazy state preservation is not active.,1: Lazy state preservation is active." line.long 0x4 "FPCAR,Floating-point Context Address Register" hexmask.long 0x4 3.--31. 1. "ADDRESS,The location of the unpopulated floating-point register space allocated on an exception stack frame." line.long 0x8 "FPDSCR,Floating-point Default Status Control Register" bitfld.long 0x8 26. "AHP,Default value for FPSCR.AHP (Alternative half-precision control bit)." "0: IEEE half-precision format selected.,1: Alternative half-precision format selected." bitfld.long 0x8 25. "DN,Default value for FPSCR.DN (Default NaN mode control bit)." "0: NaN operands propagate through to the output of..,1: Any operation involving one or more NaNs returns.." newline bitfld.long 0x8 24. "FZ,Default value for FPSCR.FZ (Flush-to-zero mode control bit)." "0: Flush-to-zero mode disabled. Behavior of the..,1: Flush-to-zero mode enabled." bitfld.long 0x8 22.--23. "RMode,Default value for FPSCR.RMode (Rounding Mode control field)." "0: Round to Nearest (RN) mode,1: Round towards Plus Infinity (RP) mode.,?,?" endif sif (cpuis("S32K148*")) group.long 0x8++0x3 line.long 0x0 "ACTLR,Auxiliary Control Register." endif sif (cpuis("S32K148*")) group.long 0xD14++0x7 line.long 0x0 "CCR,Configuration and Control Register" line.long 0x4 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x4 16.--23. 1. "PRI_6,Priority of system handler 6 UsageFault" hexmask.long.byte 0x4 8.--15. 1. "PRI_5,Priority of system handler 5 BusFault" newline hexmask.long.byte 0x4 0.--7. 1. "PRI_4,Priority of system handler 4 MemManage" group.long 0xD28++0x7 line.long 0x0 "CFSR,Configurable Fault Status Registers" bitfld.long 0x0 25. "DIVBYZERO,Divide by zero UsageFault" "0: no divide by zero fault or divide by zero..,1: the processor has executed an SDIV or UDIV.." bitfld.long 0x0 24. "UNALIGNED,Unaligned access UsageFault" "0: no unaligned access fault or unaligned access..,1: the processor has made an unaligned memory access" newline bitfld.long 0x0 19. "NOCP,No coprocessor UsageFault. The processor does not support coprocessor instructions" "0: no UsageFault caused by attempting to access a..,1: the processor has attempted to access a.." bitfld.long 0x0 18. "INVPC,Invalid PC load UsageFault caused by an invalid PC load by EXC_RETURN" "0: no invalid PC load UsageFault,1: the processor has attempted an illegal load of.." newline bitfld.long 0x0 17. "INVSTATE,Invalid state UsageFault" "0: no invalid state UsageFault,1: the processor has attempted to execute an.." bitfld.long 0x0 16. "UNDEFINSTR,Undefined instruction UsageFault" "0: no undefined instruction UsageFault,1: the processor has attempted to execute an.." newline bitfld.long 0x0 15. "BFARVALID,BusFault Address Register (BFAR) valid flag" "0: value in BFAR is not a valid fault address,1: BFAR holds a valid fault address" bitfld.long 0x0 13. "LSPERR,no description available" "0: No bus fault occurred during floating-point lazy..,1: A bus fault occurred during floating-point lazy.." newline bitfld.long 0x0 12. "STKERR,BusFault on stacking for exception entry" "0: no stacking fault,1: stacking for an exception entry has caused one.." bitfld.long 0x0 11. "UNSTKERR,BusFault on unstacking for a return from exception" "0: no unstacking fault,1: unstack for an exception return has caused one.." newline bitfld.long 0x0 10. "IMPRECISERR,Imprecise data bus error" "0: no imprecise data bus error,1: a data bus error has occurred but the return.." bitfld.long 0x0 9. "PRECISERR,Precise data bus error" "0: no precise data bus error,1: a data bus error has occurred and the PC value.." newline bitfld.long 0x0 8. "IBUSERR,Instruction bus error" "0: no instruction bus error,1: instruction bus error" bitfld.long 0x0 7. "MMARVALID,MemManage Fault Address Register (MMFAR) valid flag" "0: value in MMAR is not a valid fault address,1: MMAR holds a valid fault address" newline bitfld.long 0x0 5. "MLSPERR,no description available" "0: No MemManage fault occurred during..,1: A MemManage fault occurred during floating-point.." bitfld.long 0x0 4. "MSTKERR,MemManage fault on stacking for exception entry" "0: no stacking fault,1: stacking for an exception entry has caused one.." newline bitfld.long 0x0 3. "MUNSTKERR,MemManage fault on unstacking for a return from exception" "0: no unstacking fault,1: unstack for an exception return has caused one.." bitfld.long 0x0 1. "DACCVIOL,Data access violation flag" "0: no data access violation fault,1: the processor attempted a load or store at a.." newline bitfld.long 0x0 0. "IACCVIOL,Instruction access violation flag" "0: no instruction access violation fault,1: the processor attempted an instruction fetch.." line.long 0x4 "HFSR,HardFault Status register" bitfld.long 0x4 31. "DEBUGEVT,Reserved for Debug use. When writing to the register you must write 0 to this bit otherwise behavior is Unpredictable." "0,1" bitfld.long 0x4 30. "FORCED,Indicates a forced hard fault generated by escalation of a fault with configurable priority that cannot be handles either because of priority or because it is disabled" "0: no forced HardFault,1: forced HardFault" newline bitfld.long 0x4 1. "VECTTBL,Indicates a BusFault on a vector table read during exception processing" "0: no BusFault on vector table read,1: BusFault on vector table read" group.long 0xD34++0xB line.long 0x0 "MMFAR,MemManage Address Register" hexmask.long 0x0 0.--31. 1. "ADDRESS,Address of MemManage fault location" line.long 0x4 "BFAR,BusFault Address Register" hexmask.long 0x4 0.--31. 1. "ADDRESS,Address of the BusFault location" line.long 0x8 "AFSR,Auxiliary Fault Status Register" hexmask.long 0x8 0.--31. 1. "AUXFAULT,Latched version of the AUXFAULT inputs" group.long 0xD88++0x3 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 22.--23. "CP11,Access privileges for coprocessor 11." "0: Access denied. Any attempted access generates a..,1: Privileged access only. An unprivileged access..,?,?" bitfld.long 0x0 20.--21. "CP10,Access privileges for coprocessor 10." "0: Access denied. Any attempted access generates a..,1: Privileged access only. An unprivileged access..,?,?" group.long 0xF34++0xB line.long 0x0 "FPCCR,Floating-point Context Control Register" bitfld.long 0x0 31. "ASPEN,Enables CONTROL2 setting on execution of a floating-point instruction. This results in automatic hardware state preservation and restoration for floating-point context on exception entry and exit." "0: Disable CONTROL2 setting on execution of a..,1: Enable CONTROL2 setting on execution of a.." bitfld.long 0x0 30. "LSPEN,Lazy state preservation for floating-point context." "0: Disable automatic lazy state preservation for..,1: Enable automatic lazy state preservation for.." newline bitfld.long 0x0 8. "MONRDY,Permission to set the MON_PEND when the floating-point stack frame was allocated." "0: DebugMonitor is disabled or priority did not..,1: DebugMonitor is enabled and priority permits.." bitfld.long 0x0 6. "BFRDY,Permission to set the BusFault handler to the pending state when the floating-point stack frame was allocated." "0: BusFault is disabled or priority did not permit..,1: BusFault is disabled or priority did not permit.." newline bitfld.long 0x0 5. "MMRDY,Permission to set the MemManage handler to the pending state when the floating-point stack frame was allocated." "0: MemManage is disabled or priority did not permit..,1: MemManage is enabled and priority permitted.." bitfld.long 0x0 4. "HFRDY,Permission to set the HardFault handler to the pending state when the floating-point stack frame was allocated." "0: Priority did not permit setting the HardFault..,1: Priority permitted setting the HardFault handler.." newline bitfld.long 0x0 3. "THREAD,Mode when the floating-point stack frame was allocated." "0: Mode was not Thread Mode when the floating-point..,1: Mode was Thread Mode when the floating-point.." bitfld.long 0x0 1. "USER,Privilege level when the floating-point stack frame was allocated." "0: Privilege level was not user when the..,1: Privilege level was user when the floating-point.." newline bitfld.long 0x0 0. "LSPACT,Lazy state preservation." "0: Lazy state preservation is not active.,1: Lazy state preservation is active." line.long 0x4 "FPCAR,Floating-point Context Address Register" hexmask.long 0x4 3.--31. 1. "ADDRESS,The location of the unpopulated floating-point register space allocated on an exception stack frame." line.long 0x8 "FPDSCR,Floating-point Default Status Control Register" bitfld.long 0x8 26. "AHP,Default value for FPSCR.AHP (Alternative half-precision control bit)." "0: IEEE half-precision format selected.,1: Alternative half-precision format selected." bitfld.long 0x8 25. "DN,Default value for FPSCR.DN (Default NaN mode control bit)." "0: NaN operands propagate through to the output of..,1: Any operation involving one or more NaNs returns.." newline bitfld.long 0x8 24. "FZ,Default value for FPSCR.FZ (Flush-to-zero mode control bit)." "0: Flush-to-zero mode disabled. Behavior of the..,1: Flush-to-zero mode enabled." bitfld.long 0x8 22.--23. "RMode,Default value for FPSCR.RMode (Rounding Mode control field)." "0: Round to Nearest (RN) mode,1: Round towards Plus Infinity (RP) mode.,?,?" endif tree.end tree "S32_SYSTICK (System Tick Timer)" base ad:0xE000E010 group.long 0x0++0xB line.long 0x0 "CSR,SysTick Control and Status Register" bitfld.long 0x0 16. "COUNTFLAG,Returns 1 if timer counted to 0 since last time this was read" "0,1" bitfld.long 0x0 2. "CLKSOURCE,Indicates the clock source" "0: external clock,1: processor clock" newline bitfld.long 0x0 1. "TICKINT,Enables SysTick exception request" "0: counting down to 0 does not assert the SysTick..,1: counting down to 0 asserts the SysTick exception.." bitfld.long 0x0 0. "ENABLE,Enables the counter" "0: counter disabled,1: counter enabled" line.long 0x4 "RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x4 0.--23. 1. "RELOAD,Value to load into the SysTick Current Value Register when the counter reaches 0" line.long 0x8 "CVR,SysTick Current Value Register" hexmask.long.tbyte 0x8 0.--23. 1. "CURRENT,Current value at the time the register is accessed" rgroup.long 0xC++0x3 line.long 0x0 "CALIB,SysTick Calibration Value Register" bitfld.long 0x0 31. "NOREF,Indicates whether the device provides a reference clock to the processor" "0: The reference clock is provided,1: The reference clock is not provided" bitfld.long 0x0 30. "SKEW,Indicates whether the TENMS value is exact" "0: TENMS value is exact,1: TENMS value is inexact or not given" newline hexmask.long.tbyte 0x0 0.--23. 1. "TENMS,Reload value to use for 10ms timing" tree.end sif (cpuis("S32K148*")) tree "SAI (Synchronous Audio Interface)" base ad:0x0 tree "SAI0" base ad:0x40054000 rgroup.long 0x0++0x7 line.long 0x0 "SAI_VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "SAI_PARAM,Parameter Register" hexmask.long.byte 0x4 16.--19. 1. "FRAME,Frame Size" hexmask.long.byte 0x4 8.--11. 1. "FIFO,FIFO Size" newline hexmask.long.byte 0x4 0.--3. 1. "DATALINE,Number of Datalines" group.long 0x8++0x17 line.long 0x0 "SAI_TCSR,SAI Transmit Control Register" bitfld.long 0x0 31. "TE,Transmitter Enable" "0: Transmitter is disabled.,1: Transmitter is enabled or transmitter has been.." bitfld.long 0x0 29. "DBGE,Debug Enable" "0: Transmitter is disabled in Debug mode after..,1: Transmitter is enabled in Debug mode." newline bitfld.long 0x0 28. "BCE,Bit Clock Enable" "0: Transmit bit clock is disabled.,1: Transmit bit clock is enabled." bitfld.long 0x0 25. "FR,FIFO Reset" "0: No effect.,1: FIFO reset." newline bitfld.long 0x0 24. "SR,Software Reset" "0: No effect.,1: Software reset." bitfld.long 0x0 20. "WSF,Word Start Flag" "0: Start of word not detected.,1: Start of word detected." newline bitfld.long 0x0 19. "SEF,Sync Error Flag" "0: Sync error not detected.,1: Frame sync error detected." bitfld.long 0x0 18. "FEF,FIFO Error Flag" "0: Transmit underrun not detected.,1: Transmit underrun detected." newline rbitfld.long 0x0 17. "FWF,FIFO Warning Flag" "0: No enabled transmit FIFO is empty.,1: Enabled transmit FIFO is empty." rbitfld.long 0x0 16. "FRF,FIFO Request Flag" "0: Transmit FIFO watermark has not been reached.,1: Transmit FIFO watermark has been reached." newline bitfld.long 0x0 12. "WSIE,Word Start Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt." bitfld.long 0x0 11. "SEIE,Sync Error Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt." newline bitfld.long 0x0 10. "FEIE,FIFO Error Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." bitfld.long 0x0 9. "FWIE,FIFO Warning Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." newline bitfld.long 0x0 8. "FRIE,FIFO Request Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." bitfld.long 0x0 1. "FWDE,FIFO Warning DMA Enable" "0: Disables the DMA request.,1: Enables the DMA request." newline bitfld.long 0x0 0. "FRDE,FIFO Request DMA Enable" "0: Disables the DMA request.,1: Enables the DMA request." line.long 0x4 "SAI_TCR1,SAI Transmit Configuration 1 Register" bitfld.long 0x4 0.--2. "TFW,Transmit FIFO Watermark" "0,1,2,3,4,5,6,7" line.long 0x8 "SAI_TCR2,SAI Transmit Configuration 2 Register" bitfld.long 0x8 30.--31. "SYNC,Synchronous Mode" "0: Asynchronous mode.,1: Synchronous with receiver.,?,?" bitfld.long 0x8 29. "BCS,Bit Clock Swap" "0: Use the normal bit clock source.,1: Swap the bit clock source." newline bitfld.long 0x8 28. "BCI,Bit Clock Input" "0: No effect.,1: Internal logic is clocked as if bit clock was.." bitfld.long 0x8 26.--27. "MSEL,MCLK Select" "0: Bus Clock selected.,1: Master Clock (MCLK) 1 option selected.,?,?" newline bitfld.long 0x8 25. "BCP,Bit Clock Polarity" "0: Bit clock is active high with drive outputs on..,1: Bit clock is active low with drive outputs on.." bitfld.long 0x8 24. "BCD,Bit Clock Direction" "0: Bit clock is generated externally in Slave mode.,1: Bit clock is generated internally in Master mode." newline hexmask.long.byte 0x8 0.--7. 1. "DIV,Bit Clock Divide" line.long 0xC "SAI_TCR3,SAI Transmit Configuration 3 Register" hexmask.long.byte 0xC 24.--27. 1. "CFR,Channel FIFO Reset" hexmask.long.byte 0xC 16.--19. 1. "TCE,Transmit Channel Enable" newline hexmask.long.byte 0xC 0.--3. 1. "WDFL,Word Flag Configuration" line.long 0x10 "SAI_TCR4,SAI Transmit Configuration 4 Register" bitfld.long 0x10 28. "FCONT,FIFO Continue on Error" "0: On FIFO error the SAI will continue from the..,1: On FIFO error the SAI will continue from the.." bitfld.long 0x10 26.--27. "FCOMB,FIFO Combine Mode" "0: FIFO combine mode disabled.,1: FIFO combine mode enabled on FIFO reads (from..,?,?" newline bitfld.long 0x10 24.--25. "FPACK,FIFO Packing Mode" "0: FIFO packing is disabled,?,?,?" hexmask.long.byte 0x10 16.--19. 1. "FRSZ,Frame size" newline hexmask.long.byte 0x10 8.--12. 1. "SYWD,Sync Width" bitfld.long 0x10 5. "CHMOD,Channel Mode" "0: TDM mode transmit data pins are tri-stated when..,1: Output mode transmit data pins are never.." newline bitfld.long 0x10 4. "MF,MSB First" "0: LSB is transmitted first.,1: MSB is transmitted first." bitfld.long 0x10 3. "FSE,Frame Sync Early" "0: Frame sync asserts with the first bit of the..,1: Frame sync asserts one bit before the first bit.." newline bitfld.long 0x10 2. "ONDEM,On Demand Mode" "0: Internal frame sync is generated continuously.,1: Internal frame sync is generated when the FIFO.." bitfld.long 0x10 1. "FSP,Frame Sync Polarity" "0: Frame sync is active high.,1: Frame sync is active low." newline bitfld.long 0x10 0. "FSD,Frame Sync Direction" "0: Frame sync is generated externally in Slave mode.,1: Frame sync is generated internally in Master mode." line.long 0x14 "SAI_TCR5,SAI Transmit Configuration 5 Register" hexmask.long.byte 0x14 24.--28. 1. "WNW,Word N Width" hexmask.long.byte 0x14 16.--20. 1. "W0W,Word 0 Width" newline hexmask.long.byte 0x14 8.--12. 1. "FBT,First Bit Shifted" wgroup.long 0x20++0xF line.long 0x0 "SAI_TDR0,SAI Transmit Data Register" hexmask.long 0x0 0.--31. 1. "TDR,Transmit Data Register" line.long 0x4 "SAI_TDR1,SAI Transmit Data Register" hexmask.long 0x4 0.--31. 1. "TDR,Transmit Data Register" line.long 0x8 "SAI_TDR2,SAI Transmit Data Register" hexmask.long 0x8 0.--31. 1. "TDR,Transmit Data Register" line.long 0xC "SAI_TDR3,SAI Transmit Data Register" hexmask.long 0xC 0.--31. 1. "TDR,Transmit Data Register" rgroup.long 0x40++0xF line.long 0x0 "SAI_TFR0,SAI Transmit FIFO Register" bitfld.long 0x0 31. "WCP,Write Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO writes and this.." hexmask.long.byte 0x0 16.--19. 1. "WFP,Write FIFO Pointer" newline hexmask.long.byte 0x0 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0x4 "SAI_TFR1,SAI Transmit FIFO Register" bitfld.long 0x4 31. "WCP,Write Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO writes and this.." hexmask.long.byte 0x4 16.--19. 1. "WFP,Write FIFO Pointer" newline hexmask.long.byte 0x4 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0x8 "SAI_TFR2,SAI Transmit FIFO Register" bitfld.long 0x8 31. "WCP,Write Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO writes and this.." hexmask.long.byte 0x8 16.--19. 1. "WFP,Write FIFO Pointer" newline hexmask.long.byte 0x8 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0xC "SAI_TFR3,SAI Transmit FIFO Register" bitfld.long 0xC 31. "WCP,Write Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO writes and this.." hexmask.long.byte 0xC 16.--19. 1. "WFP,Write FIFO Pointer" newline hexmask.long.byte 0xC 0.--3. 1. "RFP,Read FIFO Pointer" group.long 0x60++0x3 line.long 0x0 "SAI_TMR,SAI Transmit Mask Register" hexmask.long.word 0x0 0.--15. 1. "TWM,Transmit Word Mask" group.long 0x88++0x17 line.long 0x0 "SAI_RCSR,SAI Receive Control Register" bitfld.long 0x0 31. "RE,Receiver Enable" "0: Receiver is disabled.,1: Receiver is enabled or receiver has been.." bitfld.long 0x0 29. "DBGE,Debug Enable" "0: Receiver is disabled in Debug mode after..,1: Receiver is enabled in Debug mode." newline bitfld.long 0x0 28. "BCE,Bit Clock Enable" "0: Receive bit clock is disabled.,1: Receive bit clock is enabled." bitfld.long 0x0 25. "FR,FIFO Reset" "0: No effect.,1: FIFO reset." newline bitfld.long 0x0 24. "SR,Software Reset" "0: No effect.,1: Software reset." bitfld.long 0x0 20. "WSF,Word Start Flag" "0: Start of word not detected.,1: Start of word detected." newline bitfld.long 0x0 19. "SEF,Sync Error Flag" "0: Sync error not detected.,1: Frame sync error detected." bitfld.long 0x0 18. "FEF,FIFO Error Flag" "0: Receive overflow not detected.,1: Receive overflow detected." newline rbitfld.long 0x0 17. "FWF,FIFO Warning Flag" "0: No enabled receive FIFO is full.,1: Enabled receive FIFO is full." rbitfld.long 0x0 16. "FRF,FIFO Request Flag" "0: Receive FIFO watermark not reached.,1: Receive FIFO watermark has been reached." newline bitfld.long 0x0 12. "WSIE,Word Start Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt." bitfld.long 0x0 11. "SEIE,Sync Error Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt." newline bitfld.long 0x0 10. "FEIE,FIFO Error Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." bitfld.long 0x0 9. "FWIE,FIFO Warning Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." newline bitfld.long 0x0 8. "FRIE,FIFO Request Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." bitfld.long 0x0 1. "FWDE,FIFO Warning DMA Enable" "0: Disables the DMA request.,1: Enables the DMA request." newline bitfld.long 0x0 0. "FRDE,FIFO Request DMA Enable" "0: Disables the DMA request.,1: Enables the DMA request." line.long 0x4 "SAI_RCR1,SAI Receive Configuration 1 Register" bitfld.long 0x4 0.--2. "RFW,Receive FIFO Watermark" "0,1,2,3,4,5,6,7" line.long 0x8 "SAI_RCR2,SAI Receive Configuration 2 Register" bitfld.long 0x8 30.--31. "SYNC,Synchronous Mode" "0: Asynchronous mode.,1: Synchronous with transmitter.,?,?" bitfld.long 0x8 29. "BCS,Bit Clock Swap" "0: Use the normal bit clock source.,1: Swap the bit clock source." newline bitfld.long 0x8 28. "BCI,Bit Clock Input" "0: No effect.,1: Internal logic is clocked as if bit clock was.." bitfld.long 0x8 26.--27. "MSEL,MCLK Select" "0: Bus Clock selected.,1: Master Clock (MCLK) 1 option selected.,?,?" newline bitfld.long 0x8 25. "BCP,Bit Clock Polarity" "0: Bit Clock is active high with drive outputs on..,1: Bit Clock is active low with drive outputs on.." bitfld.long 0x8 24. "BCD,Bit Clock Direction" "0: Bit clock is generated externally in Slave mode.,1: Bit clock is generated internally in Master mode." newline hexmask.long.byte 0x8 0.--7. 1. "DIV,Bit Clock Divide" line.long 0xC "SAI_RCR3,SAI Receive Configuration 3 Register" hexmask.long.byte 0xC 24.--27. 1. "CFR,Channel FIFO Reset" hexmask.long.byte 0xC 16.--19. 1. "RCE,Receive Channel Enable" newline hexmask.long.byte 0xC 0.--3. 1. "WDFL,Word Flag Configuration" line.long 0x10 "SAI_RCR4,SAI Receive Configuration 4 Register" bitfld.long 0x10 28. "FCONT,FIFO Continue on Error" "0: On FIFO error the SAI will continue from the..,1: On FIFO error the SAI will continue from the.." bitfld.long 0x10 26.--27. "FCOMB,FIFO Combine Mode" "0: FIFO combine mode disabled.,1: FIFO combine mode enabled on FIFO writes (from..,?,?" newline bitfld.long 0x10 24.--25. "FPACK,FIFO Packing Mode" "0: FIFO packing is disabled,?,?,?" hexmask.long.byte 0x10 16.--19. 1. "FRSZ,Frame Size" newline hexmask.long.byte 0x10 8.--12. 1. "SYWD,Sync Width" bitfld.long 0x10 4. "MF,MSB First" "0: LSB is received first.,1: MSB is received first." newline bitfld.long 0x10 3. "FSE,Frame Sync Early" "0: Frame sync asserts with the first bit of the..,1: Frame sync asserts one bit before the first bit.." bitfld.long 0x10 2. "ONDEM,On Demand Mode" "0: Internal frame sync is generated continuously.,1: Internal frame sync is generated when the FIFO.." newline bitfld.long 0x10 1. "FSP,Frame Sync Polarity" "0: Frame sync is active high.,1: Frame sync is active low." bitfld.long 0x10 0. "FSD,Frame Sync Direction" "0: Frame Sync is generated externally in Slave mode.,1: Frame Sync is generated internally in Master mode." line.long 0x14 "SAI_RCR5,SAI Receive Configuration 5 Register" hexmask.long.byte 0x14 24.--28. 1. "WNW,Word N Width" hexmask.long.byte 0x14 16.--20. 1. "W0W,Word 0 Width" newline hexmask.long.byte 0x14 8.--12. 1. "FBT,First Bit Shifted" rgroup.long 0xA0++0xF line.long 0x0 "SAI_RDR0,SAI Receive Data Register" hexmask.long 0x0 0.--31. 1. "RDR,Receive Data Register" line.long 0x4 "SAI_RDR1,SAI Receive Data Register" hexmask.long 0x4 0.--31. 1. "RDR,Receive Data Register" line.long 0x8 "SAI_RDR2,SAI Receive Data Register" hexmask.long 0x8 0.--31. 1. "RDR,Receive Data Register" line.long 0xC "SAI_RDR3,SAI Receive Data Register" hexmask.long 0xC 0.--31. 1. "RDR,Receive Data Register" rgroup.long 0xC0++0xF line.long 0x0 "SAI_RFR0,SAI Receive FIFO Register" hexmask.long.byte 0x0 16.--19. 1. "WFP,Write FIFO Pointer" bitfld.long 0x0 15. "RCP,Receive Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO reads and this.." newline hexmask.long.byte 0x0 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0x4 "SAI_RFR1,SAI Receive FIFO Register" hexmask.long.byte 0x4 16.--19. 1. "WFP,Write FIFO Pointer" bitfld.long 0x4 15. "RCP,Receive Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO reads and this.." newline hexmask.long.byte 0x4 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0x8 "SAI_RFR2,SAI Receive FIFO Register" hexmask.long.byte 0x8 16.--19. 1. "WFP,Write FIFO Pointer" bitfld.long 0x8 15. "RCP,Receive Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO reads and this.." newline hexmask.long.byte 0x8 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0xC "SAI_RFR3,SAI Receive FIFO Register" hexmask.long.byte 0xC 16.--19. 1. "WFP,Write FIFO Pointer" bitfld.long 0xC 15. "RCP,Receive Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO reads and this.." newline hexmask.long.byte 0xC 0.--3. 1. "RFP,Read FIFO Pointer" group.long 0xE0++0x3 line.long 0x0 "SAI_RMR,SAI Receive Mask Register" hexmask.long.word 0x0 0.--15. 1. "RWM,Receive Word Mask" tree.end tree "SAI1" base ad:0x40055000 rgroup.long 0x0++0x7 line.long 0x0 "SAI_VERID,Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "SAI_PARAM,Parameter Register" hexmask.long.byte 0x4 16.--19. 1. "FRAME,Frame Size" hexmask.long.byte 0x4 8.--11. 1. "FIFO,FIFO Size" newline hexmask.long.byte 0x4 0.--3. 1. "DATALINE,Number of Datalines" group.long 0x8++0x17 line.long 0x0 "SAI_TCSR,SAI Transmit Control Register" bitfld.long 0x0 31. "TE,Transmitter Enable" "0: Transmitter is disabled.,1: Transmitter is enabled or transmitter has been.." bitfld.long 0x0 29. "DBGE,Debug Enable" "0: Transmitter is disabled in Debug mode after..,1: Transmitter is enabled in Debug mode." newline bitfld.long 0x0 28. "BCE,Bit Clock Enable" "0: Transmit bit clock is disabled.,1: Transmit bit clock is enabled." bitfld.long 0x0 25. "FR,FIFO Reset" "0: No effect.,1: FIFO reset." newline bitfld.long 0x0 24. "SR,Software Reset" "0: No effect.,1: Software reset." bitfld.long 0x0 20. "WSF,Word Start Flag" "0: Start of word not detected.,1: Start of word detected." newline bitfld.long 0x0 19. "SEF,Sync Error Flag" "0: Sync error not detected.,1: Frame sync error detected." bitfld.long 0x0 18. "FEF,FIFO Error Flag" "0: Transmit underrun not detected.,1: Transmit underrun detected." newline rbitfld.long 0x0 17. "FWF,FIFO Warning Flag" "0: No enabled transmit FIFO is empty.,1: Enabled transmit FIFO is empty." rbitfld.long 0x0 16. "FRF,FIFO Request Flag" "0: Transmit FIFO watermark has not been reached.,1: Transmit FIFO watermark has been reached." newline bitfld.long 0x0 12. "WSIE,Word Start Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt." bitfld.long 0x0 11. "SEIE,Sync Error Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt." newline bitfld.long 0x0 10. "FEIE,FIFO Error Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." bitfld.long 0x0 9. "FWIE,FIFO Warning Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." newline bitfld.long 0x0 8. "FRIE,FIFO Request Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." bitfld.long 0x0 1. "FWDE,FIFO Warning DMA Enable" "0: Disables the DMA request.,1: Enables the DMA request." newline bitfld.long 0x0 0. "FRDE,FIFO Request DMA Enable" "0: Disables the DMA request.,1: Enables the DMA request." line.long 0x4 "SAI_TCR1,SAI Transmit Configuration 1 Register" bitfld.long 0x4 0.--2. "TFW,Transmit FIFO Watermark" "0,1,2,3,4,5,6,7" line.long 0x8 "SAI_TCR2,SAI Transmit Configuration 2 Register" bitfld.long 0x8 30.--31. "SYNC,Synchronous Mode" "0: Asynchronous mode.,1: Synchronous with receiver.,?,?" bitfld.long 0x8 29. "BCS,Bit Clock Swap" "0: Use the normal bit clock source.,1: Swap the bit clock source." newline bitfld.long 0x8 28. "BCI,Bit Clock Input" "0: No effect.,1: Internal logic is clocked as if bit clock was.." bitfld.long 0x8 26.--27. "MSEL,MCLK Select" "0: Bus Clock selected.,1: Master Clock (MCLK) 1 option selected.,?,?" newline bitfld.long 0x8 25. "BCP,Bit Clock Polarity" "0: Bit clock is active high with drive outputs on..,1: Bit clock is active low with drive outputs on.." bitfld.long 0x8 24. "BCD,Bit Clock Direction" "0: Bit clock is generated externally in Slave mode.,1: Bit clock is generated internally in Master mode." newline hexmask.long.byte 0x8 0.--7. 1. "DIV,Bit Clock Divide" line.long 0xC "SAI_TCR3,SAI Transmit Configuration 3 Register" hexmask.long.byte 0xC 24.--27. 1. "CFR,Channel FIFO Reset" hexmask.long.byte 0xC 16.--19. 1. "TCE,Transmit Channel Enable" newline hexmask.long.byte 0xC 0.--3. 1. "WDFL,Word Flag Configuration" line.long 0x10 "SAI_TCR4,SAI Transmit Configuration 4 Register" bitfld.long 0x10 28. "FCONT,FIFO Continue on Error" "0: On FIFO error the SAI will continue from the..,1: On FIFO error the SAI will continue from the.." bitfld.long 0x10 26.--27. "FCOMB,FIFO Combine Mode" "0: FIFO combine mode disabled.,1: FIFO combine mode enabled on FIFO reads (from..,?,?" newline bitfld.long 0x10 24.--25. "FPACK,FIFO Packing Mode" "0: FIFO packing is disabled,?,?,?" hexmask.long.byte 0x10 16.--19. 1. "FRSZ,Frame size" newline hexmask.long.byte 0x10 8.--12. 1. "SYWD,Sync Width" bitfld.long 0x10 5. "CHMOD,Channel Mode" "0: TDM mode transmit data pins are tri-stated when..,1: Output mode transmit data pins are never.." newline bitfld.long 0x10 4. "MF,MSB First" "0: LSB is transmitted first.,1: MSB is transmitted first." bitfld.long 0x10 3. "FSE,Frame Sync Early" "0: Frame sync asserts with the first bit of the..,1: Frame sync asserts one bit before the first bit.." newline bitfld.long 0x10 2. "ONDEM,On Demand Mode" "0: Internal frame sync is generated continuously.,1: Internal frame sync is generated when the FIFO.." bitfld.long 0x10 1. "FSP,Frame Sync Polarity" "0: Frame sync is active high.,1: Frame sync is active low." newline bitfld.long 0x10 0. "FSD,Frame Sync Direction" "0: Frame sync is generated externally in Slave mode.,1: Frame sync is generated internally in Master mode." line.long 0x14 "SAI_TCR5,SAI Transmit Configuration 5 Register" hexmask.long.byte 0x14 24.--28. 1. "WNW,Word N Width" hexmask.long.byte 0x14 16.--20. 1. "W0W,Word 0 Width" newline hexmask.long.byte 0x14 8.--12. 1. "FBT,First Bit Shifted" wgroup.long 0x20++0xF line.long 0x0 "SAI_TDR0,SAI Transmit Data Register" hexmask.long 0x0 0.--31. 1. "TDR,Transmit Data Register" line.long 0x4 "SAI_TDR1,SAI Transmit Data Register" hexmask.long 0x4 0.--31. 1. "TDR,Transmit Data Register" line.long 0x8 "SAI_TDR2,SAI Transmit Data Register" hexmask.long 0x8 0.--31. 1. "TDR,Transmit Data Register" line.long 0xC "SAI_TDR3,SAI Transmit Data Register" hexmask.long 0xC 0.--31. 1. "TDR,Transmit Data Register" rgroup.long 0x40++0xF line.long 0x0 "SAI_TFR0,SAI Transmit FIFO Register" bitfld.long 0x0 31. "WCP,Write Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO writes and this.." hexmask.long.byte 0x0 16.--19. 1. "WFP,Write FIFO Pointer" newline hexmask.long.byte 0x0 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0x4 "SAI_TFR1,SAI Transmit FIFO Register" bitfld.long 0x4 31. "WCP,Write Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO writes and this.." hexmask.long.byte 0x4 16.--19. 1. "WFP,Write FIFO Pointer" newline hexmask.long.byte 0x4 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0x8 "SAI_TFR2,SAI Transmit FIFO Register" bitfld.long 0x8 31. "WCP,Write Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO writes and this.." hexmask.long.byte 0x8 16.--19. 1. "WFP,Write FIFO Pointer" newline hexmask.long.byte 0x8 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0xC "SAI_TFR3,SAI Transmit FIFO Register" bitfld.long 0xC 31. "WCP,Write Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO writes and this.." hexmask.long.byte 0xC 16.--19. 1. "WFP,Write FIFO Pointer" newline hexmask.long.byte 0xC 0.--3. 1. "RFP,Read FIFO Pointer" group.long 0x60++0x3 line.long 0x0 "SAI_TMR,SAI Transmit Mask Register" hexmask.long.word 0x0 0.--15. 1. "TWM,Transmit Word Mask" group.long 0x88++0x17 line.long 0x0 "SAI_RCSR,SAI Receive Control Register" bitfld.long 0x0 31. "RE,Receiver Enable" "0: Receiver is disabled.,1: Receiver is enabled or receiver has been.." bitfld.long 0x0 29. "DBGE,Debug Enable" "0: Receiver is disabled in Debug mode after..,1: Receiver is enabled in Debug mode." newline bitfld.long 0x0 28. "BCE,Bit Clock Enable" "0: Receive bit clock is disabled.,1: Receive bit clock is enabled." bitfld.long 0x0 25. "FR,FIFO Reset" "0: No effect.,1: FIFO reset." newline bitfld.long 0x0 24. "SR,Software Reset" "0: No effect.,1: Software reset." bitfld.long 0x0 20. "WSF,Word Start Flag" "0: Start of word not detected.,1: Start of word detected." newline bitfld.long 0x0 19. "SEF,Sync Error Flag" "0: Sync error not detected.,1: Frame sync error detected." bitfld.long 0x0 18. "FEF,FIFO Error Flag" "0: Receive overflow not detected.,1: Receive overflow detected." newline rbitfld.long 0x0 17. "FWF,FIFO Warning Flag" "0: No enabled receive FIFO is full.,1: Enabled receive FIFO is full." rbitfld.long 0x0 16. "FRF,FIFO Request Flag" "0: Receive FIFO watermark not reached.,1: Receive FIFO watermark has been reached." newline bitfld.long 0x0 12. "WSIE,Word Start Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt." bitfld.long 0x0 11. "SEIE,Sync Error Interrupt Enable" "0: Disables interrupt.,1: Enables interrupt." newline bitfld.long 0x0 10. "FEIE,FIFO Error Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." bitfld.long 0x0 9. "FWIE,FIFO Warning Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." newline bitfld.long 0x0 8. "FRIE,FIFO Request Interrupt Enable" "0: Disables the interrupt.,1: Enables the interrupt." bitfld.long 0x0 1. "FWDE,FIFO Warning DMA Enable" "0: Disables the DMA request.,1: Enables the DMA request." newline bitfld.long 0x0 0. "FRDE,FIFO Request DMA Enable" "0: Disables the DMA request.,1: Enables the DMA request." line.long 0x4 "SAI_RCR1,SAI Receive Configuration 1 Register" bitfld.long 0x4 0.--2. "RFW,Receive FIFO Watermark" "0,1,2,3,4,5,6,7" line.long 0x8 "SAI_RCR2,SAI Receive Configuration 2 Register" bitfld.long 0x8 30.--31. "SYNC,Synchronous Mode" "0: Asynchronous mode.,1: Synchronous with transmitter.,?,?" bitfld.long 0x8 29. "BCS,Bit Clock Swap" "0: Use the normal bit clock source.,1: Swap the bit clock source." newline bitfld.long 0x8 28. "BCI,Bit Clock Input" "0: No effect.,1: Internal logic is clocked as if bit clock was.." bitfld.long 0x8 26.--27. "MSEL,MCLK Select" "0: Bus Clock selected.,1: Master Clock (MCLK) 1 option selected.,?,?" newline bitfld.long 0x8 25. "BCP,Bit Clock Polarity" "0: Bit Clock is active high with drive outputs on..,1: Bit Clock is active low with drive outputs on.." bitfld.long 0x8 24. "BCD,Bit Clock Direction" "0: Bit clock is generated externally in Slave mode.,1: Bit clock is generated internally in Master mode." newline hexmask.long.byte 0x8 0.--7. 1. "DIV,Bit Clock Divide" line.long 0xC "SAI_RCR3,SAI Receive Configuration 3 Register" hexmask.long.byte 0xC 24.--27. 1. "CFR,Channel FIFO Reset" hexmask.long.byte 0xC 16.--19. 1. "RCE,Receive Channel Enable" newline hexmask.long.byte 0xC 0.--3. 1. "WDFL,Word Flag Configuration" line.long 0x10 "SAI_RCR4,SAI Receive Configuration 4 Register" bitfld.long 0x10 28. "FCONT,FIFO Continue on Error" "0: On FIFO error the SAI will continue from the..,1: On FIFO error the SAI will continue from the.." bitfld.long 0x10 26.--27. "FCOMB,FIFO Combine Mode" "0: FIFO combine mode disabled.,1: FIFO combine mode enabled on FIFO writes (from..,?,?" newline bitfld.long 0x10 24.--25. "FPACK,FIFO Packing Mode" "0: FIFO packing is disabled,?,?,?" hexmask.long.byte 0x10 16.--19. 1. "FRSZ,Frame Size" newline hexmask.long.byte 0x10 8.--12. 1. "SYWD,Sync Width" bitfld.long 0x10 4. "MF,MSB First" "0: LSB is received first.,1: MSB is received first." newline bitfld.long 0x10 3. "FSE,Frame Sync Early" "0: Frame sync asserts with the first bit of the..,1: Frame sync asserts one bit before the first bit.." bitfld.long 0x10 2. "ONDEM,On Demand Mode" "0: Internal frame sync is generated continuously.,1: Internal frame sync is generated when the FIFO.." newline bitfld.long 0x10 1. "FSP,Frame Sync Polarity" "0: Frame sync is active high.,1: Frame sync is active low." bitfld.long 0x10 0. "FSD,Frame Sync Direction" "0: Frame Sync is generated externally in Slave mode.,1: Frame Sync is generated internally in Master mode." line.long 0x14 "SAI_RCR5,SAI Receive Configuration 5 Register" hexmask.long.byte 0x14 24.--28. 1. "WNW,Word N Width" hexmask.long.byte 0x14 16.--20. 1. "W0W,Word 0 Width" newline hexmask.long.byte 0x14 8.--12. 1. "FBT,First Bit Shifted" rgroup.long 0xA0++0xF line.long 0x0 "SAI_RDR0,SAI Receive Data Register" hexmask.long 0x0 0.--31. 1. "RDR,Receive Data Register" line.long 0x4 "SAI_RDR1,SAI Receive Data Register" hexmask.long 0x4 0.--31. 1. "RDR,Receive Data Register" line.long 0x8 "SAI_RDR2,SAI Receive Data Register" hexmask.long 0x8 0.--31. 1. "RDR,Receive Data Register" line.long 0xC "SAI_RDR3,SAI Receive Data Register" hexmask.long 0xC 0.--31. 1. "RDR,Receive Data Register" rgroup.long 0xC0++0xF line.long 0x0 "SAI_RFR0,SAI Receive FIFO Register" hexmask.long.byte 0x0 16.--19. 1. "WFP,Write FIFO Pointer" bitfld.long 0x0 15. "RCP,Receive Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO reads and this.." newline hexmask.long.byte 0x0 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0x4 "SAI_RFR1,SAI Receive FIFO Register" hexmask.long.byte 0x4 16.--19. 1. "WFP,Write FIFO Pointer" bitfld.long 0x4 15. "RCP,Receive Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO reads and this.." newline hexmask.long.byte 0x4 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0x8 "SAI_RFR2,SAI Receive FIFO Register" hexmask.long.byte 0x8 16.--19. 1. "WFP,Write FIFO Pointer" bitfld.long 0x8 15. "RCP,Receive Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO reads and this.." newline hexmask.long.byte 0x8 0.--3. 1. "RFP,Read FIFO Pointer" line.long 0xC "SAI_RFR3,SAI Receive FIFO Register" hexmask.long.byte 0xC 16.--19. 1. "WFP,Write FIFO Pointer" bitfld.long 0xC 15. "RCP,Receive Channel Pointer" "0: No effect.,1: FIFO combine is enabled for FIFO reads and this.." newline hexmask.long.byte 0xC 0.--3. 1. "RFP,Read FIFO Pointer" group.long 0xE0++0x3 line.long 0x0 "SAI_RMR,SAI Receive Mask Register" hexmask.long.word 0x0 0.--15. 1. "RWM,Receive Word Mask" tree.end tree.end endif tree "SCG (System Clock Generator)" base ad:0x40064000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,Version ID Register" hexmask.long 0x0 0.--31. 1. "VERSION,SCG Version Number" line.long 0x4 "PARAM,Parameter Register" hexmask.long.byte 0x4 27.--31. 1. "DIVPRES,Divider Present" hexmask.long.byte 0x4 0.--7. 1. "CLKPRES,Clock Present" rgroup.long 0x10++0x3 line.long 0x0 "CSR,Clock Status Register" sif (cpuis("S32K116*")||cpuis("S32K118*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" endif sif (cpuis("S32K142*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" newline endif sif (cpuis("S32K144*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" endif hexmask.long.byte 0x0 16.--19. 1. "DIVCORE,Core Clock Divide Ratio" newline hexmask.long.byte 0x0 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio" hexmask.long.byte 0x0 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio" group.long 0x14++0x7 line.long 0x0 "RCCR,Run Clock Control Register" sif (cpuis("S32K116*")||cpuis("S32K118*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" endif sif (cpuis("S32K142*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" newline endif sif (cpuis("S32K144*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" endif hexmask.long.byte 0x0 16.--19. 1. "DIVCORE,Core Clock Divide Ratio" newline hexmask.long.byte 0x0 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio" hexmask.long.byte 0x0 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio" line.long 0x4 "VCCR,VLPR Clock Control Register" hexmask.long.byte 0x4 24.--27. 1. "SCS,System Clock Source" hexmask.long.byte 0x4 16.--19. 1. "DIVCORE,Core Clock Divide Ratio" newline hexmask.long.byte 0x4 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio" hexmask.long.byte 0x4 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio" sif (cpuis("S32K142*")) group.long 0x1C++0x3 line.long 0x0 "HCCR,HSRUN Clock Control Register" hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" hexmask.long.byte 0x0 16.--19. 1. "DIVCORE,Core Clock Divide Ratio" newline hexmask.long.byte 0x0 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio" hexmask.long.byte 0x0 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio" endif sif (cpuis("S32K144*")) group.long 0x1C++0x3 line.long 0x0 "HCCR,HSRUN Clock Control Register" hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" hexmask.long.byte 0x0 16.--19. 1. "DIVCORE,Core Clock Divide Ratio" newline hexmask.long.byte 0x0 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio" hexmask.long.byte 0x0 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio" group.long 0x600++0x7 line.long 0x0 "SPLLCSR,System PLL Control Status Register" bitfld.long 0x0 26. "SPLLERR,System PLL Clock Error" "0: System PLL Clock Monitor is disabled or has not..,1: System PLL Clock Monitor is enabled and detected.." rbitfld.long 0x0 25. "SPLLSEL,System PLL Selected" "0: System PLL is not the system clock source,1: System PLL is the system clock source" newline rbitfld.long 0x0 24. "SPLLVLD,System PLL Valid" "0: System PLL is not enabled or clock is not valid,1: System PLL is enabled and output clock is valid" bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written." newline bitfld.long 0x0 17. "SPLLCMRE,System PLL Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error detected" bitfld.long 0x0 16. "SPLLCM,System PLL Clock Monitor" "0: System PLL Clock Monitor is disabled,1: System PLL Clock Monitor is enabled" newline bitfld.long 0x0 0. "SPLLEN,System PLL Enable" "0: System PLL is disabled,1: System PLL is enabled" line.long 0x4 "SPLLDIV,System PLL Divide Register" bitfld.long 0x4 8.--10. "SPLLDIV2,System PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,?,?,?,?,?,?" bitfld.long 0x4 0.--2. "SPLLDIV1,System PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,?,?,?,?,?,?" endif sif (cpuis("S32K146*")) group.long 0x1C++0x3 line.long 0x0 "HCCR,HSRUN Clock Control Register" hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" hexmask.long.byte 0x0 16.--19. 1. "DIVCORE,Core Clock Divide Ratio" newline hexmask.long.byte 0x0 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio" hexmask.long.byte 0x0 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio" group.long 0x600++0x7 line.long 0x0 "SPLLCSR,System PLL Control Status Register" bitfld.long 0x0 26. "SPLLERR,System PLL Clock Error" "0: System PLL Clock Monitor is disabled or has not..,1: System PLL Clock Monitor is enabled and detected.." rbitfld.long 0x0 25. "SPLLSEL,System PLL Selected" "0: System PLL is not the system clock source,1: System PLL is the system clock source" newline rbitfld.long 0x0 24. "SPLLVLD,System PLL Valid" "0: System PLL is not enabled or clock is not valid,1: System PLL is enabled and output clock is valid" bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written." newline bitfld.long 0x0 17. "SPLLCMRE,System PLL Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error detected" bitfld.long 0x0 16. "SPLLCM,System PLL Clock Monitor" "0: System PLL Clock Monitor is disabled,1: System PLL Clock Monitor is enabled" newline bitfld.long 0x0 0. "SPLLEN,System PLL Enable" "0: System PLL is disabled,1: System PLL is enabled" line.long 0x4 "SPLLDIV,System PLL Divide Register" bitfld.long 0x4 8.--10. "SPLLDIV2,System PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,?,?,?,?,?,?" bitfld.long 0x4 0.--2. "SPLLDIV1,System PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,?,?,?,?,?,?" endif sif (cpuis("S32K148*")) group.long 0x1C++0x3 line.long 0x0 "HCCR,HSRUN Clock Control Register" hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source" hexmask.long.byte 0x0 16.--19. 1. "DIVCORE,Core Clock Divide Ratio" newline hexmask.long.byte 0x0 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio" hexmask.long.byte 0x0 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio" group.long 0x600++0x7 line.long 0x0 "SPLLCSR,System PLL Control Status Register" bitfld.long 0x0 26. "SPLLERR,System PLL Clock Error" "0: System PLL Clock Monitor is disabled or has not..,1: System PLL Clock Monitor is enabled and detected.." rbitfld.long 0x0 25. "SPLLSEL,System PLL Selected" "0: System PLL is not the system clock source,1: System PLL is the system clock source" newline rbitfld.long 0x0 24. "SPLLVLD,System PLL Valid" "0: System PLL is not enabled or clock is not valid,1: System PLL is enabled and output clock is valid" bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written." newline bitfld.long 0x0 17. "SPLLCMRE,System PLL Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error detected" bitfld.long 0x0 16. "SPLLCM,System PLL Clock Monitor" "0: System PLL Clock Monitor is disabled,1: System PLL Clock Monitor is enabled" newline bitfld.long 0x0 0. "SPLLEN,System PLL Enable" "0: System PLL is disabled,1: System PLL is enabled" line.long 0x4 "SPLLDIV,System PLL Divide Register" bitfld.long 0x4 8.--10. "SPLLDIV2,System PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,?,?,?,?,?,?" bitfld.long 0x4 0.--2. "SPLLDIV1,System PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,?,?,?,?,?,?" endif group.long 0x20++0x3 line.long 0x0 "CLKOUTCNFG,SCG CLKOUT Configuration Register" sif (cpuis("S32K116*")||cpuis("S32K118*")) hexmask.long.byte 0x0 24.--27. 1. "CLKOUTSEL,SCG Clkout Select" endif sif (cpuis("S32K144*")) hexmask.long.byte 0x0 24.--27. 1. "CLKOUTSEL,SCG Clkout Select" newline endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 24.--27. 1. "CLKOUTSEL,SCG Clkout Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 24.--27. 1. "CLKOUTSEL,SCG Clkout Select" endif group.long 0x100++0xB line.long 0x0 "SOSCCSR,System OSC Control Status Register" bitfld.long 0x0 26. "SOSCERR,System OSC Clock Error" "0: System OSC Clock Monitor is disabled or has not..,1: System OSC Clock Monitor is enabled and detected.." rbitfld.long 0x0 25. "SOSCSEL,System OSC Selected" "0: System OSC is not the system clock source,1: System OSC is the system clock source" newline rbitfld.long 0x0 24. "SOSCVLD,System OSC Valid" "0: System OSC is not enabled or clock is not valid,1: System OSC is enabled and output clock is valid" bitfld.long 0x0 23. "LK,Lock Register" "0: This Control Status Register can be written.,1: This Control Status Register cannot be written." newline bitfld.long 0x0 17. "SOSCCMRE,System OSC Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error detected" bitfld.long 0x0 16. "SOSCCM,System OSC Clock Monitor" "0: System OSC Clock Monitor is disabled,1: System OSC Clock Monitor is enabled" newline bitfld.long 0x0 0. "SOSCEN,System OSC Enable" "0: System OSC is disabled,1: System OSC is enabled" line.long 0x4 "SOSCDIV,System OSC Divide Register" bitfld.long 0x4 8.--10. "SOSCDIV2,System OSC Clock Divide 2" "0: Output disabled,1: Divide by 1,?,?,?,?,?,?" bitfld.long 0x4 0.--2. "SOSCDIV1,System OSC Clock Divide 1" "0: Output disabled,1: Divide by 1,?,?,?,?,?,?" line.long 0x8 "SOSCCFG,System Oscillator Configuration Register" bitfld.long 0x8 4.--5. "RANGE,System OSC Range Select" "?,1: Low frequency range selected for the crystal..,?,?" bitfld.long 0x8 3. "HGO,High Gain Oscillator Select" "0: Configure crystal oscillator for low-gain..,1: Configure crystal oscillator for high-gain.." newline bitfld.long 0x8 2. "EREFS,External Reference Select" "0: External reference clock selected,1: Internal crystal oscillator of OSC selected." group.long 0x200++0xB line.long 0x0 "SIRCCSR,Slow IRC Control Status Register" rbitfld.long 0x0 25. "SIRCSEL,Slow IRC Selected" "0: Slow IRC is not the system clock source,1: Slow IRC is the system clock source" rbitfld.long 0x0 24. "SIRCVLD,Slow IRC Valid" "0: Slow IRC is not enabled or clock is not valid,1: Slow IRC is enabled and output clock is valid" newline bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written." bitfld.long 0x0 2. "SIRCLPEN,Slow IRC Low Power Enable" "0: Slow IRC is disabled in VLP modes,1: Slow IRC is enabled in VLP modes" newline bitfld.long 0x0 1. "SIRCSTEN,Slow IRC Stop Enable" "0: Slow IRC is disabled in supported Stop modes,1: Slow IRC is enabled in supported Stop modes" bitfld.long 0x0 0. "SIRCEN,Slow IRC Enable" "0: Slow IRC is disabled,1: Slow IRC is enabled" line.long 0x4 "SIRCDIV,Slow IRC Divide Register" bitfld.long 0x4 8.--10. "SIRCDIV2,Slow IRC Clock Divide 2" "0: Output disabled,1: Divide by 1,?,?,?,?,?,?" bitfld.long 0x4 0.--2. "SIRCDIV1,Slow IRC Clock Divide 1" "0: Output disabled,1: Divide by 1,?,?,?,?,?,?" line.long 0x8 "SIRCCFG,Slow IRC Configuration Register" bitfld.long 0x8 0. "RANGE,Frequency Range" "0: Slow IRC low range clock (2 MHz),1: Slow IRC high range clock (8 MHz )" group.long 0x300++0xB line.long 0x0 "FIRCCSR,Fast IRC Control Status Register" bitfld.long 0x0 26. "FIRCERR,Fast IRC Clock Error" "0: Error not detected with the Fast IRC trimming.,1: Error detected with the Fast IRC trimming." rbitfld.long 0x0 25. "FIRCSEL,Fast IRC Selected status" "0: Fast IRC is not the system clock source,1: Fast IRC is the system clock source" newline rbitfld.long 0x0 24. "FIRCVLD,Fast IRC Valid status" "0: Fast IRC is not enabled or clock is not valid.,1: Fast IRC is enabled and output clock is valid." bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written." newline bitfld.long 0x0 3. "FIRCREGOFF,Fast IRC Regulator Enable" "0: Fast IRC Regulator is enabled.,1: Fast IRC Regulator is disabled." bitfld.long 0x0 0. "FIRCEN,Fast IRC Enable" "0: Fast IRC is disabled,1: Fast IRC is enabled" line.long 0x4 "FIRCDIV,Fast IRC Divide Register" bitfld.long 0x4 8.--10. "FIRCDIV2,Fast IRC Clock Divide 2" "0: Output disabled,1: Divide by 1,?,?,?,?,?,?" bitfld.long 0x4 0.--2. "FIRCDIV1,Fast IRC Clock Divide 1" "0: Output disabled,1: Divide by 1,?,?,?,?,?,?" line.long 0x8 "FIRCCFG,Fast IRC Configuration Register" bitfld.long 0x8 0.--1. "RANGE,Frequency Range" "0: Fast IRC is trimmed to 48 MHz,1: Fast IRC is trimmed to 52 MHz,?,?" sif (cpuis("S32K142*")) group.long 0x600++0xB line.long 0x0 "SPLLCSR,System PLL Control Status Register" bitfld.long 0x0 26. "SPLLERR,System PLL Clock Error" "0: System PLL Clock Monitor is disabled or has not..,1: System PLL Clock Monitor is enabled and detected.." rbitfld.long 0x0 25. "SPLLSEL,System PLL Selected" "0: System PLL is not the system clock source,1: System PLL is the system clock source" newline rbitfld.long 0x0 24. "SPLLVLD,System PLL Valid" "0: System PLL is not enabled or clock is not valid,1: System PLL is enabled and output clock is valid" bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written." newline bitfld.long 0x0 17. "SPLLCMRE,System PLL Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error detected" bitfld.long 0x0 16. "SPLLCM,System PLL Clock Monitor" "0: System PLL Clock Monitor is disabled,1: System PLL Clock Monitor is enabled" newline bitfld.long 0x0 0. "SPLLEN,System PLL Enable" "0: System PLL is disabled,1: System PLL is enabled" line.long 0x4 "SPLLDIV,System PLL Divide Register" bitfld.long 0x4 8.--10. "SPLLDIV2,System PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,?,?,?,?,?,?" bitfld.long 0x4 0.--2. "SPLLDIV1,System PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,?,?,?,?,?,?" line.long 0x8 "SPLLCFG,System PLL Configuration Register" hexmask.long.byte 0x8 16.--20. 1. "MULT,System PLL Multiplier" bitfld.long 0x8 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7" endif sif (cpuis("S32K144*")) group.long 0x608++0x3 line.long 0x0 "SPLLCFG,System PLL Configuration Register" hexmask.long.byte 0x0 16.--20. 1. "MULT,System PLL Multiplier" bitfld.long 0x0 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7" endif sif (cpuis("S32K146*")) group.long 0x608++0x3 line.long 0x0 "SPLLCFG,System PLL Configuration Register" hexmask.long.byte 0x0 16.--20. 1. "MULT,System PLL Multiplier" bitfld.long 0x0 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7" endif sif (cpuis("S32K148*")) group.long 0x608++0x3 line.long 0x0 "SPLLCFG,System PLL Configuration Register" hexmask.long.byte 0x0 16.--20. 1. "MULT,System PLL Multiplier" bitfld.long 0x0 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7" endif tree.end tree "SIM (System Integration Module)" base ad:0x40048000 group.long 0x4++0x3 line.long 0x0 "CHIPCTL,Chip Control register" bitfld.long 0x0 21. "SRAML_RETEN,SRAML_RETEN" "0: SRAML contents are retained across resets,1: No SRAML retention" bitfld.long 0x0 20. "SRAMU_RETEN,SRAMU_RETEN" "0: SRAMU contents are retained across resets,1: No SRAMU retention" newline bitfld.long 0x0 19. "ADC_SUPPLYEN,ADC_SUPPLYEN" "0: Disable internal supply monitoring,1: Enable internal supply monitoring" bitfld.long 0x0 16.--18. "ADC_SUPPLY,ADC_SUPPLY" "0: 5 V input VDD supply (VDD),1: 5 V input analog supply (VDDA),?,?,?,?,?,?" newline bitfld.long 0x0 13. "PDB_BB_SEL,PDB back-to-back select" "0: PDB0 channel 0 back-to-back operation with ADC0..,1: Channel 0 of PDB0 and PDB1 back-to-back.." bitfld.long 0x0 12. "TRACECLK_SEL,Debug trace clock select" "0: Core clock,1: Platform clock" newline bitfld.long 0x0 11. "CLKOUTEN,CLKOUT enable" "0: Clockout disable,1: Clockout enable" bitfld.long 0x0 8.--10. "CLKOUTDIV,CLKOUT Divide Ratio" "0: Divide by 1,1: Divide by 2,?,?,?,?,?,?" newline hexmask.long.byte 0x0 4.--7. 1. "CLKOUTSEL,CLKOUT Select" hexmask.long.byte 0x0 0.--3. 1. "ADC_INTERLEAVE_EN,ADC interleave channel enable" group.long 0xC++0x7 line.long 0x0 "FTMOPT0,FTM Option Register 0" bitfld.long 0x0 30.--31. "FTM3CLKSEL,FTM3 External Clock Pin Select" "0: FTM3 external clock driven by TCLK0 pin.,1: FTM3 external clock driven by TCLK1 pin.,?,?" bitfld.long 0x0 28.--29. "FTM2CLKSEL,FTM2 External Clock Pin Select" "0: FTM2 external clock driven by TCLK0 pin.,1: FTM2 external clock driven by TCLK1 pin.,?,?" newline bitfld.long 0x0 26.--27. "FTM1CLKSEL,FTM1 External Clock Pin Select" "0: FTM1 external clock driven by TCLK0 pin.,1: FTM1 external clock driven by TCLK1 pin.,?,?" bitfld.long 0x0 24.--25. "FTM0CLKSEL,FTM0 External Clock Pin Select" "0: FTM0 external clock driven by TCLK0 pin.,1: FTM0 external clock driven by TCLK1 pin.,?,?" newline sif (cpuis("S32K148*")) bitfld.long 0x0 22.--23. "FTM7CLKSEL,FTM7 External Clock Pin Select" "0: FTM7 external clock driven by TCLK0 pin.,1: FTM7 external clock driven by TCLK1 pin.,?,?" bitfld.long 0x0 20.--21. "FTM6CLKSEL,FTM6 External Clock Pin Select" "0: FTM6 external clock driven by TCLK0 pin.,1: FTM6 external clock driven by TCLK1 pin.,?,?" newline bitfld.long 0x0 18.--19. "FTM5CLKSEL,FTM5 External Clock Pin Select" "0: FTM5 external clock driven by TCLK0 pin.,1: FTM5 external clock driven by TCLK1 pin.,?,?" bitfld.long 0x0 16.--17. "FTM4CLKSEL,FTM4 External Clock Pin Select" "0: FTM4 external clock driven by TCLK0 pin.,1: FTM4 external clock driven by TCLK1 pin.,?,?" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 18.--19. "FTM5CLKSEL,FTM5 External Clock Pin Select" "0: FTM5 external clock driven by TCLK0 pin.,1: FTM5 external clock driven by TCLK1 pin.,?,?" bitfld.long 0x0 16.--17. "FTM4CLKSEL,FTM4 External Clock Pin Select" "0: FTM4 external clock driven by TCLK0 pin.,1: FTM4 external clock driven by TCLK1 pin.,?,?" newline endif bitfld.long 0x0 12.--14. "FTM3FLTxSEL,FTM3 Fault X Select" "0: FTM3_FLTx pin,1: TRGMUX_FTM3 out,?,?,?,?,?,?" bitfld.long 0x0 8.--10. "FTM2FLTxSEL,FTM2 Fault X Select" "0: FTM2_FLTx pin,1: TRGMUX_FTM2 out,?,?,?,?,?,?" newline bitfld.long 0x0 4.--6. "FTM1FLTxSEL,FTM1 Fault X Select" "0: FTM1_FLTx pin,1: TRGMUX_FTM1 out,?,?,?,?,?,?" bitfld.long 0x0 0.--2. "FTM0FLTxSEL,FTM0 Fault X Select" "0: FTM0_FLTx pin,1: TRGMUX_FTM0 out,?,?,?,?,?,?" line.long 0x4 "LPOCLKS,LPO Clock Select Register" bitfld.long 0x4 4.--5. "RTCCLKSEL,32 kHz clock source select" "0: SOSCDIV1_CLK,1: 32 kHz LPO_CLK,?,?" bitfld.long 0x4 2.--3. "LPOCLKSEL,LPO clock source select" "0: 128 kHz LPO_CLK,1: No clock,?,?" newline bitfld.long 0x4 1. "LPO32KCLKEN,32 kHz LPO_CLK enable" "0: Disable 32 kHz LPO_CLK output,1: Enable 32 kHz LPO_CLK output" bitfld.long 0x4 0. "LPO1KCLKEN,1 kHz LPO_CLK enable" "0: Disable 1 kHz LPO_CLK output,1: Enable 1 kHz LPO_CLK output" group.long 0x18++0xB line.long 0x0 "ADCOPT,ADC Options Register" bitfld.long 0x0 12.--13. "ADC1PRETRGSEL,ADC1 pretrigger source select" "0: PDB pretrigger (default),1: TRGMUX pretrigger,?,?" bitfld.long 0x0 9.--11. "ADC1SWPRETRG,ADC1 software pretrigger sources" "0: Software pretrigger disabled,1: Reserved (do not use),?,?,?,?,?,?" newline bitfld.long 0x0 8. "ADC1TRGSEL,ADC1 trigger source select" "0: PDB output,1: TRGMUX output" bitfld.long 0x0 4.--5. "ADC0PRETRGSEL,ADC0 pretrigger source select" "0: PDB pretrigger (default),1: TRGMUX pretrigger,?,?" newline bitfld.long 0x0 1.--3. "ADC0SWPRETRG,ADC0 software pretrigger sources" "0: Software pretrigger disabled,1: Reserved (do not use),?,?,?,?,?,?" bitfld.long 0x0 0. "ADC0TRGSEL,ADC0 trigger source select" "0: PDB output,1: TRGMUX output" line.long 0x4 "FTMOPT1,FTM Option Register 1" hexmask.long.byte 0x4 24.--31. 1. "FTM3_OUTSEL,FTM3 channel modulation select with FTM2_CH1" hexmask.long.byte 0x4 16.--23. 1. "FTM0_OUTSEL,FTM0 channel modulation select with FTM1_CH1" newline bitfld.long 0x4 15. "FTMGLDOK,FTM global load enable" "0: FTM Global load mechanism disabled.,1: FTM Global load mechanism enabled" sif (cpuis("S32K148*")) bitfld.long 0x4 14. "FTM7SYNCBIT,FTM7 Sync Bit" "0,1" newline bitfld.long 0x4 13. "FTM6SYNCBIT,FTM6 Sync Bit" "0,1" bitfld.long 0x4 12. "FTM5SYNCBIT,FTM5 Sync Bit" "0,1" newline bitfld.long 0x4 11. "FTM4SYNCBIT,FTM4 Sync Bit" "0,1" endif sif (cpuis("S32K146*")) bitfld.long 0x4 12. "FTM5SYNCBIT,FTM5 Sync Bit" "0,1" newline bitfld.long 0x4 11. "FTM4SYNCBIT,FTM4 Sync Bit" "0,1" endif bitfld.long 0x4 8. "FTM2CH1SEL,FTM2 CH1 Select" "0: FTM2_CH1 input,1: exclusive OR of FTM2_CH0 FTM2_CH1 and FTM1_CH1" newline bitfld.long 0x4 6.--7. "FTM2CH0SEL,FTM2 CH0 Select" "0: FTM2_CH0 input,1: CMP0 output,?,?" bitfld.long 0x4 4.--5. "FTM1CH0SEL,FTM1 CH0 Select" "0: FTM1_CH0 input,1: CMP0 output,?,?" newline bitfld.long 0x4 3. "FTM3SYNCBIT,FTM3 Sync Bit" "0,1" bitfld.long 0x4 2. "FTM2SYNCBIT,FTM2 Sync Bit" "0,1" newline bitfld.long 0x4 1. "FTM1SYNCBIT,FTM1 Sync Bit" "0,1" bitfld.long 0x4 0. "FTM0SYNCBIT,FTM0 Sync Bit" "0,1" line.long 0x8 "MISCTRL0,Miscellaneous control register 0" sif (cpuis("S32K148*")) bitfld.long 0x8 26. "QSPI_CLK_SEL,QSPI CLK Select bit" "0: QuadSPI internal reference clock is gated.,1: QuadSPI internal reference clock is enabled." bitfld.long 0x8 25. "RMII_CLK_SEL,RMII CLK Select bit" "0: FIRCDIV1_CLK,1: SOSCDIV1_CLK" newline bitfld.long 0x8 24. "RMII_CLK_OBE,RMII CLK OBE bit" "0,1" bitfld.long 0x8 23. "FTM7_OBE_CTRL,FTM7 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." newline bitfld.long 0x8 22. "FTM6_OBE_CTRL,FTM6 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." bitfld.long 0x8 21. "FTM5_OBE_CTRL,FTM5 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." newline bitfld.long 0x8 20. "FTM4_OBE_CTRL,FTM4 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." endif sif (cpuis("S32K146*")) bitfld.long 0x8 23. "FTM7_OBE_CTRL,FTM7 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." newline bitfld.long 0x8 22. "FTM6_OBE_CTRL,FTM6 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." bitfld.long 0x8 21. "FTM5_OBE_CTRL,FTM5 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." newline bitfld.long 0x8 20. "FTM4_OBE_CTRL,FTM4 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." endif bitfld.long 0x8 19. "FTM3_OBE_CTRL,FTM3 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." newline bitfld.long 0x8 18. "FTM2_OBE_CTRL,FTM2 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." bitfld.long 0x8 17. "FTM1_OBE_CTRL,FTM1 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." newline bitfld.long 0x8 16. "FTM0_OBE_CTRL,FTM0 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.." sif (cpuis("S32K146*")) bitfld.long 0x8 14. "FTM_GTB_SPLIT_EN,FTM GTB split enable/disable bit" "0: All the FTMs have a single global time-base,1: FTM0-3 have a common time-base and others have a.." newline endif sif (cpuis("S32K148*")) bitfld.long 0x8 14. "FTM_GTB_SPLIT_EN,FTM GTB split enable/disable bit" "0: All the FTMs have a single global time-base,1: FTM0-3 have a common time-base and others have a.." endif rgroup.long 0x24++0x3 line.long 0x0 "SDID,System Device Identification Register" hexmask.long.byte 0x0 28.--31. 1. "GENERATION,S32K product series generation" hexmask.long.byte 0x0 24.--27. 1. "SUBSERIES,Subseries" newline hexmask.long.byte 0x0 20.--23. 1. "DERIVATE,Derivate" hexmask.long.byte 0x0 16.--19. 1. "RAMSIZE,RAM size" newline hexmask.long.byte 0x0 12.--15. 1. "REVID,Device revision number" hexmask.long.byte 0x0 8.--11. 1. "PACKAGE,Package" newline hexmask.long.byte 0x0 0.--7. 1. "FEATURES,Features" group.long 0x40++0x3 line.long 0x0 "PLATCGC,Platform Clock Gating Control Register" bitfld.long 0x0 4. "CGCEIM,EIM Clock Gating Control" "0: Clock disabled,1: Clock enabled" bitfld.long 0x0 3. "CGCERM,ERM Clock Gating Control" "0: Clock disabled,1: Clock enabled" newline bitfld.long 0x0 2. "CGCDMA,DMA Clock Gating Control" "0: Clock disabled,1: Clock enabled" bitfld.long 0x0 1. "CGCMPU,MPU Clock Gating Control" "0: Clock disabled,1: Clock enabled" newline bitfld.long 0x0 0. "CGCMSCM,MSCM Clock Gating Control" "0: Clock disabled,1: Clock enabled" rgroup.long 0x4C++0x3 line.long 0x0 "FCFG1,Flash Configuration Register 1" hexmask.long.byte 0x0 16.--19. 1. "EEERAMSIZE,EEE SRAM SIZE" hexmask.long.byte 0x0 12.--15. 1. "DEPART,FlexNVM partition" rgroup.long 0x54++0xF line.long 0x0 "UIDH,Unique Identification Register High" hexmask.long 0x0 0.--31. 1. "UID127_96,Unique Identification" line.long 0x4 "UIDMH,Unique Identification Register Mid-High" hexmask.long 0x4 0.--31. 1. "UID95_64,Unique Identification" line.long 0x8 "UIDML,Unique Identification Register Mid Low" hexmask.long 0x8 0.--31. 1. "UID63_32,Unique Identification" line.long 0xC "UIDL,Unique Identification Register Low" hexmask.long 0xC 0.--31. 1. "UID31_0,Unique Identification" group.long 0x68++0x7 line.long 0x0 "CLKDIV4,System Clock Divider Register 4" bitfld.long 0x0 28. "TRACEDIVEN,Debug Trace Divider control" "0: Debug trace divider disabled,1: Debug trace divider enabled" bitfld.long 0x0 1.--3. "TRACEDIV,Trace Clock Divider value To configure TRACEDIV you must first disable TRACEDIVEN then enable it after setting TRACEDIV." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "TRACEFRAC,Trace Clock Divider fraction To configure TRACEDIV and TRACEFRAC you must first clear TRACEDIVEN to disable the trace clock divide function." "0,1" line.long 0x4 "MISCTRL1,Miscellaneous Control register 1" bitfld.long 0x4 0. "SW_TRG,Software trigger to TRGMUX. Writing to this bit generates software trigger to peripherals through TRGMUX (Refer to Figure: Trigger interconnectivity)." "0,1" tree.end tree "SMC (System Mode Controller)" base ad:0x4007E000 rgroup.long 0x0++0x7 line.long 0x0 "VERID,SMC Version ID Register" hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number" hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number" newline hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number" line.long 0x4 "PARAM,SMC Parameter Register" bitfld.long 0x4 6. "EVLLS0,Existence of VLLS0 feature" "0: The feature is not available.,1: The feature is available." bitfld.long 0x4 5. "ELLS2,Existence of LLS2 feature" "0: The feature is not available.,1: The feature is available." newline bitfld.long 0x4 3. "ELLS,Existence of LLS feature" "0: The feature is not available.,1: The feature is available." bitfld.long 0x4 0. "EHSRUN,Existence of HSRUN feature" "0: The feature is not available.,1: The feature is available." group.long 0x8++0xB line.long 0x0 "PMPROT,Power Mode Protection register" sif (cpuis("S32K142*")) bitfld.long 0x0 7. "AHSRUN,Allow High Speed Run mode" "0: HSRUN is not allowed,1: HSRUN is allowed" endif sif (cpuis("S32K144*")) bitfld.long 0x0 7. "AHSRUN,Allow High Speed Run mode" "0: HSRUN is not allowed,1: HSRUN is allowed" newline endif sif (cpuis("S32K146*")) bitfld.long 0x0 7. "AHSRUN,Allow High Speed Run mode" "0: HSRUN is not allowed,1: HSRUN is allowed" endif sif (cpuis("S32K148*")) bitfld.long 0x0 7. "AHSRUN,Allow High Speed Run mode" "0: HSRUN is not allowed,1: HSRUN is allowed" newline endif bitfld.long 0x0 5. "AVLP,Allow Very-Low-Power Modes" "0: VLPR and VLPS are not allowed.,1: VLPR and VLPS are allowed." line.long 0x4 "PMCTRL,Power Mode Control register" sif (cpuis("S32K116*")||cpuis("S32K118*")) bitfld.long 0x4 5.--6. "RUNM,Run Mode Control" "0: Normal Run mode (RUN),?,?,?" endif sif (cpuis("S32K142*")) bitfld.long 0x4 5.--6. "RUNM,Run Mode Control" "0: Normal Run mode (RUN),?,?,?" newline endif sif (cpuis("S32K144*")) bitfld.long 0x4 5.--6. "RUNM,Run Mode Control" "0: Normal Run mode (RUN),?,?,?" endif sif (cpuis("S32K146*")) bitfld.long 0x4 5.--6. "RUNM,Run Mode Control" "0: Normal Run mode (RUN),?,?,?" newline endif sif (cpuis("S32K148*")) bitfld.long 0x4 5.--6. "RUNM,Run Mode Control" "0: Normal Run mode (RUN),?,?,?" endif rbitfld.long 0x4 3. "VLPSA,Very Low Power Stop Aborted" "0: The previous stop mode entry was successful.,1: The previous stop mode entry was aborted." newline bitfld.long 0x4 0.--2. "STOPM,Stop Mode Control" "0: Normal Stop (STOP),?,?,?,?,?,?,?" line.long 0x8 "STOPCTRL,Stop Control Register" bitfld.long 0x8 6.--7. "STOPO,Stop Option" "?,1: STOP1 - Stop with both system and bus clocks..,?,?" rgroup.long 0x14++0x3 line.long 0x0 "PMSTAT,Power Mode Status register" hexmask.long.byte 0x0 0.--7. 1. "PMSTAT,Power Mode Status" tree.end tree "TRGMUX (Trigger MUX Control)" base ad:0x40063000 group.long 0x0++0xF line.long 0x0 "TRGMUX_DMAMUX0,TRGMUX DMAMUX0 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif line.long 0x4 "TRGMUX_EXTOUT0,TRGMUX EXTOUT0 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x4 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" hexmask.long.byte 0x4 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x4 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif line.long 0x8 "TRGMUX_EXTOUT1,TRGMUX EXTOUT1 Register" bitfld.long 0x8 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x8 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" hexmask.long.byte 0x8 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x8 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" hexmask.long.byte 0x8 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x8 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x8 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x8 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x8 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x8 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x8 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x8 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x8 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif line.long 0xC "TRGMUX_ADC0,TRGMUX ADC0 Register" bitfld.long 0xC 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0xC 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" hexmask.long.byte 0xC 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0xC 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" hexmask.long.byte 0xC 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0xC 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0xC 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0xC 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0xC 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0xC 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0xC 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0xC 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0xC 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K142*")) group.long 0x10++0x3 line.long 0x0 "TRGMUX_ADC1,TRGMUX ADC1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x30++0x7 line.long 0x0 "TRGMUX_FTM2,TRGMUX FTM2 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" line.long 0x4 "TRGMUX_FTM3,TRGMUX FTM3 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x4 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x4 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x4 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x3C++0x3 line.long 0x0 "TRGMUX_PDB1,TRGMUX PDB1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x60++0x3 line.long 0x0 "TRGMUX_LPSPI1,TRGMUX LPSPI1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K144*")) group.long 0x10++0x3 line.long 0x0 "TRGMUX_ADC1,TRGMUX ADC1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x30++0x7 line.long 0x0 "TRGMUX_FTM2,TRGMUX FTM2 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" line.long 0x4 "TRGMUX_FTM3,TRGMUX FTM3 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x4 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x4 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x4 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x3C++0x3 line.long 0x0 "TRGMUX_PDB1,TRGMUX PDB1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x60++0x3 line.long 0x0 "TRGMUX_LPSPI1,TRGMUX LPSPI1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) group.long 0x10++0x3 line.long 0x0 "TRGMUX_ADC1,TRGMUX ADC1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x30++0x7 line.long 0x0 "TRGMUX_FTM2,TRGMUX FTM2 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" line.long 0x4 "TRGMUX_FTM3,TRGMUX FTM3 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x4 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x4 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x4 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x3C++0x3 line.long 0x0 "TRGMUX_PDB1,TRGMUX PDB1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x60++0x3 line.long 0x0 "TRGMUX_LPSPI1,TRGMUX LPSPI1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) group.long 0x10++0x3 line.long 0x0 "TRGMUX_ADC1,TRGMUX ADC1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x30++0x7 line.long 0x0 "TRGMUX_FTM2,TRGMUX FTM2 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" line.long 0x4 "TRGMUX_FTM3,TRGMUX FTM3 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x4 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" newline hexmask.long.byte 0x4 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x4 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" newline hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x3C++0x3 line.long 0x0 "TRGMUX_PDB1,TRGMUX PDB1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x60++0x3 line.long 0x0 "TRGMUX_LPSPI1,TRGMUX LPSPI1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" group.long 0x6C++0x7 line.long 0x0 "TRGMUX_LPI2C1,TRGMUX LPI2C1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" line.long 0x4 "TRGMUX_FTM4,TRGMUX FTM4 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif group.long 0x1C++0x3 line.long 0x0 "TRGMUX_CMP0,TRGMUX CMP0 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif group.long 0x28++0x7 line.long 0x0 "TRGMUX_FTM0,TRGMUX FTM0 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif line.long 0x4 "TRGMUX_FTM1,TRGMUX FTM1 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x4 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" hexmask.long.byte 0x4 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x4 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif group.long 0x38++0x3 line.long 0x0 "TRGMUX_PDB0,TRGMUX PDB0 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif group.long 0x44++0x13 line.long 0x0 "TRGMUX_FLEXIO,TRGMUX FLEXIO Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif line.long 0x4 "TRGMUX_LPIT0,TRGMUX LPIT0 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x4 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select" hexmask.long.byte 0x4 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select" hexmask.long.byte 0x4 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select" hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 24.--30. 1. "SEL3,Trigger MUX Input 3 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" newline endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 16.--22. 1. "SEL2,Trigger MUX Input 2 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 8.--14. 1. "SEL1,Trigger MUX Input 1 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif line.long 0x8 "TRGMUX_LPUART0,TRGMUX LPUART0 Register" bitfld.long 0x8 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x8 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x8 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x8 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif line.long 0xC "TRGMUX_LPUART1,TRGMUX LPUART1 Register" bitfld.long 0xC 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0xC 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0xC 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0xC 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif line.long 0x10 "TRGMUX_LPI2C0,TRGMUX LPI2C0 Register" bitfld.long 0x10 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x10 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x10 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x10 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif group.long 0x5C++0x3 line.long 0x0 "TRGMUX_LPSPI0,TRGMUX LPSPI0 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K118*")) group.long 0x60++0x3 line.long 0x0 "TRGMUX_LPSPI1,TRGMUX LPSPI1 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif group.long 0x64++0x3 line.long 0x0 "TRGMUX_LPTMR0,TRGMUX LPTMR0 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." sif (cpuis("S32K116*")||cpuis("S32K118*")||cpuis("S32K142*")||cpuis("S32K144*")) hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K146*")) group.long 0x70++0x7 line.long 0x0 "TRGMUX_FTM4,TRGMUX FTM4 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" line.long 0x4 "TRGMUX_FTM5,TRGMUX FTM5 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif sif (cpuis("S32K148*")) group.long 0x74++0xB line.long 0x0 "TRGMUX_FTM5,TRGMUX FTM5 Register" bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x0 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" line.long 0x4 "TRGMUX_FTM6,TRGMUX FTM6 Register" bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x4 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" line.long 0x8 "TRGMUX_FTM7,TRGMUX FTM7 Register" bitfld.long 0x8 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.." hexmask.long.byte 0x8 0.--6. 1. "SEL0,Trigger MUX Input 0 Source Select" endif tree.end tree "WDOG (Watchdog Timer)" base ad:0x40052000 group.long 0x0++0xF line.long 0x0 "CS,Watchdog Control and Status Register" bitfld.long 0x0 15. "WIN,Watchdog Window" "0: Window mode disabled.,1: Window mode enabled." bitfld.long 0x0 14. "FLG,Watchdog Interrupt Flag" "0: No interrupt occurred.,1: An interrupt occurred." newline bitfld.long 0x0 13. "CMD32EN,Enables or disables WDOG support for 32-bit (otherwise 16-bit or 8-bit) refresh/unlock command write words" "0: Disables support for 32-bit refresh/unlock..,1: Enables support for 32-bit refresh/unlock.." bitfld.long 0x0 12. "PRES,Watchdog prescaler" "0: 256 prescaler disabled.,1: 256 prescaler enabled." newline rbitfld.long 0x0 11. "ULK,Unlock status" "0: WDOG is locked.,1: WDOG is unlocked." rbitfld.long 0x0 10. "RCS,Reconfiguration Success" "0: Reconfiguring WDOG.,1: Reconfiguration is successful." newline bitfld.long 0x0 8.--9. "CLK,Watchdog Clock" "0: Bus clock,1: LPO clock,?,?" bitfld.long 0x0 7. "EN,Watchdog Enable" "0: Watchdog disabled.,1: Watchdog enabled." newline bitfld.long 0x0 6. "INT,Watchdog Interrupt" "0: Watchdog interrupts are disabled. Watchdog..,1: Watchdog interrupts are enabled. Watchdog resets.." bitfld.long 0x0 5. "UPDATE,Allow updates" "0: Updates not allowed. After the initial..,1: Updates allowed. Software can modify the.." newline bitfld.long 0x0 3.--4. "TST,Watchdog Test" "0: Watchdog test mode disabled.,1: Watchdog user mode enabled. (Watchdog test mode..,?,?" bitfld.long 0x0 2. "DBG,Debug Enable" "0: Watchdog disabled in chip debug mode.,1: Watchdog enabled in chip debug mode." newline bitfld.long 0x0 1. "WAIT,Wait Enable" "0: Watchdog disabled in chip wait mode.,1: Watchdog enabled in chip wait mode." bitfld.long 0x0 0. "STOP,Stop Enable" "0: Watchdog disabled in chip stop mode.,1: Watchdog enabled in chip stop mode." line.long 0x4 "CNT,Watchdog Counter Register" hexmask.long.byte 0x4 8.--15. 1. "CNTHIGH,High byte of the Watchdog Counter" hexmask.long.byte 0x4 0.--7. 1. "CNTLOW,Low byte of the Watchdog Counter" line.long 0x8 "TOVAL,Watchdog Timeout Value Register" hexmask.long.byte 0x8 8.--15. 1. "TOVALHIGH,High byte of the timeout value" hexmask.long.byte 0x8 0.--7. 1. "TOVALLOW,Low byte of the timeout value" line.long 0xC "WIN,Watchdog Window Register" hexmask.long.byte 0xC 8.--15. 1. "WINHIGH,High byte of Watchdog Window" hexmask.long.byte 0xC 0.--7. 1. "WINLOW,Low byte of Watchdog Window" tree.end newline AUTOINDENT.OFF